aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorIngo Molnar <mingo@elte.hu>2009-01-28 13:19:12 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-29 08:16:48 -0500
commit9f4187f0a3b93fc215b4472063b6c0b44364e60c (patch)
treed25471c85ca562a22ecf59239ba4d1395beb16d3
parentb3daa3a1a56cf09fb91773f3658692fd02d08bb1 (diff)
x86, bigsmp: consolidate header code
Move all the asm/bigsmp/*.h definitions into bigsmp_32.c. Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r--arch/x86/kernel/bigsmp_32.c163
1 files changed, 159 insertions, 4 deletions
diff --git a/arch/x86/kernel/bigsmp_32.c b/arch/x86/kernel/bigsmp_32.c
index 626f45ca4e7e..b1f91931003f 100644
--- a/arch/x86/kernel/bigsmp_32.c
+++ b/arch/x86/kernel/bigsmp_32.c
@@ -12,10 +12,165 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/dmi.h> 14#include <linux/dmi.h>
15#include <asm/bigsmp/apicdef.h>
16#include <linux/smp.h> 15#include <linux/smp.h>
17#include <asm/bigsmp/apic.h> 16
18#include <asm/bigsmp/ipi.h> 17
18static inline unsigned bigsmp_get_apic_id(unsigned long x)
19{
20 return (x >> 24) & 0xFF;
21}
22
23#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
24
25static inline int bigsmp_apic_id_registered(void)
26{
27 return 1;
28}
29
30static inline const cpumask_t *bigsmp_target_cpus(void)
31{
32#ifdef CONFIG_SMP
33 return &cpu_online_map;
34#else
35 return &cpumask_of_cpu(0);
36#endif
37}
38
39#define APIC_DFR_VALUE (APIC_DFR_FLAT)
40
41static inline unsigned long
42bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
43{
44 return 0;
45}
46
47static inline unsigned long bigsmp_check_apicid_present(int bit)
48{
49 return 1;
50}
51
52static inline unsigned long calculate_ldr(int cpu)
53{
54 unsigned long val, id;
55 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
56 id = xapic_phys_to_log_apicid(cpu);
57 val |= SET_APIC_LOGICAL_ID(id);
58 return val;
59}
60
61/*
62 * Set up the logical destination ID.
63 *
64 * Intel recommends to set DFR, LDR and TPR before enabling
65 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
66 * document number 292116). So here it goes...
67 */
68static inline void bigsmp_init_apic_ldr(void)
69{
70 unsigned long val;
71 int cpu = smp_processor_id();
72
73 apic_write(APIC_DFR, APIC_DFR_VALUE);
74 val = calculate_ldr(cpu);
75 apic_write(APIC_LDR, val);
76}
77
78static inline void bigsmp_setup_apic_routing(void)
79{
80 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
81 "Physflat", nr_ioapics);
82}
83
84static inline int bigsmp_apicid_to_node(int logical_apicid)
85{
86 return apicid_2_node[hard_smp_processor_id()];
87}
88
89static inline int bigsmp_cpu_present_to_apicid(int mps_cpu)
90{
91 if (mps_cpu < nr_cpu_ids)
92 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
93
94 return BAD_APICID;
95}
96
97static inline physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
98{
99 return physid_mask_of_physid(phys_apicid);
100}
101
102extern u8 cpu_2_logical_apicid[];
103/* Mapping from cpu number to logical apicid */
104static inline int bigsmp_cpu_to_logical_apicid(int cpu)
105{
106 if (cpu >= nr_cpu_ids)
107 return BAD_APICID;
108 return cpu_physical_id(cpu);
109}
110
111static inline physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
112{
113 /* For clustered we don't have a good way to do this yet - hack */
114 return physids_promote(0xFFL);
115}
116
117static inline void bigsmp_setup_portio_remap(void)
118{
119}
120
121static inline int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
122{
123 return 1;
124}
125
126/* As we are using single CPU as destination, pick only one CPU here */
127static inline unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
128{
129 return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
130}
131
132static inline unsigned int
133bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
134 const struct cpumask *andmask)
135{
136 int cpu;
137
138 /*
139 * We're using fixed IRQ delivery, can only return one phys APIC ID.
140 * May as well be the first.
141 */
142 for_each_cpu_and(cpu, cpumask, andmask) {
143 if (cpumask_test_cpu(cpu, cpu_online_mask))
144 break;
145 }
146 if (cpu < nr_cpu_ids)
147 return bigsmp_cpu_to_logical_apicid(cpu);
148
149 return BAD_APICID;
150}
151
152static inline int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
153{
154 return cpuid_apic >> index_msb;
155}
156
157void default_send_IPI_mask_sequence(const struct cpumask *mask, int vector);
158void default_send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
159
160static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
161{
162 default_send_IPI_mask_sequence(mask, vector);
163}
164
165static inline void bigsmp_send_IPI_allbutself(int vector)
166{
167 default_send_IPI_mask_allbutself(cpu_online_mask, vector);
168}
169
170static inline void bigsmp_send_IPI_all(int vector)
171{
172 bigsmp_send_IPI_mask(cpu_online_mask, vector);
173}
19 174
20static int dmi_bigsmp; /* can be set by dmi scanners */ 175static int dmi_bigsmp; /* can be set by dmi scanners */
21 176
@@ -95,7 +250,7 @@ struct genapic apic_bigsmp = {
95 .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid, 250 .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid,
96 .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and, 251 .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and,
97 252
98 .send_IPI_mask = default_send_IPI_mask, 253 .send_IPI_mask = bigsmp_send_IPI_mask,
99 .send_IPI_mask_allbutself = NULL, 254 .send_IPI_mask_allbutself = NULL,
100 .send_IPI_allbutself = bigsmp_send_IPI_allbutself, 255 .send_IPI_allbutself = bigsmp_send_IPI_allbutself,
101 .send_IPI_all = bigsmp_send_IPI_all, 256 .send_IPI_all = bigsmp_send_IPI_all,