diff options
author | Linus Torvalds <torvalds@merom.osdl.org> | 2006-11-08 13:23:03 -0500 |
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committer | Linus Torvalds <torvalds@merom.osdl.org> | 2006-11-08 13:23:03 -0500 |
commit | 6c0ffb9d2fd987c79c6cbb81c3f3011c63749b1a (patch) | |
tree | ae135f5fcc6ab29f3fc0d057f4a9c10e5be58cbf | |
parent | 464908d7e2a9f77cb50ee905cda8a59e5b4e50e4 (diff) |
x86-64: clean up io-apic accesses
This is just commit 130fe05dbc0114609cfef9815c0c5580b42decfa ported to
x86-64, for all the same reasons. It cleans up the IO-APIC accesses in
order to then fix the ordering issues.
We move the accessor functions (that were only used by io_apic.c) out of
a header file, and use proper memory-mapped accesses rather than making
up our own "volatile" pointers.
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r-- | arch/x86_64/kernel/io_apic.c | 46 | ||||
-rw-r--r-- | include/asm-x86_64/io_apic.h | 34 |
2 files changed, 46 insertions, 34 deletions
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index fe429e5d6b29..96e02d845716 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c | |||
@@ -88,6 +88,52 @@ static struct irq_pin_list { | |||
88 | short apic, pin, next; | 88 | short apic, pin, next; |
89 | } irq_2_pin[PIN_MAP_SIZE]; | 89 | } irq_2_pin[PIN_MAP_SIZE]; |
90 | 90 | ||
91 | struct io_apic { | ||
92 | unsigned int index; | ||
93 | unsigned int unused[3]; | ||
94 | unsigned int data; | ||
95 | }; | ||
96 | |||
97 | static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) | ||
98 | { | ||
99 | return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) | ||
100 | + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK); | ||
101 | } | ||
102 | |||
103 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) | ||
104 | { | ||
105 | struct io_apic __iomem *io_apic = io_apic_base(apic); | ||
106 | writel(reg, &io_apic->index); | ||
107 | return readl(&io_apic->data); | ||
108 | } | ||
109 | |||
110 | static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) | ||
111 | { | ||
112 | struct io_apic __iomem *io_apic = io_apic_base(apic); | ||
113 | writel(reg, &io_apic->index); | ||
114 | writel(value, &io_apic->data); | ||
115 | } | ||
116 | |||
117 | /* | ||
118 | * Re-write a value: to be used for read-modify-write | ||
119 | * cycles where the read already set up the index register. | ||
120 | */ | ||
121 | static inline void io_apic_modify(unsigned int apic, unsigned int value) | ||
122 | { | ||
123 | struct io_apic __iomem *io_apic = io_apic_base(apic); | ||
124 | writel(value, &io_apic->data); | ||
125 | } | ||
126 | |||
127 | /* | ||
128 | * Synchronize the IO-APIC and the CPU by doing | ||
129 | * a dummy read from the IO-APIC | ||
130 | */ | ||
131 | static inline void io_apic_sync(unsigned int apic) | ||
132 | { | ||
133 | struct io_apic __iomem *io_apic = io_apic_base(apic); | ||
134 | readl(&io_apic->data); | ||
135 | } | ||
136 | |||
91 | #define __DO_ACTION(R, ACTION, FINAL) \ | 137 | #define __DO_ACTION(R, ACTION, FINAL) \ |
92 | \ | 138 | \ |
93 | { \ | 139 | { \ |
diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86_64/io_apic.h index 171ec2dc8c04..561ecbfd4cb5 100644 --- a/include/asm-x86_64/io_apic.h +++ b/include/asm-x86_64/io_apic.h | |||
@@ -12,10 +12,6 @@ | |||
12 | 12 | ||
13 | #define APIC_MISMATCH_DEBUG | 13 | #define APIC_MISMATCH_DEBUG |
14 | 14 | ||
15 | #define IO_APIC_BASE(idx) \ | ||
16 | ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \ | ||
17 | + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK))) | ||
18 | |||
19 | /* | 15 | /* |
20 | * The structure of the IO-APIC: | 16 | * The structure of the IO-APIC: |
21 | */ | 17 | */ |
@@ -119,36 +115,6 @@ extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; | |||
119 | /* non-0 if default (table-less) MP configuration */ | 115 | /* non-0 if default (table-less) MP configuration */ |
120 | extern int mpc_default_type; | 116 | extern int mpc_default_type; |
121 | 117 | ||
122 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) | ||
123 | { | ||
124 | *IO_APIC_BASE(apic) = reg; | ||
125 | return *(IO_APIC_BASE(apic)+4); | ||
126 | } | ||
127 | |||
128 | static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) | ||
129 | { | ||
130 | *IO_APIC_BASE(apic) = reg; | ||
131 | *(IO_APIC_BASE(apic)+4) = value; | ||
132 | } | ||
133 | |||
134 | /* | ||
135 | * Re-write a value: to be used for read-modify-write | ||
136 | * cycles where the read already set up the index register. | ||
137 | */ | ||
138 | static inline void io_apic_modify(unsigned int apic, unsigned int value) | ||
139 | { | ||
140 | *(IO_APIC_BASE(apic)+4) = value; | ||
141 | } | ||
142 | |||
143 | /* | ||
144 | * Synchronize the IO-APIC and the CPU by doing | ||
145 | * a dummy read from the IO-APIC | ||
146 | */ | ||
147 | static inline void io_apic_sync(unsigned int apic) | ||
148 | { | ||
149 | (void) *(IO_APIC_BASE(apic)+4); | ||
150 | } | ||
151 | |||
152 | /* 1 if "noapic" boot option passed */ | 118 | /* 1 if "noapic" boot option passed */ |
153 | extern int skip_ioapic_setup; | 119 | extern int skip_ioapic_setup; |
154 | 120 | ||