diff options
author | Krzysztof Helt <krzysztof.h1@wp.pl> | 2008-07-24 00:31:01 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-24 13:47:35 -0400 |
commit | 54f019e54244fef0ad927ce5501927d9033492de (patch) | |
tree | 805d47913db61c920352bbac436c1d8f0ddd94b7 | |
parent | 65e93e038c8a6eb65b6907d6aed22a8ff1029d3a (diff) |
tridentfb: fix hi-color modes for TGUI 9440
The TGUI 9440 requires doubling clock for 16bpp (hi-color) modes.
The patch also moves back enable_mmio() call to the right position.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r-- | drivers/video/tridentfb.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c index 26bc4d75d4fd..ed1b32a1cef5 100644 --- a/drivers/video/tridentfb.c +++ b/drivers/video/tridentfb.c | |||
@@ -835,6 +835,8 @@ static int tridentfb_check_var(struct fb_var_screeninfo *var, | |||
835 | /* check color depth */ | 835 | /* check color depth */ |
836 | if (bpp == 24) | 836 | if (bpp == 24) |
837 | bpp = var->bits_per_pixel = 32; | 837 | bpp = var->bits_per_pixel = 32; |
838 | if (par->chip_id == TGUI9440 && bpp == 32) | ||
839 | return -EINVAL; | ||
838 | /* check whether resolution fits on panel and in memory */ | 840 | /* check whether resolution fits on panel and in memory */ |
839 | if (par->flatpanel && nativex && var->xres > nativex) | 841 | if (par->flatpanel && nativex && var->xres > nativex) |
840 | return -EINVAL; | 842 | return -EINVAL; |
@@ -881,7 +883,7 @@ static int tridentfb_check_var(struct fb_var_screeninfo *var, | |||
881 | 883 | ||
882 | switch (par->chip_id) { | 884 | switch (par->chip_id) { |
883 | case TGUI9440: | 885 | case TGUI9440: |
884 | ramdac = 90000; | 886 | ramdac = (bpp >= 16) ? 45000 : 90000; |
885 | break; | 887 | break; |
886 | case CYBER9320: | 888 | case CYBER9320: |
887 | case TGUI9660: | 889 | case TGUI9660: |
@@ -1081,12 +1083,6 @@ static int tridentfb_set_par(struct fb_info *info) | |||
1081 | if (par->chip_id != TGUI9440) | 1083 | if (par->chip_id != TGUI9440) |
1082 | write3X4(par, PCIReg, read3X4(par, PCIReg) | 0x06); | 1084 | write3X4(par, PCIReg, read3X4(par, PCIReg) | 0x06); |
1083 | 1085 | ||
1084 | /* convert from picoseconds to kHz */ | ||
1085 | vclk = PICOS2KHZ(info->var.pixclock); | ||
1086 | if (bpp == 32) | ||
1087 | vclk *= 2; | ||
1088 | set_vclk(par, vclk); | ||
1089 | |||
1090 | vga_mm_wseq(par->io_virt, 0, 3); | 1086 | vga_mm_wseq(par->io_virt, 0, 3); |
1091 | vga_mm_wseq(par->io_virt, 1, 1); /* set char clock 8 dots wide */ | 1087 | vga_mm_wseq(par->io_virt, 1, 1); /* set char clock 8 dots wide */ |
1092 | /* enable 4 maps because needed in chain4 mode */ | 1088 | /* enable 4 maps because needed in chain4 mode */ |
@@ -1094,10 +1090,16 @@ static int tridentfb_set_par(struct fb_info *info) | |||
1094 | vga_mm_wseq(par->io_virt, 3, 0); | 1090 | vga_mm_wseq(par->io_virt, 3, 0); |
1095 | vga_mm_wseq(par->io_virt, 4, 0x0E); /* memory mode enable bitmaps ?? */ | 1091 | vga_mm_wseq(par->io_virt, 4, 0x0E); /* memory mode enable bitmaps ?? */ |
1096 | 1092 | ||
1093 | /* convert from picoseconds to kHz */ | ||
1094 | vclk = PICOS2KHZ(info->var.pixclock); | ||
1095 | |||
1097 | /* divide clock by 2 if 32bpp chain4 mode display and CPU path */ | 1096 | /* divide clock by 2 if 32bpp chain4 mode display and CPU path */ |
1098 | tmp = read3CE(par, MiscExtFunc) & 0xF0; | 1097 | tmp = read3CE(par, MiscExtFunc) & 0xF0; |
1099 | if (bpp == 32) | 1098 | if (bpp == 32 || (par->chip_id == TGUI9440 && bpp == 16)) { |
1100 | tmp |= 8; | 1099 | tmp |= 8; |
1100 | vclk *= 2; | ||
1101 | } | ||
1102 | set_vclk(par, vclk); | ||
1101 | write3CE(par, MiscExtFunc, tmp | 0x12); | 1103 | write3CE(par, MiscExtFunc, tmp | 0x12); |
1102 | write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */ | 1104 | write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */ |
1103 | write3CE(par, 0x6, 0x05); /* graphics mode */ | 1105 | write3CE(par, 0x6, 0x05); /* graphics mode */ |
@@ -1361,6 +1363,8 @@ static int __devinit trident_pci_probe(struct pci_dev *dev, | |||
1361 | tridentfb_fix.smem_start = pci_resource_start(dev, 0); | 1363 | tridentfb_fix.smem_start = pci_resource_start(dev, 0); |
1362 | tridentfb_fix.smem_len = get_memsize(default_par); | 1364 | tridentfb_fix.smem_len = get_memsize(default_par); |
1363 | 1365 | ||
1366 | enable_mmio(); | ||
1367 | |||
1364 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { | 1368 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { |
1365 | debug("request_mem_region failed!\n"); | 1369 | debug("request_mem_region failed!\n"); |
1366 | disable_mmio(info->par); | 1370 | disable_mmio(info->par); |
@@ -1368,8 +1372,6 @@ static int __devinit trident_pci_probe(struct pci_dev *dev, | |||
1368 | goto out_unmap1; | 1372 | goto out_unmap1; |
1369 | } | 1373 | } |
1370 | 1374 | ||
1371 | enable_mmio(); | ||
1372 | |||
1373 | info->screen_base = ioremap_nocache(tridentfb_fix.smem_start, | 1375 | info->screen_base = ioremap_nocache(tridentfb_fix.smem_start, |
1374 | tridentfb_fix.smem_len); | 1376 | tridentfb_fix.smem_len); |
1375 | 1377 | ||