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authorDave Airlie <airlied@redhat.com>2009-08-26 21:10:15 -0400
committerDave Airlie <airlied@redhat.com>2009-08-26 21:11:56 -0400
commit3f7dc91adef90a20f806282724c40d68d5b020aa (patch)
tree3deb339fd9c3cba79c293dc4aad2f1ecd2f0821f
parent52f97df5da1f94d2b7db1bb53a2f053ae162b649 (diff)
drm/rs600/690: use autogenerated safe register tables.
This ports rs690 to the safe reg tables and makes rs600 also use the same table. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat
-rw-r--r--drivers/gpu/drm/radeon/Makefile5
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h6
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/rs600728
-rw-r--r--drivers/gpu/drm/radeon/rs600.c9
-rw-r--r--drivers/gpu/drm/radeon/rs690.c65
5 files changed, 745 insertions, 68 deletions
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 8e1771889b4d..b2213a576a85 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -17,10 +17,15 @@ $(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable
17$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable 17$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
18 $(call if_changed,mkregtable) 18 $(call if_changed,mkregtable)
19 19
20$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
21 $(call if_changed,mkregtable)
22
20$(obj)/rv515.o: $(obj)/rv515_reg_safe.h 23$(obj)/rv515.o: $(obj)/rv515_reg_safe.h
21 24
22$(obj)/r300.o: $(obj)/r300_reg_safe.h 25$(obj)/r300.o: $(obj)/r300_reg_safe.h
23 26
27$(obj)/rs600.o: $(obj)/rs600_reg_safe.h
28
24radeon-$(CONFIG_DRM_RADEON_KMS) += radeon_device.o radeon_kms.o \ 29radeon-$(CONFIG_DRM_RADEON_KMS) += radeon_device.o radeon_kms.o \
25 radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \ 30 radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \
26 atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \ 31 atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 7ca6c13569b5..8ace15156c47 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -266,6 +266,7 @@ static struct radeon_asic rs400_asic = {
266/* 266/*
267 * rs600. 267 * rs600.
268 */ 268 */
269int rs600_init(struct radeon_device *rdev);
269void rs600_errata(struct radeon_device *rdev); 270void rs600_errata(struct radeon_device *rdev);
270void rs600_vram_info(struct radeon_device *rdev); 271void rs600_vram_info(struct radeon_device *rdev);
271int rs600_mc_init(struct radeon_device *rdev); 272int rs600_mc_init(struct radeon_device *rdev);
@@ -281,7 +282,7 @@ uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg);
281void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 282void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
282void rs600_bandwidth_update(struct radeon_device *rdev); 283void rs600_bandwidth_update(struct radeon_device *rdev);
283static struct radeon_asic rs600_asic = { 284static struct radeon_asic rs600_asic = {
284 .init = &r300_init, 285 .init = &rs600_init,
285 .errata = &rs600_errata, 286 .errata = &rs600_errata,
286 .vram_info = &rs600_vram_info, 287 .vram_info = &rs600_vram_info,
287 .gpu_reset = &r300_gpu_reset, 288 .gpu_reset = &r300_gpu_reset,
@@ -316,7 +317,6 @@ static struct radeon_asic rs600_asic = {
316/* 317/*
317 * rs690,rs740 318 * rs690,rs740
318 */ 319 */
319int rs690_init(struct radeon_device *rdev);
320void rs690_errata(struct radeon_device *rdev); 320void rs690_errata(struct radeon_device *rdev);
321void rs690_vram_info(struct radeon_device *rdev); 321void rs690_vram_info(struct radeon_device *rdev);
322int rs690_mc_init(struct radeon_device *rdev); 322int rs690_mc_init(struct radeon_device *rdev);
@@ -325,7 +325,7 @@ uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg);
325void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 325void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
326void rs690_bandwidth_update(struct radeon_device *rdev); 326void rs690_bandwidth_update(struct radeon_device *rdev);
327static struct radeon_asic rs690_asic = { 327static struct radeon_asic rs690_asic = {
328 .init = &rs690_init, 328 .init = &rs600_init,
329 .errata = &rs690_errata, 329 .errata = &rs690_errata,
330 .vram_info = &rs690_vram_info, 330 .vram_info = &rs690_vram_info,
331 .gpu_reset = &r300_gpu_reset, 331 .gpu_reset = &r300_gpu_reset,
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600
new file mode 100644
index 000000000000..498c581a328b
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/rs600
@@ -0,0 +1,728 @@
1rs600 0x6d40
20x1434 SRC_Y_X
30x1438 DST_Y_X
40x143C DST_HEIGHT_WIDTH
50x146C DP_GUI_MASTER_CNTL
60x1474 BRUSH_Y_X
70x1478 DP_BRUSH_BKGD_CLR
80x147C DP_BRUSH_FRGD_CLR
90x1480 BRUSH_DATA0
100x1484 BRUSH_DATA1
110x1598 DST_WIDTH_HEIGHT
120x15C0 CLR_CMP_CNTL
130x15C4 CLR_CMP_CLR_SRC
140x15C8 CLR_CMP_CLR_DST
150x15CC CLR_CMP_MSK
160x15D8 DP_SRC_FRGD_CLR
170x15DC DP_SRC_BKGD_CLR
180x1600 DST_LINE_START
190x1604 DST_LINE_END
200x1608 DST_LINE_PATCOUNT
210x16C0 DP_CNTL
220x16CC DP_WRITE_MSK
230x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
240x16E8 DEFAULT_SC_BOTTOM_RIGHT
250x16EC SC_TOP_LEFT
260x16F0 SC_BOTTOM_RIGHT
270x16F4 SRC_SC_BOTTOM_RIGHT
280x1714 DSTCACHE_CTLSTAT
290x1720 WAIT_UNTIL
300x172C RBBM_GUICNTL
310x1D98 VAP_VPORT_XSCALE
320x1D9C VAP_VPORT_XOFFSET
330x1DA0 VAP_VPORT_YSCALE
340x1DA4 VAP_VPORT_YOFFSET
350x1DA8 VAP_VPORT_ZSCALE
360x1DAC VAP_VPORT_ZOFFSET
370x2080 VAP_CNTL
380x2090 VAP_OUT_VTX_FMT_0
390x2094 VAP_OUT_VTX_FMT_1
400x20B0 VAP_VTE_CNTL
410x2138 VAP_VF_MIN_VTX_INDX
420x2140 VAP_CNTL_STATUS
430x2150 VAP_PROG_STREAM_CNTL_0
440x2154 VAP_PROG_STREAM_CNTL_1
450x2158 VAP_PROG_STREAM_CNTL_2
460x215C VAP_PROG_STREAM_CNTL_3
470x2160 VAP_PROG_STREAM_CNTL_4
480x2164 VAP_PROG_STREAM_CNTL_5
490x2168 VAP_PROG_STREAM_CNTL_6
500x216C VAP_PROG_STREAM_CNTL_7
510x2180 VAP_VTX_STATE_CNTL
520x2184 VAP_VSM_VTX_ASSM
530x2188 VAP_VTX_STATE_IND_REG_0
540x218C VAP_VTX_STATE_IND_REG_1
550x2190 VAP_VTX_STATE_IND_REG_2
560x2194 VAP_VTX_STATE_IND_REG_3
570x2198 VAP_VTX_STATE_IND_REG_4
580x219C VAP_VTX_STATE_IND_REG_5
590x21A0 VAP_VTX_STATE_IND_REG_6
600x21A4 VAP_VTX_STATE_IND_REG_7
610x21A8 VAP_VTX_STATE_IND_REG_8
620x21AC VAP_VTX_STATE_IND_REG_9
630x21B0 VAP_VTX_STATE_IND_REG_10
640x21B4 VAP_VTX_STATE_IND_REG_11
650x21B8 VAP_VTX_STATE_IND_REG_12
660x21BC VAP_VTX_STATE_IND_REG_13
670x21C0 VAP_VTX_STATE_IND_REG_14
680x21C4 VAP_VTX_STATE_IND_REG_15
690x21DC VAP_PSC_SGN_NORM_CNTL
700x21E0 VAP_PROG_STREAM_CNTL_EXT_0
710x21E4 VAP_PROG_STREAM_CNTL_EXT_1
720x21E8 VAP_PROG_STREAM_CNTL_EXT_2
730x21EC VAP_PROG_STREAM_CNTL_EXT_3
740x21F0 VAP_PROG_STREAM_CNTL_EXT_4
750x21F4 VAP_PROG_STREAM_CNTL_EXT_5
760x21F8 VAP_PROG_STREAM_CNTL_EXT_6
770x21FC VAP_PROG_STREAM_CNTL_EXT_7
780x2200 VAP_PVS_VECTOR_INDX_REG
790x2204 VAP_PVS_VECTOR_DATA_REG
800x2208 VAP_PVS_VECTOR_DATA_REG_128
810x221C VAP_CLIP_CNTL
820x2220 VAP_GB_VERT_CLIP_ADJ
830x2224 VAP_GB_VERT_DISC_ADJ
840x2228 VAP_GB_HORZ_CLIP_ADJ
850x222C VAP_GB_HORZ_DISC_ADJ
860x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
870x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
880x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
890x223C VAP_PVS_FLOW_CNTL_ADDRS_3
900x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
910x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
920x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
930x224C VAP_PVS_FLOW_CNTL_ADDRS_7
940x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
950x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
960x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
970x225C VAP_PVS_FLOW_CNTL_ADDRS_11
980x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
990x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
1000x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
1010x226C VAP_PVS_FLOW_CNTL_ADDRS_15
1020x2284 VAP_PVS_STATE_FLUSH_REG
1030x2288 VAP_PVS_VTX_TIMEOUT_REG
1040x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
1050x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
1060x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
1070x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
1080x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
1090x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
1100x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
1110x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
1120x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
1130x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
1140x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
1150x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
1160x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
1170x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
1180x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
1190x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
1200x22D0 VAP_PVS_CODE_CNTL_0
1210x22D4 VAP_PVS_CONST_CNTL
1220x22D8 VAP_PVS_CODE_CNTL_1
1230x22DC VAP_PVS_FLOW_CNTL_OPC
1240x342C RB2D_DSTCACHE_CTLSTAT
1250x4000 GB_VAP_RASTER_VTX_FMT_0
1260x4004 GB_VAP_RASTER_VTX_FMT_1
1270x4008 GB_ENABLE
1280x401C GB_SELECT
1290x4020 GB_AA_CONFIG
1300x4024 GB_FIFO_SIZE
1310x4100 TX_INVALTAGS
1320x4200 GA_POINT_S0
1330x4204 GA_POINT_T0
1340x4208 GA_POINT_S1
1350x420C GA_POINT_T1
1360x4214 GA_TRIANGLE_STIPPLE
1370x421C GA_POINT_SIZE
1380x4230 GA_POINT_MINMAX
1390x4234 GA_LINE_CNTL
1400x4238 GA_LINE_STIPPLE_CONFIG
1410x4260 GA_LINE_STIPPLE_VALUE
1420x4264 GA_LINE_S0
1430x4268 GA_LINE_S1
1440x4278 GA_COLOR_CONTROL
1450x427C GA_SOLID_RG
1460x4280 GA_SOLID_BA
1470x4288 GA_POLY_MODE
1480x428C GA_ROUND_MODE
1490x4290 GA_OFFSET
1500x4294 GA_FOG_SCALE
1510x4298 GA_FOG_OFFSET
1520x42A0 SU_TEX_WRAP
1530x42A4 SU_POLY_OFFSET_FRONT_SCALE
1540x42A8 SU_POLY_OFFSET_FRONT_OFFSET
1550x42AC SU_POLY_OFFSET_BACK_SCALE
1560x42B0 SU_POLY_OFFSET_BACK_OFFSET
1570x42B4 SU_POLY_OFFSET_ENABLE
1580x42B8 SU_CULL_MODE
1590x42C0 SU_DEPTH_SCALE
1600x42C4 SU_DEPTH_OFFSET
1610x42C8 SU_REG_DEST
1620x4300 RS_COUNT
1630x4304 RS_INST_COUNT
1640x4310 RS_IP_0
1650x4314 RS_IP_1
1660x4318 RS_IP_2
1670x431C RS_IP_3
1680x4320 RS_IP_4
1690x4324 RS_IP_5
1700x4328 RS_IP_6
1710x432C RS_IP_7
1720x4330 RS_INST_0
1730x4334 RS_INST_1
1740x4338 RS_INST_2
1750x433C RS_INST_3
1760x4340 RS_INST_4
1770x4344 RS_INST_5
1780x4348 RS_INST_6
1790x434C RS_INST_7
1800x4350 RS_INST_8
1810x4354 RS_INST_9
1820x4358 RS_INST_10
1830x435C RS_INST_11
1840x4360 RS_INST_12
1850x4364 RS_INST_13
1860x4368 RS_INST_14
1870x436C RS_INST_15
1880x43A4 SC_HYPERZ_EN
1890x43A8 SC_EDGERULE
1900x43B0 SC_CLIP_0_A
1910x43B4 SC_CLIP_0_B
1920x43B8 SC_CLIP_1_A
1930x43BC SC_CLIP_1_B
1940x43C0 SC_CLIP_2_A
1950x43C4 SC_CLIP_2_B
1960x43C8 SC_CLIP_3_A
1970x43CC SC_CLIP_3_B
1980x43D0 SC_CLIP_RULE
1990x43E0 SC_SCISSOR0
2000x43E8 SC_SCREENDOOR
2010x4440 TX_FILTER1_0
2020x4444 TX_FILTER1_1
2030x4448 TX_FILTER1_2
2040x444C TX_FILTER1_3
2050x4450 TX_FILTER1_4
2060x4454 TX_FILTER1_5
2070x4458 TX_FILTER1_6
2080x445C TX_FILTER1_7
2090x4460 TX_FILTER1_8
2100x4464 TX_FILTER1_9
2110x4468 TX_FILTER1_10
2120x446C TX_FILTER1_11
2130x4470 TX_FILTER1_12
2140x4474 TX_FILTER1_13
2150x4478 TX_FILTER1_14
2160x447C TX_FILTER1_15
2170x4580 TX_CHROMA_KEY_0
2180x4584 TX_CHROMA_KEY_1
2190x4588 TX_CHROMA_KEY_2
2200x458C TX_CHROMA_KEY_3
2210x4590 TX_CHROMA_KEY_4
2220x4594 TX_CHROMA_KEY_5
2230x4598 TX_CHROMA_KEY_6
2240x459C TX_CHROMA_KEY_7
2250x45A0 TX_CHROMA_KEY_8
2260x45A4 TX_CHROMA_KEY_9
2270x45A8 TX_CHROMA_KEY_10
2280x45AC TX_CHROMA_KEY_11
2290x45B0 TX_CHROMA_KEY_12
2300x45B4 TX_CHROMA_KEY_13
2310x45B8 TX_CHROMA_KEY_14
2320x45BC TX_CHROMA_KEY_15
2330x45C0 TX_BORDER_COLOR_0
2340x45C4 TX_BORDER_COLOR_1
2350x45C8 TX_BORDER_COLOR_2
2360x45CC TX_BORDER_COLOR_3
2370x45D0 TX_BORDER_COLOR_4
2380x45D4 TX_BORDER_COLOR_5
2390x45D8 TX_BORDER_COLOR_6
2400x45DC TX_BORDER_COLOR_7
2410x45E0 TX_BORDER_COLOR_8
2420x45E4 TX_BORDER_COLOR_9
2430x45E8 TX_BORDER_COLOR_10
2440x45EC TX_BORDER_COLOR_11
2450x45F0 TX_BORDER_COLOR_12
2460x45F4 TX_BORDER_COLOR_13
2470x45F8 TX_BORDER_COLOR_14
2480x45FC TX_BORDER_COLOR_15
2490x4600 US_CONFIG
2500x4604 US_PIXSIZE
2510x4608 US_CODE_OFFSET
2520x460C US_RESET
2530x4610 US_CODE_ADDR_0
2540x4614 US_CODE_ADDR_1
2550x4618 US_CODE_ADDR_2
2560x461C US_CODE_ADDR_3
2570x4620 US_TEX_INST_0
2580x4624 US_TEX_INST_1
2590x4628 US_TEX_INST_2
2600x462C US_TEX_INST_3
2610x4630 US_TEX_INST_4
2620x4634 US_TEX_INST_5
2630x4638 US_TEX_INST_6
2640x463C US_TEX_INST_7
2650x4640 US_TEX_INST_8
2660x4644 US_TEX_INST_9
2670x4648 US_TEX_INST_10
2680x464C US_TEX_INST_11
2690x4650 US_TEX_INST_12
2700x4654 US_TEX_INST_13
2710x4658 US_TEX_INST_14
2720x465C US_TEX_INST_15
2730x4660 US_TEX_INST_16
2740x4664 US_TEX_INST_17
2750x4668 US_TEX_INST_18
2760x466C US_TEX_INST_19
2770x4670 US_TEX_INST_20
2780x4674 US_TEX_INST_21
2790x4678 US_TEX_INST_22
2800x467C US_TEX_INST_23
2810x4680 US_TEX_INST_24
2820x4684 US_TEX_INST_25
2830x4688 US_TEX_INST_26
2840x468C US_TEX_INST_27
2850x4690 US_TEX_INST_28
2860x4694 US_TEX_INST_29
2870x4698 US_TEX_INST_30
2880x469C US_TEX_INST_31
2890x46A4 US_OUT_FMT_0
2900x46A8 US_OUT_FMT_1
2910x46AC US_OUT_FMT_2
2920x46B0 US_OUT_FMT_3
2930x46B4 US_W_FMT
2940x46C0 US_ALU_RGB_ADDR_0
2950x46C4 US_ALU_RGB_ADDR_1
2960x46C8 US_ALU_RGB_ADDR_2
2970x46CC US_ALU_RGB_ADDR_3
2980x46D0 US_ALU_RGB_ADDR_4
2990x46D4 US_ALU_RGB_ADDR_5
3000x46D8 US_ALU_RGB_ADDR_6
3010x46DC US_ALU_RGB_ADDR_7
3020x46E0 US_ALU_RGB_ADDR_8
3030x46E4 US_ALU_RGB_ADDR_9
3040x46E8 US_ALU_RGB_ADDR_10
3050x46EC US_ALU_RGB_ADDR_11
3060x46F0 US_ALU_RGB_ADDR_12
3070x46F4 US_ALU_RGB_ADDR_13
3080x46F8 US_ALU_RGB_ADDR_14
3090x46FC US_ALU_RGB_ADDR_15
3100x4700 US_ALU_RGB_ADDR_16
3110x4704 US_ALU_RGB_ADDR_17
3120x4708 US_ALU_RGB_ADDR_18
3130x470C US_ALU_RGB_ADDR_19
3140x4710 US_ALU_RGB_ADDR_20
3150x4714 US_ALU_RGB_ADDR_21
3160x4718 US_ALU_RGB_ADDR_22
3170x471C US_ALU_RGB_ADDR_23
3180x4720 US_ALU_RGB_ADDR_24
3190x4724 US_ALU_RGB_ADDR_25
3200x4728 US_ALU_RGB_ADDR_26
3210x472C US_ALU_RGB_ADDR_27
3220x4730 US_ALU_RGB_ADDR_28
3230x4734 US_ALU_RGB_ADDR_29
3240x4738 US_ALU_RGB_ADDR_30
3250x473C US_ALU_RGB_ADDR_31
3260x4740 US_ALU_RGB_ADDR_32
3270x4744 US_ALU_RGB_ADDR_33
3280x4748 US_ALU_RGB_ADDR_34
3290x474C US_ALU_RGB_ADDR_35
3300x4750 US_ALU_RGB_ADDR_36
3310x4754 US_ALU_RGB_ADDR_37
3320x4758 US_ALU_RGB_ADDR_38
3330x475C US_ALU_RGB_ADDR_39
3340x4760 US_ALU_RGB_ADDR_40
3350x4764 US_ALU_RGB_ADDR_41
3360x4768 US_ALU_RGB_ADDR_42
3370x476C US_ALU_RGB_ADDR_43
3380x4770 US_ALU_RGB_ADDR_44
3390x4774 US_ALU_RGB_ADDR_45
3400x4778 US_ALU_RGB_ADDR_46
3410x477C US_ALU_RGB_ADDR_47
3420x4780 US_ALU_RGB_ADDR_48
3430x4784 US_ALU_RGB_ADDR_49
3440x4788 US_ALU_RGB_ADDR_50
3450x478C US_ALU_RGB_ADDR_51
3460x4790 US_ALU_RGB_ADDR_52
3470x4794 US_ALU_RGB_ADDR_53
3480x4798 US_ALU_RGB_ADDR_54
3490x479C US_ALU_RGB_ADDR_55
3500x47A0 US_ALU_RGB_ADDR_56
3510x47A4 US_ALU_RGB_ADDR_57
3520x47A8 US_ALU_RGB_ADDR_58
3530x47AC US_ALU_RGB_ADDR_59
3540x47B0 US_ALU_RGB_ADDR_60
3550x47B4 US_ALU_RGB_ADDR_61
3560x47B8 US_ALU_RGB_ADDR_62
3570x47BC US_ALU_RGB_ADDR_63
3580x47C0 US_ALU_ALPHA_ADDR_0
3590x47C4 US_ALU_ALPHA_ADDR_1
3600x47C8 US_ALU_ALPHA_ADDR_2
3610x47CC US_ALU_ALPHA_ADDR_3
3620x47D0 US_ALU_ALPHA_ADDR_4
3630x47D4 US_ALU_ALPHA_ADDR_5
3640x47D8 US_ALU_ALPHA_ADDR_6
3650x47DC US_ALU_ALPHA_ADDR_7
3660x47E0 US_ALU_ALPHA_ADDR_8
3670x47E4 US_ALU_ALPHA_ADDR_9
3680x47E8 US_ALU_ALPHA_ADDR_10
3690x47EC US_ALU_ALPHA_ADDR_11
3700x47F0 US_ALU_ALPHA_ADDR_12
3710x47F4 US_ALU_ALPHA_ADDR_13
3720x47F8 US_ALU_ALPHA_ADDR_14
3730x47FC US_ALU_ALPHA_ADDR_15
3740x4800 US_ALU_ALPHA_ADDR_16
3750x4804 US_ALU_ALPHA_ADDR_17
3760x4808 US_ALU_ALPHA_ADDR_18
3770x480C US_ALU_ALPHA_ADDR_19
3780x4810 US_ALU_ALPHA_ADDR_20
3790x4814 US_ALU_ALPHA_ADDR_21
3800x4818 US_ALU_ALPHA_ADDR_22
3810x481C US_ALU_ALPHA_ADDR_23
3820x4820 US_ALU_ALPHA_ADDR_24
3830x4824 US_ALU_ALPHA_ADDR_25
3840x4828 US_ALU_ALPHA_ADDR_26
3850x482C US_ALU_ALPHA_ADDR_27
3860x4830 US_ALU_ALPHA_ADDR_28
3870x4834 US_ALU_ALPHA_ADDR_29
3880x4838 US_ALU_ALPHA_ADDR_30
3890x483C US_ALU_ALPHA_ADDR_31
3900x4840 US_ALU_ALPHA_ADDR_32
3910x4844 US_ALU_ALPHA_ADDR_33
3920x4848 US_ALU_ALPHA_ADDR_34
3930x484C US_ALU_ALPHA_ADDR_35
3940x4850 US_ALU_ALPHA_ADDR_36
3950x4854 US_ALU_ALPHA_ADDR_37
3960x4858 US_ALU_ALPHA_ADDR_38
3970x485C US_ALU_ALPHA_ADDR_39
3980x4860 US_ALU_ALPHA_ADDR_40
3990x4864 US_ALU_ALPHA_ADDR_41
4000x4868 US_ALU_ALPHA_ADDR_42
4010x486C US_ALU_ALPHA_ADDR_43
4020x4870 US_ALU_ALPHA_ADDR_44
4030x4874 US_ALU_ALPHA_ADDR_45
4040x4878 US_ALU_ALPHA_ADDR_46
4050x487C US_ALU_ALPHA_ADDR_47
4060x4880 US_ALU_ALPHA_ADDR_48
4070x4884 US_ALU_ALPHA_ADDR_49
4080x4888 US_ALU_ALPHA_ADDR_50
4090x488C US_ALU_ALPHA_ADDR_51
4100x4890 US_ALU_ALPHA_ADDR_52
4110x4894 US_ALU_ALPHA_ADDR_53
4120x4898 US_ALU_ALPHA_ADDR_54
4130x489C US_ALU_ALPHA_ADDR_55
4140x48A0 US_ALU_ALPHA_ADDR_56
4150x48A4 US_ALU_ALPHA_ADDR_57
4160x48A8 US_ALU_ALPHA_ADDR_58
4170x48AC US_ALU_ALPHA_ADDR_59
4180x48B0 US_ALU_ALPHA_ADDR_60
4190x48B4 US_ALU_ALPHA_ADDR_61
4200x48B8 US_ALU_ALPHA_ADDR_62
4210x48BC US_ALU_ALPHA_ADDR_63
4220x48C0 US_ALU_RGB_INST_0
4230x48C4 US_ALU_RGB_INST_1
4240x48C8 US_ALU_RGB_INST_2
4250x48CC US_ALU_RGB_INST_3
4260x48D0 US_ALU_RGB_INST_4
4270x48D4 US_ALU_RGB_INST_5
4280x48D8 US_ALU_RGB_INST_6
4290x48DC US_ALU_RGB_INST_7
4300x48E0 US_ALU_RGB_INST_8
4310x48E4 US_ALU_RGB_INST_9
4320x48E8 US_ALU_RGB_INST_10
4330x48EC US_ALU_RGB_INST_11
4340x48F0 US_ALU_RGB_INST_12
4350x48F4 US_ALU_RGB_INST_13
4360x48F8 US_ALU_RGB_INST_14
4370x48FC US_ALU_RGB_INST_15
4380x4900 US_ALU_RGB_INST_16
4390x4904 US_ALU_RGB_INST_17
4400x4908 US_ALU_RGB_INST_18
4410x490C US_ALU_RGB_INST_19
4420x4910 US_ALU_RGB_INST_20
4430x4914 US_ALU_RGB_INST_21
4440x4918 US_ALU_RGB_INST_22
4450x491C US_ALU_RGB_INST_23
4460x4920 US_ALU_RGB_INST_24
4470x4924 US_ALU_RGB_INST_25
4480x4928 US_ALU_RGB_INST_26
4490x492C US_ALU_RGB_INST_27
4500x4930 US_ALU_RGB_INST_28
4510x4934 US_ALU_RGB_INST_29
4520x4938 US_ALU_RGB_INST_30
4530x493C US_ALU_RGB_INST_31
4540x4940 US_ALU_RGB_INST_32
4550x4944 US_ALU_RGB_INST_33
4560x4948 US_ALU_RGB_INST_34
4570x494C US_ALU_RGB_INST_35
4580x4950 US_ALU_RGB_INST_36
4590x4954 US_ALU_RGB_INST_37
4600x4958 US_ALU_RGB_INST_38
4610x495C US_ALU_RGB_INST_39
4620x4960 US_ALU_RGB_INST_40
4630x4964 US_ALU_RGB_INST_41
4640x4968 US_ALU_RGB_INST_42
4650x496C US_ALU_RGB_INST_43
4660x4970 US_ALU_RGB_INST_44
4670x4974 US_ALU_RGB_INST_45
4680x4978 US_ALU_RGB_INST_46
4690x497C US_ALU_RGB_INST_47
4700x4980 US_ALU_RGB_INST_48
4710x4984 US_ALU_RGB_INST_49
4720x4988 US_ALU_RGB_INST_50
4730x498C US_ALU_RGB_INST_51
4740x4990 US_ALU_RGB_INST_52
4750x4994 US_ALU_RGB_INST_53
4760x4998 US_ALU_RGB_INST_54
4770x499C US_ALU_RGB_INST_55
4780x49A0 US_ALU_RGB_INST_56
4790x49A4 US_ALU_RGB_INST_57
4800x49A8 US_ALU_RGB_INST_58
4810x49AC US_ALU_RGB_INST_59
4820x49B0 US_ALU_RGB_INST_60
4830x49B4 US_ALU_RGB_INST_61
4840x49B8 US_ALU_RGB_INST_62
4850x49BC US_ALU_RGB_INST_63
4860x49C0 US_ALU_ALPHA_INST_0
4870x49C4 US_ALU_ALPHA_INST_1
4880x49C8 US_ALU_ALPHA_INST_2
4890x49CC US_ALU_ALPHA_INST_3
4900x49D0 US_ALU_ALPHA_INST_4
4910x49D4 US_ALU_ALPHA_INST_5
4920x49D8 US_ALU_ALPHA_INST_6
4930x49DC US_ALU_ALPHA_INST_7
4940x49E0 US_ALU_ALPHA_INST_8
4950x49E4 US_ALU_ALPHA_INST_9
4960x49E8 US_ALU_ALPHA_INST_10
4970x49EC US_ALU_ALPHA_INST_11
4980x49F0 US_ALU_ALPHA_INST_12
4990x49F4 US_ALU_ALPHA_INST_13
5000x49F8 US_ALU_ALPHA_INST_14
5010x49FC US_ALU_ALPHA_INST_15
5020x4A00 US_ALU_ALPHA_INST_16
5030x4A04 US_ALU_ALPHA_INST_17
5040x4A08 US_ALU_ALPHA_INST_18
5050x4A0C US_ALU_ALPHA_INST_19
5060x4A10 US_ALU_ALPHA_INST_20
5070x4A14 US_ALU_ALPHA_INST_21
5080x4A18 US_ALU_ALPHA_INST_22
5090x4A1C US_ALU_ALPHA_INST_23
5100x4A20 US_ALU_ALPHA_INST_24
5110x4A24 US_ALU_ALPHA_INST_25
5120x4A28 US_ALU_ALPHA_INST_26
5130x4A2C US_ALU_ALPHA_INST_27
5140x4A30 US_ALU_ALPHA_INST_28
5150x4A34 US_ALU_ALPHA_INST_29
5160x4A38 US_ALU_ALPHA_INST_30
5170x4A3C US_ALU_ALPHA_INST_31
5180x4A40 US_ALU_ALPHA_INST_32
5190x4A44 US_ALU_ALPHA_INST_33
5200x4A48 US_ALU_ALPHA_INST_34
5210x4A4C US_ALU_ALPHA_INST_35
5220x4A50 US_ALU_ALPHA_INST_36
5230x4A54 US_ALU_ALPHA_INST_37
5240x4A58 US_ALU_ALPHA_INST_38
5250x4A5C US_ALU_ALPHA_INST_39
5260x4A60 US_ALU_ALPHA_INST_40
5270x4A64 US_ALU_ALPHA_INST_41
5280x4A68 US_ALU_ALPHA_INST_42
5290x4A6C US_ALU_ALPHA_INST_43
5300x4A70 US_ALU_ALPHA_INST_44
5310x4A74 US_ALU_ALPHA_INST_45
5320x4A78 US_ALU_ALPHA_INST_46
5330x4A7C US_ALU_ALPHA_INST_47
5340x4A80 US_ALU_ALPHA_INST_48
5350x4A84 US_ALU_ALPHA_INST_49
5360x4A88 US_ALU_ALPHA_INST_50
5370x4A8C US_ALU_ALPHA_INST_51
5380x4A90 US_ALU_ALPHA_INST_52
5390x4A94 US_ALU_ALPHA_INST_53
5400x4A98 US_ALU_ALPHA_INST_54
5410x4A9C US_ALU_ALPHA_INST_55
5420x4AA0 US_ALU_ALPHA_INST_56
5430x4AA4 US_ALU_ALPHA_INST_57
5440x4AA8 US_ALU_ALPHA_INST_58
5450x4AAC US_ALU_ALPHA_INST_59
5460x4AB0 US_ALU_ALPHA_INST_60
5470x4AB4 US_ALU_ALPHA_INST_61
5480x4AB8 US_ALU_ALPHA_INST_62
5490x4ABC US_ALU_ALPHA_INST_63
5500x4BC0 FG_FOG_BLEND
5510x4BC4 FG_FOG_FACTOR
5520x4BC8 FG_FOG_COLOR_R
5530x4BCC FG_FOG_COLOR_G
5540x4BD0 FG_FOG_COLOR_B
5550x4BD4 FG_ALPHA_FUNC
5560x4BD8 FG_DEPTH_SRC
5570x4C00 US_ALU_CONST_R_0
5580x4C04 US_ALU_CONST_G_0
5590x4C08 US_ALU_CONST_B_0
5600x4C0C US_ALU_CONST_A_0
5610x4C10 US_ALU_CONST_R_1
5620x4C14 US_ALU_CONST_G_1
5630x4C18 US_ALU_CONST_B_1
5640x4C1C US_ALU_CONST_A_1
5650x4C20 US_ALU_CONST_R_2
5660x4C24 US_ALU_CONST_G_2
5670x4C28 US_ALU_CONST_B_2
5680x4C2C US_ALU_CONST_A_2
5690x4C30 US_ALU_CONST_R_3
5700x4C34 US_ALU_CONST_G_3
5710x4C38 US_ALU_CONST_B_3
5720x4C3C US_ALU_CONST_A_3
5730x4C40 US_ALU_CONST_R_4
5740x4C44 US_ALU_CONST_G_4
5750x4C48 US_ALU_CONST_B_4
5760x4C4C US_ALU_CONST_A_4
5770x4C50 US_ALU_CONST_R_5
5780x4C54 US_ALU_CONST_G_5
5790x4C58 US_ALU_CONST_B_5
5800x4C5C US_ALU_CONST_A_5
5810x4C60 US_ALU_CONST_R_6
5820x4C64 US_ALU_CONST_G_6
5830x4C68 US_ALU_CONST_B_6
5840x4C6C US_ALU_CONST_A_6
5850x4C70 US_ALU_CONST_R_7
5860x4C74 US_ALU_CONST_G_7
5870x4C78 US_ALU_CONST_B_7
5880x4C7C US_ALU_CONST_A_7
5890x4C80 US_ALU_CONST_R_8
5900x4C84 US_ALU_CONST_G_8
5910x4C88 US_ALU_CONST_B_8
5920x4C8C US_ALU_CONST_A_8
5930x4C90 US_ALU_CONST_R_9
5940x4C94 US_ALU_CONST_G_9
5950x4C98 US_ALU_CONST_B_9
5960x4C9C US_ALU_CONST_A_9
5970x4CA0 US_ALU_CONST_R_10
5980x4CA4 US_ALU_CONST_G_10
5990x4CA8 US_ALU_CONST_B_10
6000x4CAC US_ALU_CONST_A_10
6010x4CB0 US_ALU_CONST_R_11
6020x4CB4 US_ALU_CONST_G_11
6030x4CB8 US_ALU_CONST_B_11
6040x4CBC US_ALU_CONST_A_11
6050x4CC0 US_ALU_CONST_R_12
6060x4CC4 US_ALU_CONST_G_12
6070x4CC8 US_ALU_CONST_B_12
6080x4CCC US_ALU_CONST_A_12
6090x4CD0 US_ALU_CONST_R_13
6100x4CD4 US_ALU_CONST_G_13
6110x4CD8 US_ALU_CONST_B_13
6120x4CDC US_ALU_CONST_A_13
6130x4CE0 US_ALU_CONST_R_14
6140x4CE4 US_ALU_CONST_G_14
6150x4CE8 US_ALU_CONST_B_14
6160x4CEC US_ALU_CONST_A_14
6170x4CF0 US_ALU_CONST_R_15
6180x4CF4 US_ALU_CONST_G_15
6190x4CF8 US_ALU_CONST_B_15
6200x4CFC US_ALU_CONST_A_15
6210x4D00 US_ALU_CONST_R_16
6220x4D04 US_ALU_CONST_G_16
6230x4D08 US_ALU_CONST_B_16
6240x4D0C US_ALU_CONST_A_16
6250x4D10 US_ALU_CONST_R_17
6260x4D14 US_ALU_CONST_G_17
6270x4D18 US_ALU_CONST_B_17
6280x4D1C US_ALU_CONST_A_17
6290x4D20 US_ALU_CONST_R_18
6300x4D24 US_ALU_CONST_G_18
6310x4D28 US_ALU_CONST_B_18
6320x4D2C US_ALU_CONST_A_18
6330x4D30 US_ALU_CONST_R_19
6340x4D34 US_ALU_CONST_G_19
6350x4D38 US_ALU_CONST_B_19
6360x4D3C US_ALU_CONST_A_19
6370x4D40 US_ALU_CONST_R_20
6380x4D44 US_ALU_CONST_G_20
6390x4D48 US_ALU_CONST_B_20
6400x4D4C US_ALU_CONST_A_20
6410x4D50 US_ALU_CONST_R_21
6420x4D54 US_ALU_CONST_G_21
6430x4D58 US_ALU_CONST_B_21
6440x4D5C US_ALU_CONST_A_21
6450x4D60 US_ALU_CONST_R_22
6460x4D64 US_ALU_CONST_G_22
6470x4D68 US_ALU_CONST_B_22
6480x4D6C US_ALU_CONST_A_22
6490x4D70 US_ALU_CONST_R_23
6500x4D74 US_ALU_CONST_G_23
6510x4D78 US_ALU_CONST_B_23
6520x4D7C US_ALU_CONST_A_23
6530x4D80 US_ALU_CONST_R_24
6540x4D84 US_ALU_CONST_G_24
6550x4D88 US_ALU_CONST_B_24
6560x4D8C US_ALU_CONST_A_24
6570x4D90 US_ALU_CONST_R_25
6580x4D94 US_ALU_CONST_G_25
6590x4D98 US_ALU_CONST_B_25
6600x4D9C US_ALU_CONST_A_25
6610x4DA0 US_ALU_CONST_R_26
6620x4DA4 US_ALU_CONST_G_26
6630x4DA8 US_ALU_CONST_B_26
6640x4DAC US_ALU_CONST_A_26
6650x4DB0 US_ALU_CONST_R_27
6660x4DB4 US_ALU_CONST_G_27
6670x4DB8 US_ALU_CONST_B_27
6680x4DBC US_ALU_CONST_A_27
6690x4DC0 US_ALU_CONST_R_28
6700x4DC4 US_ALU_CONST_G_28
6710x4DC8 US_ALU_CONST_B_28
6720x4DCC US_ALU_CONST_A_28
6730x4DD0 US_ALU_CONST_R_29
6740x4DD4 US_ALU_CONST_G_29
6750x4DD8 US_ALU_CONST_B_29
6760x4DDC US_ALU_CONST_A_29
6770x4DE0 US_ALU_CONST_R_30
6780x4DE4 US_ALU_CONST_G_30
6790x4DE8 US_ALU_CONST_B_30
6800x4DEC US_ALU_CONST_A_30
6810x4DF0 US_ALU_CONST_R_31
6820x4DF4 US_ALU_CONST_G_31
6830x4DF8 US_ALU_CONST_B_31
6840x4DFC US_ALU_CONST_A_31
6850x4E04 RB3D_BLENDCNTL_R3
6860x4E08 RB3D_ABLENDCNTL_R3
6870x4E0C RB3D_COLOR_CHANNEL_MASK
6880x4E10 RB3D_CONSTANT_COLOR
6890x4E14 RB3D_COLOR_CLEAR_VALUE
6900x4E18 RB3D_ROPCNTL_R3
6910x4E1C RB3D_CLRCMP_FLIPE_R3
6920x4E20 RB3D_CLRCMP_CLR_R3
6930x4E24 RB3D_CLRCMP_MSK_R3
6940x4E48 RB3D_DEBUG_CTL
6950x4E4C RB3D_DSTCACHE_CTLSTAT_R3
6960x4E50 RB3D_DITHER_CTL
6970x4E54 RB3D_CMASK_OFFSET0
6980x4E58 RB3D_CMASK_OFFSET1
6990x4E5C RB3D_CMASK_OFFSET2
7000x4E60 RB3D_CMASK_OFFSET3
7010x4E64 RB3D_CMASK_PITCH0
7020x4E68 RB3D_CMASK_PITCH1
7030x4E6C RB3D_CMASK_PITCH2
7040x4E70 RB3D_CMASK_PITCH3
7050x4E74 RB3D_CMASK_WRINDEX
7060x4E78 RB3D_CMASK_DWORD
7070x4E7C RB3D_CMASK_RDINDEX
7080x4E80 RB3D_AARESOLVE_OFFSET
7090x4E84 RB3D_AARESOLVE_PITCH
7100x4E88 RB3D_AARESOLVE_CTL
7110x4F04 ZB_ZSTENCILCNTL
7120x4F08 ZB_STENCILREFMASK
7130x4F14 ZB_ZTOP
7140x4F18 ZB_ZCACHE_CTLSTAT
7150x4F1C ZB_BW_CNTL
7160x4F28 ZB_DEPTHCLEARVALUE
7170x4F30 ZB_ZMASK_OFFSET
7180x4F34 ZB_ZMASK_PITCH
7190x4F38 ZB_ZMASK_WRINDEX
7200x4F3C ZB_ZMASK_DWORD
7210x4F40 ZB_ZMASK_RDINDEX
7220x4F44 ZB_HIZ_OFFSET
7230x4F48 ZB_HIZ_WRINDEX
7240x4F4C ZB_HIZ_DWORD
7250x4F50 ZB_HIZ_RDINDEX
7260x4F54 ZB_HIZ_PITCH
7270x4F58 ZB_ZPASS_DATA
7280x4F60 ZB_DEPTHXY_OFFSET
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 7e8ce983a908..1b8d62f5e73c 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -29,6 +29,8 @@
29#include "radeon_reg.h" 29#include "radeon_reg.h"
30#include "radeon.h" 30#include "radeon.h"
31 31
32#include "rs600_reg_safe.h"
33
32/* rs600 depends on : */ 34/* rs600 depends on : */
33void r100_hdp_reset(struct radeon_device *rdev); 35void r100_hdp_reset(struct radeon_device *rdev);
34int r100_gui_wait_for_idle(struct radeon_device *rdev); 36int r100_gui_wait_for_idle(struct radeon_device *rdev);
@@ -409,3 +411,10 @@ void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
409 ((reg) & RS600_MC_ADDR_MASK)); 411 ((reg) & RS600_MC_ADDR_MASK));
410 WREG32(RS600_MC_DATA, v); 412 WREG32(RS600_MC_DATA, v);
411} 413}
414
415int rs600_init(struct radeon_device *rdev)
416{
417 rdev->config.r300.reg_safe_bm = rs600_reg_safe_bm;
418 rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs600_reg_safe_bm);
419 return 0;
420}
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index bc6b7c5339bc..839595b00728 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -652,68 +652,3 @@ void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
652 WREG32(RS690_MC_DATA, v); 652 WREG32(RS690_MC_DATA, v);
653 WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK); 653 WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);
654} 654}
655
656static const unsigned rs690_reg_safe_bm[219] = {
657 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
658 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
659 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
660 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
661 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
662 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
663 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
664 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
665 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
666 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
667 0x17FF1FFF,0xFFFFFFFC,0xFFFFFFFF,0xFF30FFBF,
668 0xFFFFFFF8,0xC3E6FFFF,0xFFFFF6DF,0xFFFFFFFF,
669 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
670 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
671 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFF03F,
672 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
673 0xFFFFFFFF,0xFFFFEFCE,0xF00EBFFF,0x007C0000,
674 0xF0000078,0xFF000009,0xFFFFFFFF,0xFFFFFFFF,
675 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
676 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
677 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
678 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
679 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
680 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
681 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
682 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
683 0xFFFFF7FF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
684 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
685 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
686 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
687 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
688 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
689 0xFFFFFC78,0xFFFFFFFF,0xFFFFFFFE,0xFFFFFFFF,
690 0x38FF8F50,0xFFF88082,0xF000000C,0xFAE009FF,
691 0x0000FFFF,0xFFFFFFFF,0xFFFFFFFF,0x00000000,
692 0x00000000,0x0000C100,0x00000000,0x00000000,
693 0x00000000,0x00000000,0x00000000,0x00000000,
694 0x00000000,0xFFFF0000,0xFFFFFFFF,0xFF80FFFF,
695 0x00000000,0x00000000,0x00000000,0x00000000,
696 0x0003FC01,0xFFFFFFF8,0xFE800B19,0xFFFFFFFF,
697 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
698 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
699 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
700 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
701 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
702 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
703 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
704 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
705 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
706 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
707 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
708 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
709 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
710 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
711 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
712};
713
714int rs690_init(struct radeon_device *rdev)
715{
716 rdev->config.r300.reg_safe_bm = rs690_reg_safe_bm;
717 rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs690_reg_safe_bm);
718 return 0;
719}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-01 19:25:15 -0500