diff options
author | Eric Moore <eric.moore@lsil.com> | 2006-06-29 19:38:43 -0400 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-06-30 22:29:23 -0400 |
commit | 3e00a5b28782d65b7ac91e1e9812c281c2ec7af0 (patch) | |
tree | b9dd446bf2bbc043cc1982c5cfe664588094ac8e | |
parent | 376ac8307868f93a0b9aa277f43dee0f63c41c1b (diff) |
[SCSI] mptbase: mpt_interrupt should return IRQ_NONE
The way mpt_interrupt() was coded, it was impossible for the unhandled
interrupt detection logic to ever trigger. All interrupt handlers should
return IRQ_NONE when they have nothing to do.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andrew Morton <akpm@osdl.com>
Signed-off-by: Eric Moore <Eric.Moore@lsil.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
-rw-r--r-- | drivers/message/fusion/mptbase.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c index 8ac77caf9337..20609966c2a9 100644 --- a/drivers/message/fusion/mptbase.c +++ b/drivers/message/fusion/mptbase.c | |||
@@ -369,20 +369,21 @@ static irqreturn_t | |||
369 | mpt_interrupt(int irq, void *bus_id, struct pt_regs *r) | 369 | mpt_interrupt(int irq, void *bus_id, struct pt_regs *r) |
370 | { | 370 | { |
371 | MPT_ADAPTER *ioc = bus_id; | 371 | MPT_ADAPTER *ioc = bus_id; |
372 | u32 pa; | 372 | u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo); |
373 | |||
374 | if (pa == 0xFFFFFFFF) | ||
375 | return IRQ_NONE; | ||
373 | 376 | ||
374 | /* | 377 | /* |
375 | * Drain the reply FIFO! | 378 | * Drain the reply FIFO! |
376 | */ | 379 | */ |
377 | while (1) { | 380 | do { |
378 | pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo); | 381 | if (pa & MPI_ADDRESS_REPLY_A_BIT) |
379 | if (pa == 0xFFFFFFFF) | ||
380 | return IRQ_HANDLED; | ||
381 | else if (pa & MPI_ADDRESS_REPLY_A_BIT) | ||
382 | mpt_reply(ioc, pa); | 382 | mpt_reply(ioc, pa); |
383 | else | 383 | else |
384 | mpt_turbo_reply(ioc, pa); | 384 | mpt_turbo_reply(ioc, pa); |
385 | } | 385 | pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo); |
386 | } while (pa != 0xFFFFFFFF); | ||
386 | 387 | ||
387 | return IRQ_HANDLED; | 388 | return IRQ_HANDLED; |
388 | } | 389 | } |