diff options
| author | Steve Wise <swise@opengridcomputing.com> | 2009-05-27 17:43:39 -0400 |
|---|---|---|
| committer | Roland Dreier <rolandd@cisco.com> | 2009-05-27 17:43:39 -0400 |
| commit | 3026c19a14ba71ccd4dc4925abab9395ea12839c (patch) | |
| tree | 9264da66d2ab516b7ffdf310d2cf5ac078cc4415 | |
| parent | 7ab1a2b31d4a8b4f519ccff5a84c53a5b87fd1be (diff) | |
RDMA/cxgb3: Limit fast register size based on T3 limitations
T3 firmware only supports one WRs worth of page list for fast register
work requests. The driver currently allows 2 WRs worth, which
doesn't work for T3, so reduce the limit in the driver.
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
| -rw-r--r-- | drivers/infiniband/hw/cxgb3/cxio_wr.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/cxgb3/cxio_wr.h b/drivers/infiniband/hw/cxgb3/cxio_wr.h index ff9be1a13106..32e3b1461d81 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_wr.h +++ b/drivers/infiniband/hw/cxgb3/cxio_wr.h | |||
| @@ -176,7 +176,7 @@ struct t3_send_wr { | |||
| 176 | struct t3_sge sgl[T3_MAX_SGE]; /* 4+ */ | 176 | struct t3_sge sgl[T3_MAX_SGE]; /* 4+ */ |
| 177 | }; | 177 | }; |
| 178 | 178 | ||
| 179 | #define T3_MAX_FASTREG_DEPTH 24 | 179 | #define T3_MAX_FASTREG_DEPTH 10 |
| 180 | #define T3_MAX_FASTREG_FRAG 10 | 180 | #define T3_MAX_FASTREG_FRAG 10 |
| 181 | 181 | ||
| 182 | struct t3_fastreg_wr { | 182 | struct t3_fastreg_wr { |