diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2013-01-18 04:40:42 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2013-01-24 22:43:50 -0500 |
commit | ff8de98d50e551057978ea90d09255c528fde1ac (patch) | |
tree | 44bce2023b68e65027fdabebf354a510b39698bc | |
parent | 93301f5dbd72bd60882f88b4d04cafa3db4c85ed (diff) |
ARM: shmobile: r8a7779: scif .irqs used SCIx_IRQ_MUXED()
This patch tidyup scif .irqs settings by using
SCIx_IRQ_MUXED() macro.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7779.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index a181ced09e45..7e87ab3eb8d3 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c | |||
@@ -66,8 +66,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
66 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 66 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
67 | .scbrr_algo_id = SCBRR_ALGO_2, | 67 | .scbrr_algo_id = SCBRR_ALGO_2, |
68 | .type = PORT_SCIF, | 68 | .type = PORT_SCIF, |
69 | .irqs = { gic_spi(88), gic_spi(88), | 69 | .irqs = SCIx_IRQ_MUXED(gic_spi(88)), |
70 | gic_spi(88), gic_spi(88) }, | ||
71 | }; | 70 | }; |
72 | 71 | ||
73 | static struct platform_device scif0_device = { | 72 | static struct platform_device scif0_device = { |
@@ -84,8 +83,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
84 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 83 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
85 | .scbrr_algo_id = SCBRR_ALGO_2, | 84 | .scbrr_algo_id = SCBRR_ALGO_2, |
86 | .type = PORT_SCIF, | 85 | .type = PORT_SCIF, |
87 | .irqs = { gic_spi(89), gic_spi(89), | 86 | .irqs = SCIx_IRQ_MUXED(gic_spi(89)), |
88 | gic_spi(89), gic_spi(89) }, | ||
89 | }; | 87 | }; |
90 | 88 | ||
91 | static struct platform_device scif1_device = { | 89 | static struct platform_device scif1_device = { |
@@ -102,8 +100,7 @@ static struct plat_sci_port scif2_platform_data = { | |||
102 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 100 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
103 | .scbrr_algo_id = SCBRR_ALGO_2, | 101 | .scbrr_algo_id = SCBRR_ALGO_2, |
104 | .type = PORT_SCIF, | 102 | .type = PORT_SCIF, |
105 | .irqs = { gic_spi(90), gic_spi(90), | 103 | .irqs = SCIx_IRQ_MUXED(gic_spi(90)), |
106 | gic_spi(90), gic_spi(90) }, | ||
107 | }; | 104 | }; |
108 | 105 | ||
109 | static struct platform_device scif2_device = { | 106 | static struct platform_device scif2_device = { |
@@ -120,8 +117,7 @@ static struct plat_sci_port scif3_platform_data = { | |||
120 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 117 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
121 | .scbrr_algo_id = SCBRR_ALGO_2, | 118 | .scbrr_algo_id = SCBRR_ALGO_2, |
122 | .type = PORT_SCIF, | 119 | .type = PORT_SCIF, |
123 | .irqs = { gic_spi(91), gic_spi(91), | 120 | .irqs = SCIx_IRQ_MUXED(gic_spi(91)), |
124 | gic_spi(91), gic_spi(91) }, | ||
125 | }; | 121 | }; |
126 | 122 | ||
127 | static struct platform_device scif3_device = { | 123 | static struct platform_device scif3_device = { |
@@ -138,8 +134,7 @@ static struct plat_sci_port scif4_platform_data = { | |||
138 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 134 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
139 | .scbrr_algo_id = SCBRR_ALGO_2, | 135 | .scbrr_algo_id = SCBRR_ALGO_2, |
140 | .type = PORT_SCIF, | 136 | .type = PORT_SCIF, |
141 | .irqs = { gic_spi(92), gic_spi(92), | 137 | .irqs = SCIx_IRQ_MUXED(gic_spi(92)), |
142 | gic_spi(92), gic_spi(92) }, | ||
143 | }; | 138 | }; |
144 | 139 | ||
145 | static struct platform_device scif4_device = { | 140 | static struct platform_device scif4_device = { |
@@ -156,8 +151,7 @@ static struct plat_sci_port scif5_platform_data = { | |||
156 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 151 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
157 | .scbrr_algo_id = SCBRR_ALGO_2, | 152 | .scbrr_algo_id = SCBRR_ALGO_2, |
158 | .type = PORT_SCIF, | 153 | .type = PORT_SCIF, |
159 | .irqs = { gic_spi(93), gic_spi(93), | 154 | .irqs = SCIx_IRQ_MUXED(gic_spi(93)), |
160 | gic_spi(93), gic_spi(93) }, | ||
161 | }; | 155 | }; |
162 | 156 | ||
163 | static struct platform_device scif5_device = { | 157 | static struct platform_device scif5_device = { |