diff options
author | Paul Walmsley <paul@pwsan.com> | 2013-01-26 02:58:12 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2013-01-26 02:58:12 -0500 |
commit | fd6b42a5614077b04ce8f34fbbcf16864723f5df (patch) | |
tree | 52ee76162cc1a1c8284f8f85e0360a13ecc07e33 | |
parent | 8e1ff676ef5fd4d8be4947ffd039f2699a4b1079 (diff) |
ARM: OMAP3xxx: CPUIdle: simplify the PER next-state code
The OMAP3xxx CPUIdle driver contains some code to place a lower bound
on the PER powerdomain's power state. Convert this code to a data-driven
implementation to remove branches and to improve readability.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r-- | arch/arm/mach-omap2/cpuidle34xx.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 22590dbe8f14..cba69455647a 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c | |||
@@ -36,40 +36,53 @@ | |||
36 | 36 | ||
37 | /* Mach specific information to be recorded in the C-state driver_data */ | 37 | /* Mach specific information to be recorded in the C-state driver_data */ |
38 | struct omap3_idle_statedata { | 38 | struct omap3_idle_statedata { |
39 | u32 mpu_state; | 39 | u8 mpu_state; |
40 | u32 core_state; | 40 | u8 core_state; |
41 | u8 per_min_state; | ||
41 | }; | 42 | }; |
42 | 43 | ||
43 | static struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd; | 44 | static struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd; |
44 | 45 | ||
46 | /* | ||
47 | * Prevent PER OFF if CORE is not in RETention or OFF as this would | ||
48 | * disable PER wakeups completely. | ||
49 | */ | ||
45 | static struct omap3_idle_statedata omap3_idle_data[] = { | 50 | static struct omap3_idle_statedata omap3_idle_data[] = { |
46 | { | 51 | { |
47 | .mpu_state = PWRDM_POWER_ON, | 52 | .mpu_state = PWRDM_POWER_ON, |
48 | .core_state = PWRDM_POWER_ON, | 53 | .core_state = PWRDM_POWER_ON, |
54 | /* In C1 do not allow PER state lower than CORE state */ | ||
55 | .per_min_state = PWRDM_POWER_ON, | ||
49 | }, | 56 | }, |
50 | { | 57 | { |
51 | .mpu_state = PWRDM_POWER_ON, | 58 | .mpu_state = PWRDM_POWER_ON, |
52 | .core_state = PWRDM_POWER_ON, | 59 | .core_state = PWRDM_POWER_ON, |
60 | .per_min_state = PWRDM_POWER_RET, | ||
53 | }, | 61 | }, |
54 | { | 62 | { |
55 | .mpu_state = PWRDM_POWER_RET, | 63 | .mpu_state = PWRDM_POWER_RET, |
56 | .core_state = PWRDM_POWER_ON, | 64 | .core_state = PWRDM_POWER_ON, |
65 | .per_min_state = PWRDM_POWER_RET, | ||
57 | }, | 66 | }, |
58 | { | 67 | { |
59 | .mpu_state = PWRDM_POWER_OFF, | 68 | .mpu_state = PWRDM_POWER_OFF, |
60 | .core_state = PWRDM_POWER_ON, | 69 | .core_state = PWRDM_POWER_ON, |
70 | .per_min_state = PWRDM_POWER_RET, | ||
61 | }, | 71 | }, |
62 | { | 72 | { |
63 | .mpu_state = PWRDM_POWER_RET, | 73 | .mpu_state = PWRDM_POWER_RET, |
64 | .core_state = PWRDM_POWER_RET, | 74 | .core_state = PWRDM_POWER_RET, |
75 | .per_min_state = PWRDM_POWER_OFF, | ||
65 | }, | 76 | }, |
66 | { | 77 | { |
67 | .mpu_state = PWRDM_POWER_OFF, | 78 | .mpu_state = PWRDM_POWER_OFF, |
68 | .core_state = PWRDM_POWER_RET, | 79 | .core_state = PWRDM_POWER_RET, |
80 | .per_min_state = PWRDM_POWER_OFF, | ||
69 | }, | 81 | }, |
70 | { | 82 | { |
71 | .mpu_state = PWRDM_POWER_OFF, | 83 | .mpu_state = PWRDM_POWER_OFF, |
72 | .core_state = PWRDM_POWER_OFF, | 84 | .core_state = PWRDM_POWER_OFF, |
85 | .per_min_state = PWRDM_POWER_OFF, | ||
73 | }, | 86 | }, |
74 | }; | 87 | }; |
75 | 88 | ||
@@ -209,10 +222,9 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, | |||
209 | struct cpuidle_driver *drv, | 222 | struct cpuidle_driver *drv, |
210 | int index) | 223 | int index) |
211 | { | 224 | { |
212 | int new_state_idx; | 225 | int new_state_idx, ret; |
213 | u32 core_next_state, per_next_state = 0, per_saved_state = 0; | 226 | u8 per_next_state, per_saved_state; |
214 | struct omap3_idle_statedata *cx; | 227 | struct omap3_idle_statedata *cx; |
215 | int ret; | ||
216 | 228 | ||
217 | /* | 229 | /* |
218 | * Use only C1 if CAM is active. | 230 | * Use only C1 if CAM is active. |
@@ -233,25 +245,13 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, | |||
233 | 245 | ||
234 | /* Program PER state */ | 246 | /* Program PER state */ |
235 | cx = &omap3_idle_data[new_state_idx]; | 247 | cx = &omap3_idle_data[new_state_idx]; |
236 | core_next_state = cx->core_state; | ||
237 | per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd); | ||
238 | if (new_state_idx == 0) { | ||
239 | /* In C1 do not allow PER state lower than CORE state */ | ||
240 | if (per_next_state < core_next_state) | ||
241 | per_next_state = core_next_state; | ||
242 | } else { | ||
243 | /* | ||
244 | * Prevent PER OFF if CORE is not in RETention or OFF as this | ||
245 | * would disable PER wakeups completely. | ||
246 | */ | ||
247 | if ((per_next_state == PWRDM_POWER_OFF) && | ||
248 | (core_next_state > PWRDM_POWER_RET)) | ||
249 | per_next_state = PWRDM_POWER_RET; | ||
250 | } | ||
251 | 248 | ||
252 | /* Are we changing PER target state? */ | 249 | per_next_state = pwrdm_read_next_pwrst(per_pd); |
253 | if (per_next_state != per_saved_state) | 250 | per_saved_state = per_next_state; |
251 | if (per_next_state < cx->per_min_state) { | ||
252 | per_next_state = cx->per_min_state; | ||
254 | pwrdm_set_next_pwrst(per_pd, per_next_state); | 253 | pwrdm_set_next_pwrst(per_pd, per_next_state); |
254 | } | ||
255 | 255 | ||
256 | ret = omap3_enter_idle(dev, drv, new_state_idx); | 256 | ret = omap3_enter_idle(dev, drv, new_state_idx); |
257 | 257 | ||