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authorBrian Austin <brian.austin@cirrus.com>2013-10-17 12:03:34 -0400
committerMark Brown <broonie@linaro.org>2013-10-17 19:37:29 -0400
commitf9ca060680e7c26a88d990ad9370572274b0d54b (patch)
tree6ed33bd02e7f60e259645ed2facdeb460ff0569e
parent3d8c8bc0250f7cb11f887691b7473b51adcd2bcb (diff)
ASoC: cs42l73: Namespace defines for cs42l73 codec
Cleanup to namespace the defines for the cs42l73 driver Signed-off-by: Brian Austin <brian.austin@cirrus.com> Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r--sound/soc/codecs/cs42l73.c38
-rw-r--r--sound/soc/codecs/cs42l73.h104
2 files changed, 70 insertions, 72 deletions
diff --git a/sound/soc/codecs/cs42l73.c b/sound/soc/codecs/cs42l73.c
index db9d39604d68..89efc3c6aefc 100644
--- a/sound/soc/codecs/cs42l73.c
+++ b/sound/soc/codecs/cs42l73.c
@@ -1047,11 +1047,11 @@ static int cs42l73_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1047 1047
1048 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1048 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1049 case SND_SOC_DAIFMT_CBM_CFM: 1049 case SND_SOC_DAIFMT_CBM_CFM:
1050 mmcc |= MS_MASTER; 1050 mmcc |= CS42L73_MS_MASTER;
1051 break; 1051 break;
1052 1052
1053 case SND_SOC_DAIFMT_CBS_CFS: 1053 case SND_SOC_DAIFMT_CBS_CFS:
1054 mmcc &= ~MS_MASTER; 1054 mmcc &= ~CS42L73_MS_MASTER;
1055 break; 1055 break;
1056 1056
1057 default: 1057 default:
@@ -1063,11 +1063,11 @@ static int cs42l73_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1063 1063
1064 switch (format) { 1064 switch (format) {
1065 case SND_SOC_DAIFMT_I2S: 1065 case SND_SOC_DAIFMT_I2S:
1066 spc &= ~SPDIF_PCM; 1066 spc &= ~CS42L73_SPDIF_PCM;
1067 break; 1067 break;
1068 case SND_SOC_DAIFMT_DSP_A: 1068 case SND_SOC_DAIFMT_DSP_A:
1069 case SND_SOC_DAIFMT_DSP_B: 1069 case SND_SOC_DAIFMT_DSP_B:
1070 if (mmcc & MS_MASTER) { 1070 if (mmcc & CS42L73_MS_MASTER) {
1071 dev_err(codec->dev, 1071 dev_err(codec->dev,
1072 "PCM format in slave mode only\n"); 1072 "PCM format in slave mode only\n");
1073 return -EINVAL; 1073 return -EINVAL;
@@ -1077,25 +1077,25 @@ static int cs42l73_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1077 "PCM format is not supported on ASP port\n"); 1077 "PCM format is not supported on ASP port\n");
1078 return -EINVAL; 1078 return -EINVAL;
1079 } 1079 }
1080 spc |= SPDIF_PCM; 1080 spc |= CS42L73_SPDIF_PCM;
1081 break; 1081 break;
1082 default: 1082 default:
1083 return -EINVAL; 1083 return -EINVAL;
1084 } 1084 }
1085 1085
1086 if (spc & SPDIF_PCM) { 1086 if (spc & CS42L73_SPDIF_PCM) {
1087 /* Clear PCM mode, clear PCM_BIT_ORDER bit for MSB->LSB */ 1087 /* Clear PCM mode, clear PCM_BIT_ORDER bit for MSB->LSB */
1088 spc &= ~(PCM_MODE_MASK | PCM_BIT_ORDER); 1088 spc &= ~(CS42L73_PCM_MODE_MASK | CS42L73_PCM_BIT_ORDER);
1089 switch (format) { 1089 switch (format) {
1090 case SND_SOC_DAIFMT_DSP_B: 1090 case SND_SOC_DAIFMT_DSP_B:
1091 if (inv == SND_SOC_DAIFMT_IB_IF) 1091 if (inv == SND_SOC_DAIFMT_IB_IF)
1092 spc |= PCM_MODE0; 1092 spc |= CS42L73_PCM_MODE0;
1093 if (inv == SND_SOC_DAIFMT_IB_NF) 1093 if (inv == SND_SOC_DAIFMT_IB_NF)
1094 spc |= PCM_MODE1; 1094 spc |= CS42L73_PCM_MODE1;
1095 break; 1095 break;
1096 case SND_SOC_DAIFMT_DSP_A: 1096 case SND_SOC_DAIFMT_DSP_A:
1097 if (inv == SND_SOC_DAIFMT_IB_IF) 1097 if (inv == SND_SOC_DAIFMT_IB_IF)
1098 spc |= PCM_MODE1; 1098 spc |= CS42L73_PCM_MODE1;
1099 break; 1099 break;
1100 default: 1100 default:
1101 return -EINVAL; 1101 return -EINVAL;
@@ -1155,7 +1155,7 @@ static int cs42l73_pcm_hw_params(struct snd_pcm_substream *substream,
1155 int mclk_coeff; 1155 int mclk_coeff;
1156 int srate = params_rate(params); 1156 int srate = params_rate(params);
1157 1157
1158 if (priv->config[id].mmcc & MS_MASTER) { 1158 if (priv->config[id].mmcc & CS42L73_MS_MASTER) {
1159 /* CS42L73 Master */ 1159 /* CS42L73 Master */
1160 /* MCLK -> srate */ 1160 /* MCLK -> srate */
1161 mclk_coeff = 1161 mclk_coeff =
@@ -1174,13 +1174,13 @@ static int cs42l73_pcm_hw_params(struct snd_pcm_substream *substream,
1174 priv->config[id].spc &= 0xFC; 1174 priv->config[id].spc &= 0xFC;
1175 /* Use SCLK=64*Fs if internal MCLK >= 6.4MHz */ 1175 /* Use SCLK=64*Fs if internal MCLK >= 6.4MHz */
1176 if (priv->mclk >= 6400000) 1176 if (priv->mclk >= 6400000)
1177 priv->config[id].spc |= MCK_SCLK_64FS; 1177 priv->config[id].spc |= CS42L73_MCK_SCLK_64FS;
1178 else 1178 else
1179 priv->config[id].spc |= MCK_SCLK_MCLK; 1179 priv->config[id].spc |= CS42L73_MCK_SCLK_MCLK;
1180 } else { 1180 } else {
1181 /* CS42L73 Slave */ 1181 /* CS42L73 Slave */
1182 priv->config[id].spc &= 0xFC; 1182 priv->config[id].spc &= 0xFC;
1183 priv->config[id].spc |= MCK_SCLK_64FS; 1183 priv->config[id].spc |= CS42L73_MCK_SCLK_64FS;
1184 } 1184 }
1185 /* Update ASRCs */ 1185 /* Update ASRCs */
1186 priv->config[id].srate = srate; 1186 priv->config[id].srate = srate;
@@ -1200,8 +1200,8 @@ static int cs42l73_set_bias_level(struct snd_soc_codec *codec,
1200 1200
1201 switch (level) { 1201 switch (level) {
1202 case SND_SOC_BIAS_ON: 1202 case SND_SOC_BIAS_ON:
1203 snd_soc_update_bits(codec, CS42L73_DMMCC, MCLKDIS, 0); 1203 snd_soc_update_bits(codec, CS42L73_DMMCC, CS42L73_MCLKDIS, 0);
1204 snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 0); 1204 snd_soc_update_bits(codec, CS42L73_PWRCTL1, CS42L73_PDN, 0);
1205 break; 1205 break;
1206 1206
1207 case SND_SOC_BIAS_PREPARE: 1207 case SND_SOC_BIAS_PREPARE:
@@ -1212,11 +1212,11 @@ static int cs42l73_set_bias_level(struct snd_soc_codec *codec,
1212 regcache_cache_only(cs42l73->regmap, false); 1212 regcache_cache_only(cs42l73->regmap, false);
1213 regcache_sync(cs42l73->regmap); 1213 regcache_sync(cs42l73->regmap);
1214 } 1214 }
1215 snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 1); 1215 snd_soc_update_bits(codec, CS42L73_PWRCTL1, CS42L73_PDN, 1);
1216 break; 1216 break;
1217 1217
1218 case SND_SOC_BIAS_OFF: 1218 case SND_SOC_BIAS_OFF:
1219 snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 1); 1219 snd_soc_update_bits(codec, CS42L73_PWRCTL1, CS42L73_PDN, 1);
1220 if (cs42l73->shutdwn_delay > 0) { 1220 if (cs42l73->shutdwn_delay > 0) {
1221 mdelay(cs42l73->shutdwn_delay); 1221 mdelay(cs42l73->shutdwn_delay);
1222 cs42l73->shutdwn_delay = 0; 1222 cs42l73->shutdwn_delay = 0;
@@ -1225,7 +1225,7 @@ static int cs42l73_set_bias_level(struct snd_soc_codec *codec,
1225 * down. 1225 * down.
1226 */ 1226 */
1227 } 1227 }
1228 snd_soc_update_bits(codec, CS42L73_DMMCC, MCLKDIS, 1); 1228 snd_soc_update_bits(codec, CS42L73_DMMCC, CS42L73_MCLKDIS, 1);
1229 break; 1229 break;
1230 } 1230 }
1231 codec->dapm.bias_level = level; 1231 codec->dapm.bias_level = level;
diff --git a/sound/soc/codecs/cs42l73.h b/sound/soc/codecs/cs42l73.h
index 4f83d39496a8..45746186a678 100644
--- a/sound/soc/codecs/cs42l73.h
+++ b/sound/soc/codecs/cs42l73.h
@@ -128,60 +128,60 @@
128/* Bitfield Definitions */ 128/* Bitfield Definitions */
129 129
130/* CS42L73_PWRCTL1 */ 130/* CS42L73_PWRCTL1 */
131#define PDN_ADCB (1 << 7) 131#define CS42L73_PDN_ADCB (1 << 7)
132#define PDN_DMICB (1 << 6) 132#define CS42L73_PDN_DMICB (1 << 6)
133#define PDN_ADCA (1 << 5) 133#define CS42L73_PDN_ADCA (1 << 5)
134#define PDN_DMICA (1 << 4) 134#define CS42L73_PDN_DMICA (1 << 4)
135#define PDN_LDO (1 << 2) 135#define CS42L73_PDN_LDO (1 << 2)
136#define DISCHG_FILT (1 << 1) 136#define CS42L73_DISCHG_FILT (1 << 1)
137#define PDN (1 << 0) 137#define CS42L73_PDN (1 << 0)
138 138
139/* CS42L73_PWRCTL2 */ 139/* CS42L73_PWRCTL2 */
140#define PDN_MIC2_BIAS (1 << 7) 140#define CS42L73_PDN_MIC2_BIAS (1 << 7)
141#define PDN_MIC1_BIAS (1 << 6) 141#define CS42L73_PDN_MIC1_BIAS (1 << 6)
142#define PDN_VSP (1 << 4) 142#define CS42L73_PDN_VSP (1 << 4)
143#define PDN_ASP_SDOUT (1 << 3) 143#define CS42L73_PDN_ASP_SDOUT (1 << 3)
144#define PDN_ASP_SDIN (1 << 2) 144#define CS42L73_PDN_ASP_SDIN (1 << 2)
145#define PDN_XSP_SDOUT (1 << 1) 145#define CS42L73_PDN_XSP_SDOUT (1 << 1)
146#define PDN_XSP_SDIN (1 << 0) 146#define CS42L73_PDN_XSP_SDIN (1 << 0)
147 147
148/* CS42L73_PWRCTL3 */ 148/* CS42L73_PWRCTL3 */
149#define PDN_THMS (1 << 5) 149#define CS42L73_PDN_THMS (1 << 5)
150#define PDN_SPKLO (1 << 4) 150#define CS42L73_PDN_SPKLO (1 << 4)
151#define PDN_EAR (1 << 3) 151#define CS42L73_PDN_EAR (1 << 3)
152#define PDN_SPK (1 << 2) 152#define CS42L73_PDN_SPK (1 << 2)
153#define PDN_LO (1 << 1) 153#define CS42L73_PDN_LO (1 << 1)
154#define PDN_HP (1 << 0) 154#define CS42L73_PDN_HP (1 << 0)
155 155
156/* Thermal Overload Detect. Requires interrupt ... */ 156/* Thermal Overload Detect. Requires interrupt ... */
157#define THMOVLD_150C 0 157#define CS42L73_THMOVLD_150C 0
158#define THMOVLD_132C 1 158#define CS42L73_THMOVLD_132C 1
159#define THMOVLD_115C 2 159#define CS42L73_THMOVLD_115C 2
160#define THMOVLD_098C 3 160#define CS42L73_THMOVLD_098C 3
161 161
162#define CS42L73_CHARGEPUMP_MASK (0xF0) 162#define CS42L73_CHARGEPUMP_MASK (0xF0)
163 163
164/* CS42L73_ASPC, CS42L73_XSPC, CS42L73_VSPC */ 164/* CS42L73_ASPC, CS42L73_XSPC, CS42L73_VSPC */
165#define SP_3ST (1 << 7) 165#define CS42L73_SP_3ST (1 << 7)
166#define SPDIF_I2S (0 << 6) 166#define CS42L73_SPDIF_I2S (0 << 6)
167#define SPDIF_PCM (1 << 6) 167#define CS42L73_SPDIF_PCM (1 << 6)
168#define PCM_MODE0 (0 << 4) 168#define CS42L73_PCM_MODE0 (0 << 4)
169#define PCM_MODE1 (1 << 4) 169#define CS42L73_PCM_MODE1 (1 << 4)
170#define PCM_MODE2 (2 << 4) 170#define CS42L73_PCM_MODE2 (2 << 4)
171#define PCM_MODE_MASK (3 << 4) 171#define CS42L73_PCM_MODE_MASK (3 << 4)
172#define PCM_BIT_ORDER (1 << 3) 172#define CS42L73_PCM_BIT_ORDER (1 << 3)
173#define MCK_SCLK_64FS (0 << 0) 173#define CS42L73_MCK_SCLK_64FS (0 << 0)
174#define MCK_SCLK_MCLK (2 << 0) 174#define CS42L73_MCK_SCLK_MCLK (2 << 0)
175#define MCK_SCLK_PREMCLK (3 << 0) 175#define CS42L73_MCK_SCLK_PREMCLK (3 << 0)
176 176
177/* CS42L73_xSPMMCC */ 177/* CS42L73_xSPMMCC */
178#define MS_MASTER (1 << 7) 178#define CS42L73_MS_MASTER (1 << 7)
179 179
180 180
181/* CS42L73_DMMCC */ 181/* CS42L73_DMMCC */
182#define MCLKDIS (1 << 0) 182#define CS42L73_MCLKDIS (1 << 0)
183#define MCLKSEL_MCLK2 (1 << 4) 183#define CS42L73_MCLKSEL_MCLK2 (1 << 4)
184#define MCLKSEL_MCLK1 (0 << 4) 184#define CS42L73_MCLKSEL_MCLK1 (0 << 4)
185 185
186/* CS42L73 MCLK derived from MCLK1 or MCLK2 */ 186/* CS42L73 MCLK derived from MCLK1 or MCLK2 */
187#define CS42L73_CLKID_MCLK1 0 187#define CS42L73_CLKID_MCLK1 0
@@ -195,28 +195,26 @@
195#define CS42L73_VSP 2 195#define CS42L73_VSP 2
196 196
197/* IS1, IM1 */ 197/* IS1, IM1 */
198#define MIC2_SDET (1 << 6) 198#define CS42L73_MIC2_SDET (1 << 6)
199#define THMOVLD (1 << 4) 199#define CS42L73_THMOVLD (1 << 4)
200#define DIGMIXOVFL (1 << 3) 200#define CS42L73_DIGMIXOVFL (1 << 3)
201#define IPBOVFL (1 << 1) 201#define CS42L73_IPBOVFL (1 << 1)
202#define IPAOVFL (1 << 0) 202#define CS42L73_IPAOVFL (1 << 0)
203 203
204/* Analog Softramp */ 204/* Analog Softramp */
205#define ANLGOSFT (1 << 0) 205#define CS42L73_ANLGOSFT (1 << 0)
206 206
207/* HP A/B Analog Mute */ 207/* HP A/B Analog Mute */
208#define HPA_MUTE (1 << 7) 208#define CS42L73_HPA_MUTE (1 << 7)
209/* LO A/B Analog Mute */ 209/* LO A/B Analog Mute */
210#define LOA_MUTE (1 << 7) 210#define CS42L73_LOA_MUTE (1 << 7)
211/* Digital Mute */ 211/* Digital Mute */
212#define HLAD_MUTE (1 << 0) 212#define CS42L73_HLAD_MUTE (1 << 0)
213#define HLBD_MUTE (1 << 1) 213#define CS42L73_HLBD_MUTE (1 << 1)
214#define SPKD_MUTE (1 << 2) 214#define CS42L73_SPKD_MUTE (1 << 2)
215#define ESLD_MUTE (1 << 3) 215#define CS42L73_ESLD_MUTE (1 << 3)
216 216
217/* Misc defines for codec */ 217/* Misc defines for codec */
218#define CS42L73_RESET_GPIO 143
219
220#define CS42L73_DEVID 0x00042A73 218#define CS42L73_DEVID 0x00042A73
221#define CS42L73_MCLKX_MIN 5644800 219#define CS42L73_MCLKX_MIN 5644800
222#define CS42L73_MCLKX_MAX 38400000 220#define CS42L73_MCLKX_MAX 38400000