diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2012-08-17 02:17:51 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2012-08-30 22:07:28 -0400 |
commit | efc38d2af55d80b4420dab71f6634ad7aa34a38c (patch) | |
tree | cfd0b4737e32a36cbacbb6403b7f9927287b53fc | |
parent | 761743ebc92df72053e736fce953a5d2e90099d5 (diff) |
e1000e: use correct type for read of 32-bit register
The POEMB register is 32 bits, not 16.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/82571.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c index 080c89093feb..c98586408005 100644 --- a/drivers/net/ethernet/intel/e1000e/82571.c +++ b/drivers/net/ethernet/intel/e1000e/82571.c | |||
@@ -653,7 +653,7 @@ static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw) | |||
653 | **/ | 653 | **/ |
654 | static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active) | 654 | static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active) |
655 | { | 655 | { |
656 | u16 data = er32(POEMB); | 656 | u32 data = er32(POEMB); |
657 | 657 | ||
658 | if (active) | 658 | if (active) |
659 | data |= E1000_PHY_CTRL_D0A_LPLU; | 659 | data |= E1000_PHY_CTRL_D0A_LPLU; |
@@ -677,7 +677,7 @@ static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active) | |||
677 | **/ | 677 | **/ |
678 | static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active) | 678 | static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active) |
679 | { | 679 | { |
680 | u16 data = er32(POEMB); | 680 | u32 data = er32(POEMB); |
681 | 681 | ||
682 | if (!active) { | 682 | if (!active) { |
683 | data &= ~E1000_PHY_CTRL_NOND0A_LPLU; | 683 | data &= ~E1000_PHY_CTRL_NOND0A_LPLU; |