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authorGeert Uytterhoeven <geert+renesas@linux-m68k.org>2014-03-12 14:44:50 -0400
committerSimon Horman <horms+renesas@verge.net.au>2014-04-13 22:30:10 -0400
commitedcf139081f501b1468ae6665217e8320d4c75e8 (patch)
tree023d7ae1856019036210f51700f13cb41ffda772
parentc9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff)
ARM: shmobile: r8a7791: Use rcar_gen2_read_mode_pins() helper
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7791.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 701383fe3267..36e57508d879 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -25,6 +25,7 @@
25#include <linux/clkdev.h> 25#include <linux/clkdev.h>
26#include <mach/clock.h> 26#include <mach/clock.h>
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/rcar-gen2.h>
28 29
29/* 30/*
30 * MD EXTAL PLL0 PLL1 PLL3 31 * MD EXTAL PLL0 PLL1 PLL3
@@ -43,8 +44,6 @@
43 * see "p1 / 2" on R8A7791_CLOCK_ROOT() below 44 * see "p1 / 2" on R8A7791_CLOCK_ROOT() below
44 */ 45 */
45 46
46#define MD(nr) (1 << nr)
47
48#define CPG_BASE 0xe6150000 47#define CPG_BASE 0xe6150000
49#define CPG_LEN 0x1000 48#define CPG_LEN 0x1000
50 49
@@ -68,7 +67,6 @@
68#define MSTPSR9 IOMEM(0xe61509a4) 67#define MSTPSR9 IOMEM(0xe61509a4)
69#define MSTPSR11 IOMEM(0xe61509ac) 68#define MSTPSR11 IOMEM(0xe61509ac)
70 69
71#define MODEMR 0xE6160060
72#define SDCKCR 0xE6150074 70#define SDCKCR 0xE6150074
73#define SD1CKCR 0xE6150078 71#define SD1CKCR 0xE6150078
74#define SD2CKCR 0xE615026c 72#define SD2CKCR 0xE615026c
@@ -295,14 +293,9 @@ static struct clk_lookup lookups[] = {
295 293
296void __init r8a7791_clock_init(void) 294void __init r8a7791_clock_init(void)
297{ 295{
298 void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); 296 u32 mode = rcar_gen2_read_mode_pins();
299 u32 mode;
300 int k, ret = 0; 297 int k, ret = 0;
301 298
302 BUG_ON(!modemr);
303 mode = ioread32(modemr);
304 iounmap(modemr);
305
306 switch (mode & (MD(14) | MD(13))) { 299 switch (mode & (MD(14) | MD(13))) {
307 case 0: 300 case 0:
308 R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88); 301 R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);