diff options
author | Sagar Kamble <sagar.a.kamble@intel.com> | 2014-08-13 13:37:05 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-08-14 10:12:42 -0400 |
commit | ebc3282409ae4d1e90c2f9608665cc4d8fbf7e73 (patch) | |
tree | ffbb260fdf99186c8bd9ee3efe5e6df53cdf0389 | |
parent | 82e3b8c130f046b7dd1e7898c10e40edb52fee6d (diff) |
drm/i915: Created common handler for platform specific suspend/resume
With this change, intel_runtime_suspend and intel_runtime_resume functions
become completely platform agnostic. Platform specific suspend/resume
changes are moved to intel_suspend_complete and intel_resume_prepare.
Cc: Imre Deak <imre.deak@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Goel, Akash <akash.goel@intel.com>
Signed-off-by: Sagar Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 76 |
1 files changed, 49 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 01de97776d81..b06e975dba39 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -494,6 +494,10 @@ bool i915_semaphore_is_enabled(struct drm_device *dev) | |||
494 | return true; | 494 | return true; |
495 | } | 495 | } |
496 | 496 | ||
497 | |||
498 | static int intel_suspend_complete(struct drm_i915_private *dev_priv); | ||
499 | static int intel_resume_prepare(struct drm_i915_private *dev_priv); | ||
500 | |||
497 | static int i915_drm_freeze(struct drm_device *dev) | 501 | static int i915_drm_freeze(struct drm_device *dev) |
498 | { | 502 | { |
499 | struct drm_i915_private *dev_priv = dev->dev_private; | 503 | struct drm_i915_private *dev_priv = dev->dev_private; |
@@ -959,14 +963,14 @@ static int i915_pm_poweroff(struct device *dev) | |||
959 | return i915_drm_freeze(drm_dev); | 963 | return i915_drm_freeze(drm_dev); |
960 | } | 964 | } |
961 | 965 | ||
962 | static int hsw_runtime_suspend(struct drm_i915_private *dev_priv) | 966 | static int hsw_suspend_complete(struct drm_i915_private *dev_priv) |
963 | { | 967 | { |
964 | hsw_enable_pc8(dev_priv); | 968 | hsw_enable_pc8(dev_priv); |
965 | 969 | ||
966 | return 0; | 970 | return 0; |
967 | } | 971 | } |
968 | 972 | ||
969 | static int snb_runtime_resume(struct drm_i915_private *dev_priv) | 973 | static int snb_resume_prepare(struct drm_i915_private *dev_priv) |
970 | { | 974 | { |
971 | struct drm_device *dev = dev_priv->dev; | 975 | struct drm_device *dev = dev_priv->dev; |
972 | 976 | ||
@@ -975,7 +979,7 @@ static int snb_runtime_resume(struct drm_i915_private *dev_priv) | |||
975 | return 0; | 979 | return 0; |
976 | } | 980 | } |
977 | 981 | ||
978 | static int hsw_runtime_resume(struct drm_i915_private *dev_priv) | 982 | static int hsw_resume_prepare(struct drm_i915_private *dev_priv) |
979 | { | 983 | { |
980 | hsw_disable_pc8(dev_priv); | 984 | hsw_disable_pc8(dev_priv); |
981 | 985 | ||
@@ -1271,7 +1275,7 @@ static void vlv_check_no_gt_access(struct drm_i915_private *dev_priv) | |||
1271 | I915_WRITE(VLV_GTLC_PW_STATUS, VLV_GTLC_ALLOWWAKEERR); | 1275 | I915_WRITE(VLV_GTLC_PW_STATUS, VLV_GTLC_ALLOWWAKEERR); |
1272 | } | 1276 | } |
1273 | 1277 | ||
1274 | static int vlv_runtime_suspend(struct drm_i915_private *dev_priv) | 1278 | static int vlv_suspend_complete(struct drm_i915_private *dev_priv) |
1275 | { | 1279 | { |
1276 | u32 mask; | 1280 | u32 mask; |
1277 | int err; | 1281 | int err; |
@@ -1311,7 +1315,7 @@ err1: | |||
1311 | return err; | 1315 | return err; |
1312 | } | 1316 | } |
1313 | 1317 | ||
1314 | static int vlv_runtime_resume(struct drm_i915_private *dev_priv) | 1318 | static int vlv_resume_prepare(struct drm_i915_private *dev_priv) |
1315 | { | 1319 | { |
1316 | struct drm_device *dev = dev_priv->dev; | 1320 | struct drm_device *dev = dev_priv->dev; |
1317 | int err; | 1321 | int err; |
@@ -1389,17 +1393,7 @@ static int intel_runtime_suspend(struct device *device) | |||
1389 | cancel_work_sync(&dev_priv->rps.work); | 1393 | cancel_work_sync(&dev_priv->rps.work); |
1390 | intel_runtime_pm_disable_interrupts(dev); | 1394 | intel_runtime_pm_disable_interrupts(dev); |
1391 | 1395 | ||
1392 | if (IS_GEN6(dev)) { | 1396 | ret = intel_suspend_complete(dev_priv); |
1393 | ret = 0; | ||
1394 | } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { | ||
1395 | ret = hsw_runtime_suspend(dev_priv); | ||
1396 | } else if (IS_VALLEYVIEW(dev)) { | ||
1397 | ret = vlv_runtime_suspend(dev_priv); | ||
1398 | } else { | ||
1399 | ret = -ENODEV; | ||
1400 | WARN_ON(1); | ||
1401 | } | ||
1402 | |||
1403 | if (ret) { | 1397 | if (ret) { |
1404 | DRM_ERROR("Runtime suspend failed, disabling it (%d)\n", ret); | 1398 | DRM_ERROR("Runtime suspend failed, disabling it (%d)\n", ret); |
1405 | intel_runtime_pm_restore_interrupts(dev); | 1399 | intel_runtime_pm_restore_interrupts(dev); |
@@ -1437,17 +1431,7 @@ static int intel_runtime_resume(struct device *device) | |||
1437 | intel_opregion_notify_adapter(dev, PCI_D0); | 1431 | intel_opregion_notify_adapter(dev, PCI_D0); |
1438 | dev_priv->pm.suspended = false; | 1432 | dev_priv->pm.suspended = false; |
1439 | 1433 | ||
1440 | if (IS_GEN6(dev)) { | 1434 | ret = intel_resume_prepare(dev_priv); |
1441 | ret = snb_runtime_resume(dev_priv); | ||
1442 | } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { | ||
1443 | ret = hsw_runtime_resume(dev_priv); | ||
1444 | } else if (IS_VALLEYVIEW(dev)) { | ||
1445 | ret = vlv_runtime_resume(dev_priv); | ||
1446 | } else { | ||
1447 | WARN_ON(1); | ||
1448 | ret = -ENODEV; | ||
1449 | } | ||
1450 | |||
1451 | /* | 1435 | /* |
1452 | * No point of rolling back things in case of an error, as the best | 1436 | * No point of rolling back things in case of an error, as the best |
1453 | * we can do is to hope that things will still work (and disable RPM). | 1437 | * we can do is to hope that things will still work (and disable RPM). |
@@ -1466,6 +1450,44 @@ static int intel_runtime_resume(struct device *device) | |||
1466 | return ret; | 1450 | return ret; |
1467 | } | 1451 | } |
1468 | 1452 | ||
1453 | static int intel_suspend_complete(struct drm_i915_private *dev_priv) | ||
1454 | { | ||
1455 | struct drm_device *dev = dev_priv->dev; | ||
1456 | int ret; | ||
1457 | |||
1458 | if (IS_GEN6(dev)) { | ||
1459 | ret = 0; | ||
1460 | } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { | ||
1461 | ret = hsw_suspend_complete(dev_priv); | ||
1462 | } else if (IS_VALLEYVIEW(dev)) { | ||
1463 | ret = vlv_suspend_complete(dev_priv); | ||
1464 | } else { | ||
1465 | ret = -ENODEV; | ||
1466 | WARN_ON(1); | ||
1467 | } | ||
1468 | |||
1469 | return ret; | ||
1470 | } | ||
1471 | |||
1472 | static int intel_resume_prepare(struct drm_i915_private *dev_priv) | ||
1473 | { | ||
1474 | struct drm_device *dev = dev_priv->dev; | ||
1475 | int ret; | ||
1476 | |||
1477 | if (IS_GEN6(dev)) { | ||
1478 | ret = snb_resume_prepare(dev_priv); | ||
1479 | } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { | ||
1480 | ret = hsw_resume_prepare(dev_priv); | ||
1481 | } else if (IS_VALLEYVIEW(dev)) { | ||
1482 | ret = vlv_resume_prepare(dev_priv); | ||
1483 | } else { | ||
1484 | WARN_ON(1); | ||
1485 | ret = -ENODEV; | ||
1486 | } | ||
1487 | |||
1488 | return ret; | ||
1489 | } | ||
1490 | |||
1469 | static const struct dev_pm_ops i915_pm_ops = { | 1491 | static const struct dev_pm_ops i915_pm_ops = { |
1470 | .suspend = i915_pm_suspend, | 1492 | .suspend = i915_pm_suspend, |
1471 | .suspend_late = i915_pm_suspend_late, | 1493 | .suspend_late = i915_pm_suspend_late, |