aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 21:55:15 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 21:55:15 -0400
commite7b5ec998aacd69e22472e12a62f86d803e0033b (patch)
tree8bfcde38dc846aeb329e8640f31420c2a63cd63b
parent95360fd63606918167a5365b770a6d28d333f0ed (diff)
parent7b27fa258c8f2670a8c09bbc6c4b2c874d155da2 (diff)
Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc device tree updates, take 2 from Olof Johansson: "This branch contains mostly a set of changes for device tree bindings on Samsung Exynos. It was staged behind the other branches due to dependencies on pincontrol and board changes." Fix up trivial conflict in drivers/clocksource/Makefile due to earlier conflict resolution. * tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: dts: Add nodes for dw_mmc controllers for Samsung EXYNOS5250 platforms ARM: EXYNOS: Add AUXDATA support for MSHC controllers ARM: EXYNOS: Add support for MSHC controller clocks ARM: dts: Enable on-board keys as wakeup source for exynos4210-origen ARM: dts: use uart2 for console on smdkv310 and smdk5250 ARM: dts: Add basic dts file for Samsung Trats board ARM: EXYNOS: Add OF compatibility lookups for EXYNOS4 i2c adapters ARM: dts: Specify address and size cells for i2c controllers for EXYNOS4 ARM: dts: Assume status of all optional nodes as disabled for exynos4 ARM: EXYNOS: Use exynos4 prefix instead of exynos4210 on exynos4-dt ARM: dts: Move parts common to EXYNOS4 from exynos4210.dtsi to exynos4.dtsi
Diffstat
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi248
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts63
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts54
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts237
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi186
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts59
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi32
-rw-r--r--arch/arm/mach-exynos/Makefile.boot2
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c45
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h4
-rw-r--r--arch/arm/mach-exynos/mach-exynos4-dt.c32
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c8
12 files changed, 644 insertions, 326 deletions
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
new file mode 100644
index 000000000000..a26c3dd58269
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -0,0 +1,248 @@
1/*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22/include/ "skeleton.dtsi"
23
24/ {
25 interrupt-parent = <&gic>;
26
27 aliases {
28 spi0 = &spi_0;
29 spi1 = &spi_1;
30 spi2 = &spi_2;
31 };
32
33 gic:interrupt-controller@10490000 {
34 compatible = "arm,cortex-a9-gic";
35 #interrupt-cells = <3>;
36 interrupt-controller;
37 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
38 };
39
40 combiner:interrupt-controller@10440000 {
41 compatible = "samsung,exynos4210-combiner";
42 #interrupt-cells = <2>;
43 interrupt-controller;
44 reg = <0x10440000 0x1000>;
45 };
46
47 watchdog@10060000 {
48 compatible = "samsung,s3c2410-wdt";
49 reg = <0x10060000 0x100>;
50 interrupts = <0 43 0>;
51 status = "disabled";
52 };
53
54 rtc@10070000 {
55 compatible = "samsung,s3c6410-rtc";
56 reg = <0x10070000 0x100>;
57 interrupts = <0 44 0>, <0 45 0>;
58 status = "disabled";
59 };
60
61 keypad@100A0000 {
62 compatible = "samsung,s5pv210-keypad";
63 reg = <0x100A0000 0x100>;
64 interrupts = <0 109 0>;
65 status = "disabled";
66 };
67
68 sdhci@12510000 {
69 compatible = "samsung,exynos4210-sdhci";
70 reg = <0x12510000 0x100>;
71 interrupts = <0 73 0>;
72 status = "disabled";
73 };
74
75 sdhci@12520000 {
76 compatible = "samsung,exynos4210-sdhci";
77 reg = <0x12520000 0x100>;
78 interrupts = <0 74 0>;
79 status = "disabled";
80 };
81
82 sdhci@12530000 {
83 compatible = "samsung,exynos4210-sdhci";
84 reg = <0x12530000 0x100>;
85 interrupts = <0 75 0>;
86 status = "disabled";
87 };
88
89 sdhci@12540000 {
90 compatible = "samsung,exynos4210-sdhci";
91 reg = <0x12540000 0x100>;
92 interrupts = <0 76 0>;
93 status = "disabled";
94 };
95
96 serial@13800000 {
97 compatible = "samsung,exynos4210-uart";
98 reg = <0x13800000 0x100>;
99 interrupts = <0 52 0>;
100 status = "disabled";
101 };
102
103 serial@13810000 {
104 compatible = "samsung,exynos4210-uart";
105 reg = <0x13810000 0x100>;
106 interrupts = <0 53 0>;
107 status = "disabled";
108 };
109
110 serial@13820000 {
111 compatible = "samsung,exynos4210-uart";
112 reg = <0x13820000 0x100>;
113 interrupts = <0 54 0>;
114 status = "disabled";
115 };
116
117 serial@13830000 {
118 compatible = "samsung,exynos4210-uart";
119 reg = <0x13830000 0x100>;
120 interrupts = <0 55 0>;
121 status = "disabled";
122 };
123
124 i2c@13860000 {
125 #address-cells = <1>;
126 #size-cells = <0>;
127 compatible = "samsung,s3c2440-i2c";
128 reg = <0x13860000 0x100>;
129 interrupts = <0 58 0>;
130 status = "disabled";
131 };
132
133 i2c@13870000 {
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "samsung,s3c2440-i2c";
137 reg = <0x13870000 0x100>;
138 interrupts = <0 59 0>;
139 status = "disabled";
140 };
141
142 i2c@13880000 {
143 #address-cells = <1>;
144 #size-cells = <0>;
145 compatible = "samsung,s3c2440-i2c";
146 reg = <0x13880000 0x100>;
147 interrupts = <0 60 0>;
148 status = "disabled";
149 };
150
151 i2c@13890000 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "samsung,s3c2440-i2c";
155 reg = <0x13890000 0x100>;
156 interrupts = <0 61 0>;
157 status = "disabled";
158 };
159
160 i2c@138A0000 {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "samsung,s3c2440-i2c";
164 reg = <0x138A0000 0x100>;
165 interrupts = <0 62 0>;
166 status = "disabled";
167 };
168
169 i2c@138B0000 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "samsung,s3c2440-i2c";
173 reg = <0x138B0000 0x100>;
174 interrupts = <0 63 0>;
175 status = "disabled";
176 };
177
178 i2c@138C0000 {
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "samsung,s3c2440-i2c";
182 reg = <0x138C0000 0x100>;
183 interrupts = <0 64 0>;
184 status = "disabled";
185 };
186
187 i2c@138D0000 {
188 #address-cells = <1>;
189 #size-cells = <0>;
190 compatible = "samsung,s3c2440-i2c";
191 reg = <0x138D0000 0x100>;
192 interrupts = <0 65 0>;
193 status = "disabled";
194 };
195
196 spi_0: spi@13920000 {
197 compatible = "samsung,exynos4210-spi";
198 reg = <0x13920000 0x100>;
199 interrupts = <0 66 0>;
200 tx-dma-channel = <&pdma0 7>; /* preliminary */
201 rx-dma-channel = <&pdma0 6>; /* preliminary */
202 #address-cells = <1>;
203 #size-cells = <0>;
204 status = "disabled";
205 };
206
207 spi_1: spi@13930000 {
208 compatible = "samsung,exynos4210-spi";
209 reg = <0x13930000 0x100>;
210 interrupts = <0 67 0>;
211 tx-dma-channel = <&pdma1 7>; /* preliminary */
212 rx-dma-channel = <&pdma1 6>; /* preliminary */
213 #address-cells = <1>;
214 #size-cells = <0>;
215 status = "disabled";
216 };
217
218 spi_2: spi@13940000 {
219 compatible = "samsung,exynos4210-spi";
220 reg = <0x13940000 0x100>;
221 interrupts = <0 68 0>;
222 tx-dma-channel = <&pdma0 9>; /* preliminary */
223 rx-dma-channel = <&pdma0 8>; /* preliminary */
224 #address-cells = <1>;
225 #size-cells = <0>;
226 status = "disabled";
227 };
228
229 amba {
230 #address-cells = <1>;
231 #size-cells = <1>;
232 compatible = "arm,amba-bus";
233 interrupt-parent = <&gic>;
234 ranges;
235
236 pdma0: pdma@12680000 {
237 compatible = "arm,pl330", "arm,primecell";
238 reg = <0x12680000 0x1000>;
239 interrupts = <0 35 0>;
240 };
241
242 pdma1: pdma@12690000 {
243 compatible = "arm,pl330", "arm,primecell";
244 reg = <0x12690000 0x1000>;
245 interrupts = <0 36 0>;
246 };
247 };
248};
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index d69a7999a12b..3e68f52e8454 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -40,6 +40,7 @@
40 <&gpk2 4 2 3 3>, 40 <&gpk2 4 2 3 3>,
41 <&gpk2 5 2 3 3>, 41 <&gpk2 5 2 3 3>,
42 <&gpk2 6 2 3 3>; 42 <&gpk2 6 2 3 3>;
43 status = "okay";
43 }; 44 };
44 45
45 sdhci@12510000 { 46 sdhci@12510000 {
@@ -53,6 +54,7 @@
53 <&gpk0 4 2 3 3>, 54 <&gpk0 4 2 3 3>,
54 <&gpk0 5 2 3 3>, 55 <&gpk0 5 2 3 3>,
55 <&gpk0 6 2 3 3>; 56 <&gpk0 6 2 3 3>;
57 status = "okay";
56 }; 58 };
57 59
58 gpio_keys { 60 gpio_keys {
@@ -64,30 +66,35 @@
64 label = "Up"; 66 label = "Up";
65 gpios = <&gpx2 0 0 0x10000 2>; 67 gpios = <&gpx2 0 0 0x10000 2>;
66 linux,code = <103>; 68 linux,code = <103>;
69 gpio-key,wakeup;
67 }; 70 };
68 71
69 down { 72 down {
70 label = "Down"; 73 label = "Down";
71 gpios = <&gpx2 1 0 0x10000 2>; 74 gpios = <&gpx2 1 0 0x10000 2>;
72 linux,code = <108>; 75 linux,code = <108>;
76 gpio-key,wakeup;
73 }; 77 };
74 78
75 back { 79 back {
76 label = "Back"; 80 label = "Back";
77 gpios = <&gpx1 7 0 0x10000 2>; 81 gpios = <&gpx1 7 0 0x10000 2>;
78 linux,code = <158>; 82 linux,code = <158>;
83 gpio-key,wakeup;
79 }; 84 };
80 85
81 home { 86 home {
82 label = "Home"; 87 label = "Home";
83 gpios = <&gpx1 6 0 0x10000 2>; 88 gpios = <&gpx1 6 0 0x10000 2>;
84 linux,code = <102>; 89 linux,code = <102>;
90 gpio-key,wakeup;
85 }; 91 };
86 92
87 menu { 93 menu {
88 label = "Menu"; 94 label = "Menu";
89 gpios = <&gpx1 5 0 0x10000 2>; 95 gpios = <&gpx1 5 0 0x10000 2>;
90 linux,code = <139>; 96 linux,code = <139>;
97 gpio-key,wakeup;
91 }; 98 };
92 }; 99 };
93 100
@@ -98,60 +105,4 @@
98 linux,default-trigger = "heartbeat"; 105 linux,default-trigger = "heartbeat";
99 }; 106 };
100 }; 107 };
101
102 keypad@100A0000 {
103 status = "disabled";
104 };
105
106 sdhci@12520000 {
107 status = "disabled";
108 };
109
110 sdhci@12540000 {
111 status = "disabled";
112 };
113
114 i2c@13860000 {
115 status = "disabled";
116 };
117
118 i2c@13870000 {
119 status = "disabled";
120 };
121
122 i2c@13880000 {
123 status = "disabled";
124 };
125
126 i2c@13890000 {
127 status = "disabled";
128 };
129
130 i2c@138A0000 {
131 status = "disabled";
132 };
133
134 i2c@138B0000 {
135 status = "disabled";
136 };
137
138 i2c@138C0000 {
139 status = "disabled";
140 };
141
142 i2c@138D0000 {
143 status = "disabled";
144 };
145
146 spi_0: spi@13920000 {
147 status = "disabled";
148 };
149
150 spi_1: spi@13930000 {
151 status = "disabled";
152 };
153
154 spi_2: spi@13940000 {
155 status = "disabled";
156 };
157}; 108};
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 1beccc8f14ff..63610c3ba3af 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -26,7 +26,7 @@
26 }; 26 };
27 27
28 chosen { 28 chosen {
29 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; 29 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
30 }; 30 };
31 31
32 sdhci@12530000 { 32 sdhci@12530000 {
@@ -40,6 +40,7 @@
40 <&gpk2 4 2 3 3>, 40 <&gpk2 4 2 3 3>,
41 <&gpk2 5 2 3 3>, 41 <&gpk2 5 2 3 3>,
42 <&gpk2 6 2 3 3>; 42 <&gpk2 6 2 3 3>;
43 status = "okay";
43 }; 44 };
44 45
45 keypad@100A0000 { 46 keypad@100A0000 {
@@ -47,6 +48,7 @@
47 samsung,keypad-num-columns = <8>; 48 samsung,keypad-num-columns = <8>;
48 linux,keypad-no-autorepeat; 49 linux,keypad-no-autorepeat;
49 linux,keypad-wakeup; 50 linux,keypad-wakeup;
51 status = "okay";
50 52
51 row-gpios = <&gpx2 0 3 3 0>, 53 row-gpios = <&gpx2 0 3 3 0>,
52 <&gpx2 1 3 3 0>; 54 <&gpx2 1 3 3 0>;
@@ -128,6 +130,7 @@
128 samsung,i2c-max-bus-freq = <20000>; 130 samsung,i2c-max-bus-freq = <20000>;
129 gpios = <&gpd1 0 2 3 0>, 131 gpios = <&gpd1 0 2 3 0>,
130 <&gpd1 1 2 3 0>; 132 <&gpd1 1 2 3 0>;
133 status = "okay";
131 134
132 eeprom@50 { 135 eeprom@50 {
133 compatible = "samsung,24ad0xd1"; 136 compatible = "samsung,24ad0xd1";
@@ -140,58 +143,11 @@
140 }; 143 };
141 }; 144 };
142 145
143 sdhci@12510000 {
144 status = "disabled";
145 };
146
147 sdhci@12520000 {
148 status = "disabled";
149 };
150
151 sdhci@12540000 {
152 status = "disabled";
153 };
154
155 i2c@13870000 {
156 status = "disabled";
157 };
158
159 i2c@13880000 {
160 status = "disabled";
161 };
162
163 i2c@13890000 {
164 status = "disabled";
165 };
166
167 i2c@138A0000 {
168 status = "disabled";
169 };
170
171 i2c@138B0000 {
172 status = "disabled";
173 };
174
175 i2c@138C0000 {
176 status = "disabled";
177 };
178
179 i2c@138D0000 {
180 status = "disabled";
181 };
182
183 spi_0: spi@13920000 {
184 status = "disabled";
185 };
186
187 spi_1: spi@13930000 {
188 status = "disabled";
189 };
190
191 spi_2: spi@13940000 { 146 spi_2: spi@13940000 {
192 gpios = <&gpc1 1 5 3 0>, 147 gpios = <&gpc1 1 5 3 0>,
193 <&gpc1 3 5 3 0>, 148 <&gpc1 3 5 3 0>,
194 <&gpc1 4 5 3 0>; 149 <&gpc1 4 5 3 0>;
150 status = "okay";
195 151
196 w25x80@0 { 152 w25x80@0 {
197 #address-cells = <1>; 153 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
new file mode 100644
index 000000000000..73567b843e72
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -0,0 +1,237 @@
1/*
2 * Samsung's Exynos4210 based Trats board device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Device tree source file for Samsung's Trats board which is based on
8 * Samsung's Exynos4210 SoC.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/dts-v1/;
16/include/ "exynos4210.dtsi"
17
18/ {
19 model = "Samsung Trats based on Exynos4210";
20 compatible = "samsung,trats", "samsung,exynos4210";
21
22 memory {
23 reg = <0x40000000 0x20000000
24 0x60000000 0x20000000>;
25 };
26
27 chosen {
28 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
29 };
30
31 vemmc_reg: voltage-regulator@0 {
32 compatible = "regulator-fixed";
33 regulator-name = "VMEM_VDD_2.8V";
34 regulator-min-microvolt = <2800000>;
35 regulator-max-microvolt = <2800000>;
36 gpio = <&gpk0 2 1 0 0>;
37 enable-active-high;
38 };
39
40 sdhci_emmc: sdhci@12510000 {
41 bus-width = <8>;
42 non-removable;
43 broken-voltage;
44 gpios = <&gpk0 0 2 0 3>,
45 <&gpk0 1 2 0 3>,
46 <&gpk0 3 2 2 3>,
47 <&gpk0 4 2 2 3>,
48 <&gpk0 5 2 2 3>,
49 <&gpk0 6 2 2 3>,
50 <&gpk1 3 3 3 3>,
51 <&gpk1 4 3 3 3>,
52 <&gpk1 5 3 3 3>,
53 <&gpk1 6 3 3 3>;
54 vmmc-supply = <&vemmc_reg>;
55 status = "okay";
56 };
57
58 serial@13800000 {
59 status = "okay";
60 };
61
62 serial@13810000 {
63 status = "okay";
64 };
65
66 serial@13820000 {
67 status = "okay";
68 };
69
70 serial@13830000 {
71 status = "okay";
72 };
73
74 i2c@138B0000 {
75 samsung,i2c-sda-delay = <100>;
76 samsung,i2c-slave-addr = <0x10>;
77 samsung,i2c-max-bus-freq = <100000>;
78 gpios = <&gpb 6 3 3 0>,
79 <&gpb 7 3 3 0>;
80 status = "okay";
81
82 max8997_pmic@66 {
83 compatible = "maxim,max8997-pmic";
84
85 reg = <0x66>;
86
87 max8997,pmic-buck1-uses-gpio-dvs;
88 max8997,pmic-buck2-uses-gpio-dvs;
89 max8997,pmic-buck5-uses-gpio-dvs;
90
91 max8997,pmic-ignore-gpiodvs-side-effect;
92 max8997,pmic-buck125-default-dvs-idx = <0>;
93
94 max8997,pmic-buck125-dvs-gpios = <&gpx0 5 1 0 0>,
95 <&gpx0 6 1 0 0>,
96 <&gpl0 0 1 0 0>;
97
98 max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>,
99 <1250000>, <1200000>,
100 <1150000>, <1100000>,
101 <1000000>, <950000>;
102
103 max8997,pmic-buck2-dvs-voltage = <1100000>, <1000000>,
104 <950000>, <900000>,
105 <1100000>, <1000000>,
106 <950000>, <900000>;
107
108 max8997,pmic-buck5-dvs-voltage = <1200000>, <1200000>,
109 <1200000>, <1200000>,
110 <1200000>, <1200000>,
111 <1200000>, <1200000>;
112
113 regulators {
114 valive_reg: LDO2 {
115 regulator-name = "VALIVE_1.1V_C210";
116 regulator-min-microvolt = <1100000>;
117 regulator-max-microvolt = <1100000>;
118 regulator-always-on;
119 };
120
121 vusb_reg: LDO3 {
122 regulator-name = "VUSB_1.1V_C210";
123 regulator-min-microvolt = <1100000>;
124 regulator-max-microvolt = <1100000>;
125 };
126
127 vmipi_reg: LDO4 {
128 regulator-name = "VMIPI_1.8V";
129 regulator-min-microvolt = <1800000>;
130 regulator-max-microvolt = <1800000>;
131 };
132
133 vpda_reg: LDO6 {
134 regulator-name = "VCC_1.8V_PDA";
135 regulator-min-microvolt = <1800000>;
136 regulator-max-microvolt = <1800000>;
137 regulator-always-on;
138 };
139
140 vcam_reg: LDO7 {
141 regulator-name = "CAM_ISP_1.8V";
142 regulator-min-microvolt = <1800000>;
143 regulator-max-microvolt = <1800000>;
144 };
145
146 vusbdac_reg: LDO8 {
147 regulator-name = "VUSB/VDAC_3.3V_C210";
148 regulator-min-microvolt = <3300000>;
149 regulator-max-microvolt = <3300000>;
150 };
151
152 vccpda_reg: LDO9 {
153 regulator-name = "VCC_2.8V_PDA";
154 regulator-min-microvolt = <2800000>;
155 regulator-max-microvolt = <2800000>;
156 regulator-always-on;
157 };
158
159 vpll_reg: LDO10 {
160 regulator-name = "VPLL_1.1V_C210";
161 regulator-min-microvolt = <1100000>;
162 regulator-max-microvolt = <1100000>;
163 regulator-always-on;
164 };
165
166 vcclcd_reg: LDO13 {
167 regulator-name = "VCC_3.3V_LCD";
168 regulator-min-microvolt = <3300000>;
169 regulator-max-microvolt = <3300000>;
170 };
171
172 vlcd_reg: LDO15 {
173 regulator-name = "VLCD_2.2V";
174 regulator-min-microvolt = <2200000>;
175 regulator-max-microvolt = <2200000>;
176 };
177
178 camsensor_reg: LDO16 {
179 regulator-name = "CAM_SENSOR_IO_1.8V";
180 regulator-min-microvolt = <1800000>;
181 regulator-max-microvolt = <1800000>;
182 };
183
184 vddq_reg: LDO21 {
185 regulator-name = "VDDQ_M1M2_1.2V";
186 regulator-min-microvolt = <1200000>;
187 regulator-max-microvolt = <1200000>;
188 regulator-always-on;
189 };
190
191 varm_breg: BUCK1 {
192 regulator-name = "VARM_1.2V_C210";
193 regulator-min-microvolt = <900000>;
194 regulator-max-microvolt = <1350000>;
195 regulator-always-on;
196 };
197
198 vint_breg: BUCK2 {
199 regulator-name = "VINT_1.1V_C210";
200 regulator-min-microvolt = <900000>;
201 regulator-max-microvolt = <1100000>;
202 regulator-always-on;
203 };
204
205 camisp_breg: BUCK4 {
206 regulator-name = "CAM_ISP_CORE_1.2V";
207 regulator-min-microvolt = <1200000>;
208 regulator-max-microvolt = <1200000>;
209 };
210
211 vmem_breg: BUCK5 {
212 regulator-name = "VMEM_1.2V_C210";
213 regulator-min-microvolt = <1200000>;
214 regulator-max-microvolt = <1200000>;
215 regulator-always-on;
216 };
217
218 vccsub_breg: BUCK7 {
219 regulator-name = "VCC_SUB_2.0V";
220 regulator-min-microvolt = <2000000>;
221 regulator-max-microvolt = <2000000>;
222 regulator-always-on;
223 };
224
225 safe1_sreg: ESAFEOUT1 {
226 regulator-name = "SAFEOUT1";
227 regulator-always-on;
228 };
229
230 safe2_sreg: ESAFEOUT2 {
231 regulator-name = "SAFEOUT2";
232 regulator-boot-on;
233 };
234 };
235 };
236 };
237};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index a4bd0c9a206e..214c557eda7f 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -19,35 +19,23 @@
19 * published by the Free Software Foundation. 19 * published by the Free Software Foundation.
20*/ 20*/
21 21
22/include/ "skeleton.dtsi" 22/include/ "exynos4.dtsi"
23/include/ "exynos4210-pinctrl.dtsi" 23/include/ "exynos4210-pinctrl.dtsi"
24 24
25/ { 25/ {
26 compatible = "samsung,exynos4210"; 26 compatible = "samsung,exynos4210";
27 interrupt-parent = <&gic>;
28 27
29 aliases { 28 aliases {
30 spi0 = &spi_0;
31 spi1 = &spi_1;
32 spi2 = &spi_2;
33 pinctrl0 = &pinctrl_0; 29 pinctrl0 = &pinctrl_0;
34 pinctrl1 = &pinctrl_1; 30 pinctrl1 = &pinctrl_1;
35 pinctrl2 = &pinctrl_2; 31 pinctrl2 = &pinctrl_2;
36 }; 32 };
37 33
38 gic:interrupt-controller@10490000 { 34 gic:interrupt-controller@10490000 {
39 compatible = "arm,cortex-a9-gic";
40 #interrupt-cells = <3>;
41 interrupt-controller;
42 cpu-offset = <0x8000>; 35 cpu-offset = <0x8000>;
43 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
44 }; 36 };
45 37
46 combiner:interrupt-controller@10440000 { 38 combiner:interrupt-controller@10440000 {
47 compatible = "samsung,exynos4210-combiner";
48 #interrupt-cells = <2>;
49 interrupt-controller;
50 reg = <0x10440000 0x1000>;
51 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, 39 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
52 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, 40 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
53 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, 41 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
@@ -75,10 +63,10 @@
75 interrupt-controller; 63 interrupt-controller;
76 #interrupt-cells = <2>; 64 #interrupt-cells = <2>;
77 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, 65 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
78 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, 66 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
79 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, 67 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
80 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>, 68 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
81 <0 32 0>; 69 <0 32 0>;
82 }; 70 };
83 }; 71 };
84 72
@@ -87,170 +75,6 @@
87 reg = <0x03860000 0x1000>; 75 reg = <0x03860000 0x1000>;
88 }; 76 };
89 77
90 watchdog@10060000 {
91 compatible = "samsung,s3c2410-wdt";
92 reg = <0x10060000 0x100>;
93 interrupts = <0 43 0>;
94 };
95
96 rtc@10070000 {
97 compatible = "samsung,s3c6410-rtc";
98 reg = <0x10070000 0x100>;
99 interrupts = <0 44 0>, <0 45 0>;
100 };
101
102 keypad@100A0000 {
103 compatible = "samsung,s5pv210-keypad";
104 reg = <0x100A0000 0x100>;
105 interrupts = <0 109 0>;
106 };
107
108 sdhci@12510000 {
109 compatible = "samsung,exynos4210-sdhci";
110 reg = <0x12510000 0x100>;
111 interrupts = <0 73 0>;
112 };
113
114 sdhci@12520000 {
115 compatible = "samsung,exynos4210-sdhci";
116 reg = <0x12520000 0x100>;
117 interrupts = <0 74 0>;
118 };
119
120 sdhci@12530000 {
121 compatible = "samsung,exynos4210-sdhci";
122 reg = <0x12530000 0x100>;
123 interrupts = <0 75 0>;
124 };
125
126 sdhci@12540000 {
127 compatible = "samsung,exynos4210-sdhci";
128 reg = <0x12540000 0x100>;
129 interrupts = <0 76 0>;
130 };
131
132 serial@13800000 {
133 compatible = "samsung,exynos4210-uart";
134 reg = <0x13800000 0x100>;
135 interrupts = <0 52 0>;
136 };
137
138 serial@13810000 {
139 compatible = "samsung,exynos4210-uart";
140 reg = <0x13810000 0x100>;
141 interrupts = <0 53 0>;
142 };
143
144 serial@13820000 {
145 compatible = "samsung,exynos4210-uart";
146 reg = <0x13820000 0x100>;
147 interrupts = <0 54 0>;
148 };
149
150 serial@13830000 {
151 compatible = "samsung,exynos4210-uart";
152 reg = <0x13830000 0x100>;
153 interrupts = <0 55 0>;
154 };
155
156 i2c@13860000 {
157 compatible = "samsung,s3c2440-i2c";
158 reg = <0x13860000 0x100>;
159 interrupts = <0 58 0>;
160 };
161
162 i2c@13870000 {
163 compatible = "samsung,s3c2440-i2c";
164 reg = <0x13870000 0x100>;
165 interrupts = <0 59 0>;
166 };
167
168 i2c@13880000 {
169 compatible = "samsung,s3c2440-i2c";
170 reg = <0x13880000 0x100>;
171 interrupts = <0 60 0>;
172 };
173
174 i2c@13890000 {
175 compatible = "samsung,s3c2440-i2c";
176 reg = <0x13890000 0x100>;
177 interrupts = <0 61 0>;
178 };
179
180 i2c@138A0000 {
181 compatible = "samsung,s3c2440-i2c";
182 reg = <0x138A0000 0x100>;
183 interrupts = <0 62 0>;
184 };
185
186 i2c@138B0000 {
187 compatible = "samsung,s3c2440-i2c";
188 reg = <0x138B0000 0x100>;
189 interrupts = <0 63 0>;
190 };
191
192 i2c@138C0000 {
193 compatible = "samsung,s3c2440-i2c";
194 reg = <0x138C0000 0x100>;
195 interrupts = <0 64 0>;
196 };
197
198 i2c@138D0000 {
199 compatible = "samsung,s3c2440-i2c";
200 reg = <0x138D0000 0x100>;
201 interrupts = <0 65 0>;
202 };
203
204 spi_0: spi@13920000 {
205 compatible = "samsung,exynos4210-spi";
206 reg = <0x13920000 0x100>;
207 interrupts = <0 66 0>;
208 tx-dma-channel = <&pdma0 7>; /* preliminary */
209 rx-dma-channel = <&pdma0 6>; /* preliminary */
210 #address-cells = <1>;
211 #size-cells = <0>;
212 };
213
214 spi_1: spi@13930000 {
215 compatible = "samsung,exynos4210-spi";
216 reg = <0x13930000 0x100>;
217 interrupts = <0 67 0>;
218 tx-dma-channel = <&pdma1 7>; /* preliminary */
219 rx-dma-channel = <&pdma1 6>; /* preliminary */
220 #address-cells = <1>;
221 #size-cells = <0>;
222 };
223
224 spi_2: spi@13940000 {
225 compatible = "samsung,exynos4210-spi";
226 reg = <0x13940000 0x100>;
227 interrupts = <0 68 0>;
228 tx-dma-channel = <&pdma0 9>; /* preliminary */
229 rx-dma-channel = <&pdma0 8>; /* preliminary */
230 #address-cells = <1>;
231 #size-cells = <0>;
232 };
233
234 amba {
235 #address-cells = <1>;
236 #size-cells = <1>;
237 compatible = "arm,amba-bus";
238 interrupt-parent = <&gic>;
239 ranges;
240
241 pdma0: pdma@12680000 {
242 compatible = "arm,pl330", "arm,primecell";
243 reg = <0x12680000 0x1000>;
244 interrupts = <0 35 0>;
245 };
246
247 pdma1: pdma@12690000 {
248 compatible = "arm,pl330", "arm,primecell";
249 reg = <0x12690000 0x1000>;
250 interrupts = <0 36 0>;
251 };
252 };
253
254 gpio-controllers { 78 gpio-controllers {
255 #address-cells = <1>; 79 #address-cells = <1>;
256 #size-cells = <1>; 80 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 8a5e348793c7..a352df403b7a 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -16,12 +16,19 @@
16 model = "SAMSUNG SMDK5250 board based on EXYNOS5250"; 16 model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
17 compatible = "samsung,smdk5250", "samsung,exynos5250"; 17 compatible = "samsung,smdk5250", "samsung,exynos5250";
18 18
19 aliases {
20 mshc0 = &dwmmc_0;
21 mshc1 = &dwmmc_1;
22 mshc2 = &dwmmc_2;
23 mshc3 = &dwmmc_3;
24 };
25
19 memory { 26 memory {
20 reg = <0x40000000 0x80000000>; 27 reg = <0x40000000 0x80000000>;
21 }; 28 };
22 29
23 chosen { 30 chosen {
24 bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200"; 31 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
25 }; 32 };
26 33
27 i2c@12C60000 { 34 i2c@12C60000 {
@@ -72,6 +79,56 @@
72 status = "disabled"; 79 status = "disabled";
73 }; 80 };
74 81
82 dwmmc_0: dwmmc0@12200000 {
83 num-slots = <1>;
84 supports-highspeed;
85 broken-cd;
86 fifo-depth = <0x80>;
87 card-detect-delay = <200>;
88 samsung,dw-mshc-ciu-div = <3>;
89 samsung,dw-mshc-sdr-timing = <2 3 3>;
90 samsung,dw-mshc-ddr-timing = <1 2 3>;
91
92 slot@0 {
93 reg = <0>;
94 bus-width = <8>;
95 gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
96 <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
97 <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
98 <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
99 <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
100 };
101 };
102
103 dwmmc_1: dwmmc1@12210000 {
104 status = "disabled";
105 };
106
107 dwmmc_2: dwmmc2@12220000 {
108 num-slots = <1>;
109 supports-highspeed;
110 fifo-depth = <0x80>;
111 card-detect-delay = <200>;
112 samsung,dw-mshc-ciu-div = <3>;
113 samsung,dw-mshc-sdr-timing = <2 3 3>;
114 samsung,dw-mshc-ddr-timing = <1 2 3>;
115
116 slot@0 {
117 reg = <0>;
118 bus-width = <4>;
119 samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
120 gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
121 <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
122 <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>,
123 <&gpc4 3 3 3 3>, <&gpc4 3 3 3 3>,
124 <&gpc4 5 3 3 3>, <&gpc4 6 3 3 3>;
125 };
126 };
127
128 dwmmc_3: dwmmc3@12230000 {
129 status = "disabled";
130 };
131
75 spi_0: spi@12d20000 { 132 spi_0: spi@12d20000 {
76 status = "disabled"; 133 status = "disabled";
77 }; 134 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b55794b494b4..dddfd6e444dc 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -186,6 +186,38 @@
186 #size-cells = <0>; 186 #size-cells = <0>;
187 }; 187 };
188 188
189 dwmmc0@12200000 {
190 compatible = "samsung,exynos5250-dw-mshc";
191 reg = <0x12200000 0x1000>;
192 interrupts = <0 75 0>;
193 #address-cells = <1>;
194 #size-cells = <0>;
195 };
196
197 dwmmc1@12210000 {
198 compatible = "samsung,exynos5250-dw-mshc";
199 reg = <0x12210000 0x1000>;
200 interrupts = <0 76 0>;
201 #address-cells = <1>;
202 #size-cells = <0>;
203 };
204
205 dwmmc2@12220000 {
206 compatible = "samsung,exynos5250-dw-mshc";
207 reg = <0x12220000 0x1000>;
208 interrupts = <0 77 0>;
209 #address-cells = <1>;
210 #size-cells = <0>;
211 };
212
213 dwmmc3@12230000 {
214 compatible = "samsung,exynos5250-dw-mshc";
215 reg = <0x12230000 0x1000>;
216 interrupts = <0 78 0>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219 };
220
189 amba { 221 amba {
190 #address-cells = <1>; 222 #address-cells = <1>;
191 #size-cells = <1>; 223 #size-cells = <1>;
diff --git a/arch/arm/mach-exynos/Makefile.boot b/arch/arm/mach-exynos/Makefile.boot
index 31bd181b0514..a79d999725cb 100644
--- a/arch/arm/mach-exynos/Makefile.boot
+++ b/arch/arm/mach-exynos/Makefile.boot
@@ -1,5 +1,5 @@
1 zreladdr-y += 0x40008000 1 zreladdr-y += 0x40008000
2params_phys-y := 0x40000100 2params_phys-y := 0x40000100
3 3
4dtb-$(CONFIG_MACH_EXYNOS4_DT) += exynos4210-origen.dtb exynos4210-smdkv310.dtb 4dtb-$(CONFIG_MACH_EXYNOS4_DT) += exynos4210-origen.dtb exynos4210-smdkv310.dtb exynos4210-trats.dtb
5dtb-$(CONFIG_MACH_EXYNOS5_DT) += exynos5250-smdk5250.dtb 5dtb-$(CONFIG_MACH_EXYNOS5_DT) += exynos5250-smdk5250.dtb
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index f3171c3f3d94..c44ca1ee1b8d 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -626,35 +626,30 @@ static struct clk exynos5_init_clocks_off[] = {
626 .enable = exynos5_clk_ip_peris_ctrl, 626 .enable = exynos5_clk_ip_peris_ctrl,
627 .ctrlbit = (1 << 19), 627 .ctrlbit = (1 << 19),
628 }, { 628 }, {
629 .name = "hsmmc", 629 .name = "biu", /* bus interface unit clock */
630 .devname = "exynos4-sdhci.0", 630 .devname = "dw_mmc.0",
631 .parent = &exynos5_clk_aclk_200.clk, 631 .parent = &exynos5_clk_aclk_200.clk,
632 .enable = exynos5_clk_ip_fsys_ctrl, 632 .enable = exynos5_clk_ip_fsys_ctrl,
633 .ctrlbit = (1 << 12), 633 .ctrlbit = (1 << 12),
634 }, { 634 }, {
635 .name = "hsmmc", 635 .name = "biu",
636 .devname = "exynos4-sdhci.1", 636 .devname = "dw_mmc.1",
637 .parent = &exynos5_clk_aclk_200.clk, 637 .parent = &exynos5_clk_aclk_200.clk,
638 .enable = exynos5_clk_ip_fsys_ctrl, 638 .enable = exynos5_clk_ip_fsys_ctrl,
639 .ctrlbit = (1 << 13), 639 .ctrlbit = (1 << 13),
640 }, { 640 }, {
641 .name = "hsmmc", 641 .name = "biu",
642 .devname = "exynos4-sdhci.2", 642 .devname = "dw_mmc.2",
643 .parent = &exynos5_clk_aclk_200.clk, 643 .parent = &exynos5_clk_aclk_200.clk,
644 .enable = exynos5_clk_ip_fsys_ctrl, 644 .enable = exynos5_clk_ip_fsys_ctrl,
645 .ctrlbit = (1 << 14), 645 .ctrlbit = (1 << 14),
646 }, { 646 }, {
647 .name = "hsmmc", 647 .name = "biu",
648 .devname = "exynos4-sdhci.3", 648 .devname = "dw_mmc.3",
649 .parent = &exynos5_clk_aclk_200.clk, 649 .parent = &exynos5_clk_aclk_200.clk,
650 .enable = exynos5_clk_ip_fsys_ctrl, 650 .enable = exynos5_clk_ip_fsys_ctrl,
651 .ctrlbit = (1 << 15), 651 .ctrlbit = (1 << 15),
652 }, { 652 }, {
653 .name = "dwmci",
654 .parent = &exynos5_clk_aclk_200.clk,
655 .enable = exynos5_clk_ip_fsys_ctrl,
656 .ctrlbit = (1 << 16),
657 }, {
658 .name = "sata", 653 .name = "sata",
659 .devname = "ahci", 654 .devname = "ahci",
660 .enable = exynos5_clk_ip_fsys_ctrl, 655 .enable = exynos5_clk_ip_fsys_ctrl,
@@ -1095,8 +1090,8 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = {
1095 1090
1096static struct clksrc_clk exynos5_clk_sclk_mmc0 = { 1091static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
1097 .clk = { 1092 .clk = {
1098 .name = "sclk_mmc", 1093 .name = "ciu", /* card interface unit clock */
1099 .devname = "exynos4-sdhci.0", 1094 .devname = "dw_mmc.0",
1100 .parent = &exynos5_clk_dout_mmc0.clk, 1095 .parent = &exynos5_clk_dout_mmc0.clk,
1101 .enable = exynos5_clksrc_mask_fsys_ctrl, 1096 .enable = exynos5_clksrc_mask_fsys_ctrl,
1102 .ctrlbit = (1 << 0), 1097 .ctrlbit = (1 << 0),
@@ -1106,8 +1101,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
1106 1101
1107static struct clksrc_clk exynos5_clk_sclk_mmc1 = { 1102static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
1108 .clk = { 1103 .clk = {
1109 .name = "sclk_mmc", 1104 .name = "ciu",
1110 .devname = "exynos4-sdhci.1", 1105 .devname = "dw_mmc.1",
1111 .parent = &exynos5_clk_dout_mmc1.clk, 1106 .parent = &exynos5_clk_dout_mmc1.clk,
1112 .enable = exynos5_clksrc_mask_fsys_ctrl, 1107 .enable = exynos5_clksrc_mask_fsys_ctrl,
1113 .ctrlbit = (1 << 4), 1108 .ctrlbit = (1 << 4),
@@ -1117,8 +1112,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
1117 1112
1118static struct clksrc_clk exynos5_clk_sclk_mmc2 = { 1113static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
1119 .clk = { 1114 .clk = {
1120 .name = "sclk_mmc", 1115 .name = "ciu",
1121 .devname = "exynos4-sdhci.2", 1116 .devname = "dw_mmc.2",
1122 .parent = &exynos5_clk_dout_mmc2.clk, 1117 .parent = &exynos5_clk_dout_mmc2.clk,
1123 .enable = exynos5_clksrc_mask_fsys_ctrl, 1118 .enable = exynos5_clksrc_mask_fsys_ctrl,
1124 .ctrlbit = (1 << 8), 1119 .ctrlbit = (1 << 8),
@@ -1128,8 +1123,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
1128 1123
1129static struct clksrc_clk exynos5_clk_sclk_mmc3 = { 1124static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
1130 .clk = { 1125 .clk = {
1131 .name = "sclk_mmc", 1126 .name = "ciu",
1132 .devname = "exynos4-sdhci.3", 1127 .devname = "dw_mmc.3",
1133 .parent = &exynos5_clk_dout_mmc3.clk, 1128 .parent = &exynos5_clk_dout_mmc3.clk,
1134 .enable = exynos5_clksrc_mask_fsys_ctrl, 1129 .enable = exynos5_clksrc_mask_fsys_ctrl,
1135 .ctrlbit = (1 << 12), 1130 .ctrlbit = (1 << 12),
@@ -1215,14 +1210,6 @@ struct clksrc_clk exynos5_clk_sclk_fimd1 = {
1215static struct clksrc_clk exynos5_clksrcs[] = { 1210static struct clksrc_clk exynos5_clksrcs[] = {
1216 { 1211 {
1217 .clk = { 1212 .clk = {
1218 .name = "sclk_dwmci",
1219 .parent = &exynos5_clk_dout_mmc4.clk,
1220 .enable = exynos5_clksrc_mask_fsys_ctrl,
1221 .ctrlbit = (1 << 16),
1222 },
1223 .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 },
1224 }, {
1225 .clk = {
1226 .name = "aclk_266_gscl", 1213 .name = "aclk_266_gscl",
1227 }, 1214 },
1228 .sources = &clk_src_gscl_266, 1215 .sources = &clk_src_gscl_266,
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 5aa77f996e59..8480849affb9 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -177,6 +177,10 @@
177 177
178#define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) 178#define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
179#define EXYNOS4_PA_DWMCI 0x12550000 179#define EXYNOS4_PA_DWMCI 0x12550000
180#define EXYNOS5_PA_DWMCI0 0x12200000
181#define EXYNOS5_PA_DWMCI1 0x12210000
182#define EXYNOS5_PA_DWMCI2 0x12220000
183#define EXYNOS5_PA_DWMCI3 0x12230000
180 184
181#define EXYNOS4_PA_HSOTG 0x12480000 185#define EXYNOS4_PA_HSOTG 0x12480000
182#define EXYNOS4_PA_USB_HSPHY 0x125B0000 186#define EXYNOS4_PA_USB_HSPHY 0x125B0000
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index b2b5d5faa748..e58d786faf78 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Samsung's Exynos4210 flattened device tree enabled machine 2 * Samsung's EXYNOS4 flattened device tree enabled machine
3 * 3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com 5 * http://www.samsung.com
@@ -36,7 +36,7 @@
36 * at some point, the drivers should be capable of parsing all the platform 36 * at some point, the drivers should be capable of parsing all the platform
37 * data from the device tree. 37 * data from the device tree.
38 */ 38 */
39static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = { 39static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = {
40 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS4_PA_UART0, 40 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS4_PA_UART0,
41 "exynos4210-uart.0", NULL), 41 "exynos4210-uart.0", NULL),
42 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS4_PA_UART1, 42 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS4_PA_UART1,
@@ -55,6 +55,20 @@ static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
55 "exynos4-sdhci.3", NULL), 55 "exynos4-sdhci.3", NULL),
56 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(0), 56 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(0),
57 "s3c2440-i2c.0", NULL), 57 "s3c2440-i2c.0", NULL),
58 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(1),
59 "s3c2440-i2c.1", NULL),
60 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(2),
61 "s3c2440-i2c.2", NULL),
62 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(3),
63 "s3c2440-i2c.3", NULL),
64 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(4),
65 "s3c2440-i2c.4", NULL),
66 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(5),
67 "s3c2440-i2c.5", NULL),
68 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(6),
69 "s3c2440-i2c.6", NULL),
70 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(7),
71 "s3c2440-i2c.7", NULL),
58 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS4_PA_SPI0, 72 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS4_PA_SPI0,
59 "exynos4210-spi.0", NULL), 73 "exynos4210-spi.0", NULL),
60 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS4_PA_SPI1, 74 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS4_PA_SPI1,
@@ -66,19 +80,19 @@ static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
66 {}, 80 {},
67}; 81};
68 82
69static void __init exynos4210_dt_map_io(void) 83static void __init exynos4_dt_map_io(void)
70{ 84{
71 exynos_init_io(NULL, 0); 85 exynos_init_io(NULL, 0);
72 s3c24xx_init_clocks(24000000); 86 s3c24xx_init_clocks(24000000);
73} 87}
74 88
75static void __init exynos4210_dt_machine_init(void) 89static void __init exynos4_dt_machine_init(void)
76{ 90{
77 of_platform_populate(NULL, of_default_bus_match_table, 91 of_platform_populate(NULL, of_default_bus_match_table,
78 exynos4210_auxdata_lookup, NULL); 92 exynos4_auxdata_lookup, NULL);
79} 93}
80 94
81static char const *exynos4210_dt_compat[] __initdata = { 95static char const *exynos4_dt_compat[] __initdata = {
82 "samsung,exynos4210", 96 "samsung,exynos4210",
83 NULL 97 NULL
84}; 98};
@@ -86,11 +100,11 @@ static char const *exynos4210_dt_compat[] __initdata = {
86DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") 100DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
87 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */ 101 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
88 .init_irq = exynos4_init_irq, 102 .init_irq = exynos4_init_irq,
89 .map_io = exynos4210_dt_map_io, 103 .map_io = exynos4_dt_map_io,
90 .handle_irq = gic_handle_irq, 104 .handle_irq = gic_handle_irq,
91 .init_machine = exynos4210_dt_machine_init, 105 .init_machine = exynos4_dt_machine_init,
92 .init_late = exynos_init_late, 106 .init_late = exynos_init_late,
93 .timer = &exynos4_timer, 107 .timer = &exynos4_timer,
94 .dt_compat = exynos4210_dt_compat, 108 .dt_compat = exynos4_dt_compat,
95 .restart = exynos4_restart, 109 .restart = exynos4_restart,
96MACHINE_END 110MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index e707eb1b1eab..fee9dcd49fdf 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -47,6 +47,14 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
47 "s3c2440-i2c.0", NULL), 47 "s3c2440-i2c.0", NULL),
48 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1), 48 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
49 "s3c2440-i2c.1", NULL), 49 "s3c2440-i2c.1", NULL),
50 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
51 "dw_mmc.0", NULL),
52 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
53 "dw_mmc.1", NULL),
54 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2,
55 "dw_mmc.2", NULL),
56 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3,
57 "dw_mmc.3", NULL),
50 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0, 58 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
51 "exynos4210-spi.0", NULL), 59 "exynos4210-spi.0", NULL),
52 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1, 60 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-12 20:30:45 -0400