diff options
author | Rob Clark <robdclark@gmail.com> | 2013-11-16 13:07:31 -0500 |
---|---|---|
committer | Rob Clark <robdclark@gmail.com> | 2014-01-09 14:38:58 -0500 |
commit | e529c7e674f000adc8f62ee78f957f6aed38a26e (patch) | |
tree | 306bdb6430e29f90bb71af394217c0a61296ed7b | |
parent | 871d812aa43e6350a4edf41bf7cb0879675255f1 (diff) |
drm/msm: add support for msm8060ab/bstem
This adds the necessary configuration for the APQ8060A SoC (dual-core
krait + a320 gpu) as found on the bstem board.
Signed-off-by: Rob Clark <robdclark@gmail.com>
-rw-r--r-- | drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/hdmi/hdmi.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/mdp4/mdp4_kms.c | 4 |
3 files changed, 19 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c index 16fe15d4f571..f4aa815b690a 100644 --- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c | |||
@@ -219,7 +219,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu) | |||
219 | /* Load PM4: */ | 219 | /* Load PM4: */ |
220 | ptr = (uint32_t *)(adreno_gpu->pm4->data); | 220 | ptr = (uint32_t *)(adreno_gpu->pm4->data); |
221 | len = adreno_gpu->pm4->size / 4; | 221 | len = adreno_gpu->pm4->size / 4; |
222 | DBG("loading PM4 ucode version: %u", ptr[0]); | 222 | DBG("loading PM4 ucode version: %x", ptr[1]); |
223 | 223 | ||
224 | gpu_write(gpu, REG_AXXX_CP_DEBUG, | 224 | gpu_write(gpu, REG_AXXX_CP_DEBUG, |
225 | AXXX_CP_DEBUG_DYNAMIC_CLK_DISABLE | | 225 | AXXX_CP_DEBUG_DYNAMIC_CLK_DISABLE | |
@@ -231,7 +231,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu) | |||
231 | /* Load PFP: */ | 231 | /* Load PFP: */ |
232 | ptr = (uint32_t *)(adreno_gpu->pfp->data); | 232 | ptr = (uint32_t *)(adreno_gpu->pfp->data); |
233 | len = adreno_gpu->pfp->size / 4; | 233 | len = adreno_gpu->pfp->size / 4; |
234 | DBG("loading PFP ucode version: %u", ptr[0]); | 234 | DBG("loading PFP ucode version: %x", ptr[5]); |
235 | 235 | ||
236 | gpu_write(gpu, REG_A3XX_CP_PFP_UCODE_ADDR, 0); | 236 | gpu_write(gpu, REG_A3XX_CP_PFP_UCODE_ADDR, 0); |
237 | for (i = 1; i < len; i++) | 237 | for (i = 1; i < len; i++) |
@@ -469,7 +469,7 @@ static int a3xx_probe(struct platform_device *pdev) | |||
469 | config.slow_rate = 27000000; | 469 | config.slow_rate = 27000000; |
470 | config.bus_freq = 4; | 470 | config.bus_freq = 4; |
471 | config.rev = ADRENO_REV(3, 2, 1, 0); | 471 | config.rev = ADRENO_REV(3, 2, 1, 0); |
472 | } else if (cpu_is_apq8064() || cpu_is_msm8960ab()) { | 472 | } else if (cpu_is_apq8064()) { |
473 | config.fast_rate = 400000000; | 473 | config.fast_rate = 400000000; |
474 | config.slow_rate = 27000000; | 474 | config.slow_rate = 27000000; |
475 | config.bus_freq = 4; | 475 | config.bus_freq = 4; |
@@ -482,6 +482,16 @@ static int a3xx_probe(struct platform_device *pdev) | |||
482 | else | 482 | else |
483 | config.rev = ADRENO_REV(3, 2, 0, 0); | 483 | config.rev = ADRENO_REV(3, 2, 0, 0); |
484 | 484 | ||
485 | } else if (cpu_is_msm8960ab()) { | ||
486 | config.fast_rate = 400000000; | ||
487 | config.slow_rate = 320000000; | ||
488 | config.bus_freq = 4; | ||
489 | |||
490 | if (SOCINFO_VERSION_MINOR(version) == 0) | ||
491 | config.rev = ADRENO_REV(3, 2, 1, 0); | ||
492 | else | ||
493 | config.rev = ADRENO_REV(3, 2, 1, 1); | ||
494 | |||
485 | } else if (cpu_is_msm8930()) { | 495 | } else if (cpu_is_msm8930()) { |
486 | config.fast_rate = 400000000; | 496 | config.fast_rate = 400000000; |
487 | config.slow_rate = 27000000; | 497 | config.slow_rate = 27000000; |
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c index 50d11df35b21..32f26f855050 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi.c | |||
@@ -122,7 +122,7 @@ int hdmi_init(struct drm_device *dev, struct drm_encoder *encoder) | |||
122 | 122 | ||
123 | hdmi->mvs = devm_regulator_get(&pdev->dev, "8901_hdmi_mvs"); | 123 | hdmi->mvs = devm_regulator_get(&pdev->dev, "8901_hdmi_mvs"); |
124 | if (IS_ERR(hdmi->mvs)) | 124 | if (IS_ERR(hdmi->mvs)) |
125 | hdmi->mvs = devm_regulator_get(&pdev->dev, "hdmi_mvs"); | 125 | hdmi->mvs = devm_regulator_get(&pdev->dev, "8921_hdmi_mvs"); |
126 | if (IS_ERR(hdmi->mvs)) { | 126 | if (IS_ERR(hdmi->mvs)) { |
127 | ret = PTR_ERR(hdmi->mvs); | 127 | ret = PTR_ERR(hdmi->mvs); |
128 | dev_err(dev->dev, "failed to get mvs regulator: %d\n", ret); | 128 | dev_err(dev->dev, "failed to get mvs regulator: %d\n", ret); |
@@ -230,7 +230,7 @@ static int hdmi_dev_probe(struct platform_device *pdev) | |||
230 | config.ddc_data_gpio = 71; | 230 | config.ddc_data_gpio = 71; |
231 | config.hpd_gpio = 72; | 231 | config.hpd_gpio = 72; |
232 | config.pmic_gpio = 13 + NR_GPIO_IRQS; | 232 | config.pmic_gpio = 13 + NR_GPIO_IRQS; |
233 | } else if (cpu_is_msm8960()) { | 233 | } else if (cpu_is_msm8960() || cpu_is_msm8960ab()) { |
234 | config.phy_init = hdmi_phy_8960_init; | 234 | config.phy_init = hdmi_phy_8960_init; |
235 | config.ddc_clk_gpio = 100; | 235 | config.ddc_clk_gpio = 100; |
236 | config.ddc_data_gpio = 101; | 236 | config.ddc_data_gpio = 101; |
diff --git a/drivers/gpu/drm/msm/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/mdp4/mdp4_kms.c index bab8cbc6d798..2e2ae16f334e 100644 --- a/drivers/gpu/drm/msm/mdp4/mdp4_kms.c +++ b/drivers/gpu/drm/msm/mdp4/mdp4_kms.c | |||
@@ -32,7 +32,9 @@ static int mdp4_hw_init(struct msm_kms *kms) | |||
32 | 32 | ||
33 | pm_runtime_get_sync(dev->dev); | 33 | pm_runtime_get_sync(dev->dev); |
34 | 34 | ||
35 | mdp4_enable(mdp4_kms); | ||
35 | version = mdp4_read(mdp4_kms, REG_MDP4_VERSION); | 36 | version = mdp4_read(mdp4_kms, REG_MDP4_VERSION); |
37 | mdp4_disable(mdp4_kms); | ||
36 | 38 | ||
37 | major = FIELD(version, MDP4_VERSION_MAJOR); | 39 | major = FIELD(version, MDP4_VERSION_MAJOR); |
38 | minor = FIELD(version, MDP4_VERSION_MINOR); | 40 | minor = FIELD(version, MDP4_VERSION_MINOR); |
@@ -328,9 +330,11 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) | |||
328 | * have left things on, in which case we'll start getting faults if | 330 | * have left things on, in which case we'll start getting faults if |
329 | * we don't disable): | 331 | * we don't disable): |
330 | */ | 332 | */ |
333 | mdp4_enable(mdp4_kms); | ||
331 | mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0); | 334 | mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0); |
332 | mdp4_write(mdp4_kms, REG_MDP4_LCDC_ENABLE, 0); | 335 | mdp4_write(mdp4_kms, REG_MDP4_LCDC_ENABLE, 0); |
333 | mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0); | 336 | mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0); |
337 | mdp4_disable(mdp4_kms); | ||
334 | mdelay(16); | 338 | mdelay(16); |
335 | 339 | ||
336 | if (config->iommu) { | 340 | if (config->iommu) { |