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authorJames Hogan <james.hogan@imgtec.com>2014-01-17 07:01:30 -0500
committerRalf Baechle <ralf@linux-mips.org>2014-01-24 16:39:56 -0500
commite36059e508c209703c3a60ef716a5b524fb0a832 (patch)
tree9076a00689bc92cfaf360532bb66bb5a555d80c9
parentd3864767a85b13e0e0ecc5f4284f65cc26252446 (diff)
MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI
When KVM is enabled and TLB invalidation is supported, kvm_mips_flush_host_tlb() can cause a machine check exception due to multiple matching TLB entries. This can occur on shutdown even when KVM hasn't been actively used. Commit adb78de9eae8 (MIPS: mm: Move UNIQUE_ENTRYHI macro to a header file) created a common UNIQUE_ENTRYHI in asm/tlb.h but it didn't update the copy of UNIQUE_ENTRYHI in kvm_tlb.c to use it. Commit 36b175451399 (MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLB) later added TLB invalidation (EHINV) support to the common UNIQUE_ENTRYHI. Therefore make kvm_tlb.c use the EHINV aware UNIQUE_ENTRYHI implementation in asm/tlb.h too. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: Gleb Natapov <gleb@redhat.com> Cc: kvm@vger.kernel.org Cc: Sanjay Lal <sanjayl@kymasys.com> Reviewed-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6383/
-rw-r--r--arch/mips/kvm/kvm_tlb.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/mips/kvm/kvm_tlb.c b/arch/mips/kvm/kvm_tlb.c
index c777dd36d4a8..52083ea7fddd 100644
--- a/arch/mips/kvm/kvm_tlb.c
+++ b/arch/mips/kvm/kvm_tlb.c
@@ -25,6 +25,7 @@
25#include <asm/mmu_context.h> 25#include <asm/mmu_context.h>
26#include <asm/pgtable.h> 26#include <asm/pgtable.h>
27#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
28#include <asm/tlb.h>
28 29
29#undef CONFIG_MIPS_MT 30#undef CONFIG_MIPS_MT
30#include <asm/r4kcache.h> 31#include <asm/r4kcache.h>
@@ -35,9 +36,6 @@
35 36
36#define PRIx64 "llx" 37#define PRIx64 "llx"
37 38
38/* Use VZ EntryHi.EHINV to invalidate TLB entries */
39#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
40
41atomic_t kvm_mips_instance; 39atomic_t kvm_mips_instance;
42EXPORT_SYMBOL(kvm_mips_instance); 40EXPORT_SYMBOL(kvm_mips_instance);
43 41