diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2014-07-16 02:40:53 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-07-18 07:29:37 -0400 |
commit | ddd0c53018222df6bd9b2f61c881887b56b75d88 (patch) | |
tree | 221228ca1285abeccee00b066000fa0942e056e7 | |
parent | bf67fd3142dc605ded9b5e063e35b47c2bb21cb1 (diff) |
ARM: 8103/1: save/restore Cortex-A9 CP15 registers on suspend/resume
The CP15 diagnostic register holds ARM errata bits on Cortex-A9, so it
needs to be saved/restored on suspend/resume. Otherwise, the
effectiveness of errata workaround gets lost together with diagnostic
register bit across suspend/resume cycle. And the CP15 power control
register of Cortex-A9 shares the same problem.
The patch adds a couple of Cortex-A9 specific suspend/resume functions
to save/restore these two Cortex-A9 CP15 registers across the
suspend/resume cycle.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/include/asm/glue-proc.h | 18 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7.S | 37 |
2 files changed, 45 insertions, 10 deletions
diff --git a/arch/arm/include/asm/glue-proc.h b/arch/arm/include/asm/glue-proc.h index 74a8b84f3cb1..74be7c22035a 100644 --- a/arch/arm/include/asm/glue-proc.h +++ b/arch/arm/include/asm/glue-proc.h | |||
@@ -221,15 +221,6 @@ | |||
221 | # endif | 221 | # endif |
222 | #endif | 222 | #endif |
223 | 223 | ||
224 | #ifdef CONFIG_CPU_V7 | ||
225 | # ifdef CPU_NAME | ||
226 | # undef MULTI_CPU | ||
227 | # define MULTI_CPU | ||
228 | # else | ||
229 | # define CPU_NAME cpu_v7 | ||
230 | # endif | ||
231 | #endif | ||
232 | |||
233 | #ifdef CONFIG_CPU_V7M | 224 | #ifdef CONFIG_CPU_V7M |
234 | # ifdef CPU_NAME | 225 | # ifdef CPU_NAME |
235 | # undef MULTI_CPU | 226 | # undef MULTI_CPU |
@@ -248,6 +239,15 @@ | |||
248 | # endif | 239 | # endif |
249 | #endif | 240 | #endif |
250 | 241 | ||
242 | #ifdef CONFIG_CPU_V7 | ||
243 | /* | ||
244 | * Cortex-A9 needs a different suspend/resume function, so we need | ||
245 | * multiple CPU support for ARMv7 anyway. | ||
246 | */ | ||
247 | # undef MULTI_CPU | ||
248 | # define MULTI_CPU | ||
249 | #endif | ||
250 | |||
251 | #ifndef MULTI_CPU | 251 | #ifndef MULTI_CPU |
252 | #define cpu_proc_init __glue(CPU_NAME,_proc_init) | 252 | #define cpu_proc_init __glue(CPU_NAME,_proc_init) |
253 | #define cpu_proc_fin __glue(CPU_NAME,_proc_fin) | 253 | #define cpu_proc_fin __glue(CPU_NAME,_proc_fin) |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index c8726abe9bab..43951adffd87 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -152,6 +152,40 @@ ENTRY(cpu_v7_do_resume) | |||
152 | ENDPROC(cpu_v7_do_resume) | 152 | ENDPROC(cpu_v7_do_resume) |
153 | #endif | 153 | #endif |
154 | 154 | ||
155 | /* | ||
156 | * Cortex-A9 processor functions | ||
157 | */ | ||
158 | globl_equ cpu_ca9mp_proc_init, cpu_v7_proc_init | ||
159 | globl_equ cpu_ca9mp_proc_fin, cpu_v7_proc_fin | ||
160 | globl_equ cpu_ca9mp_reset, cpu_v7_reset | ||
161 | globl_equ cpu_ca9mp_do_idle, cpu_v7_do_idle | ||
162 | globl_equ cpu_ca9mp_dcache_clean_area, cpu_v7_dcache_clean_area | ||
163 | globl_equ cpu_ca9mp_switch_mm, cpu_v7_switch_mm | ||
164 | globl_equ cpu_ca9mp_set_pte_ext, cpu_v7_set_pte_ext | ||
165 | .globl cpu_ca9mp_suspend_size | ||
166 | .equ cpu_ca9mp_suspend_size, cpu_v7_suspend_size + 4 * 2 | ||
167 | #ifdef CONFIG_ARM_CPU_SUSPEND | ||
168 | ENTRY(cpu_ca9mp_do_suspend) | ||
169 | stmfd sp!, {r4 - r5} | ||
170 | mrc p15, 0, r4, c15, c0, 1 @ Diagnostic register | ||
171 | mrc p15, 0, r5, c15, c0, 0 @ Power register | ||
172 | stmia r0!, {r4 - r5} | ||
173 | ldmfd sp!, {r4 - r5} | ||
174 | b cpu_v7_do_suspend | ||
175 | ENDPROC(cpu_ca9mp_do_suspend) | ||
176 | |||
177 | ENTRY(cpu_ca9mp_do_resume) | ||
178 | ldmia r0!, {r4 - r5} | ||
179 | mrc p15, 0, r10, c15, c0, 1 @ Read Diagnostic register | ||
180 | teq r4, r10 @ Already restored? | ||
181 | mcrne p15, 0, r4, c15, c0, 1 @ No, so restore it | ||
182 | mrc p15, 0, r10, c15, c0, 0 @ Read Power register | ||
183 | teq r5, r10 @ Already restored? | ||
184 | mcrne p15, 0, r5, c15, c0, 0 @ No, so restore it | ||
185 | b cpu_v7_do_resume | ||
186 | ENDPROC(cpu_ca9mp_do_resume) | ||
187 | #endif | ||
188 | |||
155 | #ifdef CONFIG_CPU_PJ4B | 189 | #ifdef CONFIG_CPU_PJ4B |
156 | globl_equ cpu_pj4b_switch_mm, cpu_v7_switch_mm | 190 | globl_equ cpu_pj4b_switch_mm, cpu_v7_switch_mm |
157 | globl_equ cpu_pj4b_set_pte_ext, cpu_v7_set_pte_ext | 191 | globl_equ cpu_pj4b_set_pte_ext, cpu_v7_set_pte_ext |
@@ -418,6 +452,7 @@ __v7_setup_stack: | |||
418 | 452 | ||
419 | @ define struct processor (see <asm/proc-fns.h> and proc-macros.S) | 453 | @ define struct processor (see <asm/proc-fns.h> and proc-macros.S) |
420 | define_processor_functions v7, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 | 454 | define_processor_functions v7, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 |
455 | define_processor_functions ca9mp, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 | ||
421 | #ifdef CONFIG_CPU_PJ4B | 456 | #ifdef CONFIG_CPU_PJ4B |
422 | define_processor_functions pj4b, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 | 457 | define_processor_functions pj4b, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 |
423 | #endif | 458 | #endif |
@@ -470,7 +505,7 @@ __v7_ca5mp_proc_info: | |||
470 | __v7_ca9mp_proc_info: | 505 | __v7_ca9mp_proc_info: |
471 | .long 0x410fc090 | 506 | .long 0x410fc090 |
472 | .long 0xff0ffff0 | 507 | .long 0xff0ffff0 |
473 | __v7_proc __v7_ca9mp_setup | 508 | __v7_proc __v7_ca9mp_setup, proc_fns = ca9mp_processor_functions |
474 | .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info | 509 | .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info |
475 | 510 | ||
476 | #endif /* CONFIG_ARM_LPAE */ | 511 | #endif /* CONFIG_ARM_LPAE */ |