diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2013-08-13 04:54:05 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-10-20 21:13:13 -0400 |
commit | d8ce823fb34e6b50b1d9cb804c1067546eab9cee (patch) | |
tree | 2a3cb5a82f4999eda4b8dc3e9e3f774f3820cd97 | |
parent | f1c6f314727c7595e249c7da3933ba2bc6219e58 (diff) |
ARM: imx: use imx_init_revision_from_anatop() on imx6sl
Add imx6sl support into imx_init_revision_from_anatop(), so that it can
be used to initialize cpu type and revision on imx6sl.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/mach-imx/anatop.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-imx/mach-imx6sl.c | 1 |
3 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index c46651e4d966..177d9e791a01 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi | |||
@@ -380,7 +380,9 @@ | |||
380 | }; | 380 | }; |
381 | 381 | ||
382 | anatop: anatop@020c8000 { | 382 | anatop: anatop@020c8000 { |
383 | compatible = "fsl,imx6sl-anatop", "syscon", "simple-bus"; | 383 | compatible = "fsl,imx6sl-anatop", |
384 | "fsl,imx6q-anatop", | ||
385 | "syscon", "simple-bus"; | ||
384 | reg = <0x020c8000 0x1000>; | 386 | reg = <0x020c8000 0x1000>; |
385 | interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; | 387 | interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; |
386 | 388 | ||
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c index b2d600f14937..4a40bbb46183 100644 --- a/arch/arm/mach-imx/anatop.c +++ b/arch/arm/mach-imx/anatop.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #define ANADIG_USB1_CHRG_DETECT 0x1b0 | 27 | #define ANADIG_USB1_CHRG_DETECT 0x1b0 |
28 | #define ANADIG_USB2_CHRG_DETECT 0x210 | 28 | #define ANADIG_USB2_CHRG_DETECT 0x210 |
29 | #define ANADIG_DIGPROG 0x260 | 29 | #define ANADIG_DIGPROG 0x260 |
30 | #define ANADIG_DIGPROG_IMX6SL 0x280 | ||
30 | 31 | ||
31 | #define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000 | 32 | #define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000 |
32 | #define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000 | 33 | #define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000 |
@@ -83,11 +84,14 @@ void __init imx_init_revision_from_anatop(void) | |||
83 | void __iomem *anatop_base; | 84 | void __iomem *anatop_base; |
84 | unsigned int revision; | 85 | unsigned int revision; |
85 | u32 digprog; | 86 | u32 digprog; |
87 | u16 offset = ANADIG_DIGPROG; | ||
86 | 88 | ||
87 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); | 89 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); |
88 | anatop_base = of_iomap(np, 0); | 90 | anatop_base = of_iomap(np, 0); |
89 | WARN_ON(!anatop_base); | 91 | WARN_ON(!anatop_base); |
90 | digprog = readl_relaxed(anatop_base + ANADIG_DIGPROG); | 92 | if (of_device_is_compatible(np, "fsl,imx6sl-anatop")) |
93 | offset = ANADIG_DIGPROG_IMX6SL; | ||
94 | digprog = readl_relaxed(anatop_base + offset); | ||
91 | iounmap(anatop_base); | 95 | iounmap(anatop_base); |
92 | 96 | ||
93 | switch (digprog & 0xff) { | 97 | switch (digprog & 0xff) { |
diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index 21cde21daf9b..4ce9ae58ed0c 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c | |||
@@ -45,6 +45,7 @@ static void __init imx6sl_init_machine(void) | |||
45 | 45 | ||
46 | static void __init imx6sl_init_irq(void) | 46 | static void __init imx6sl_init_irq(void) |
47 | { | 47 | { |
48 | imx_init_revision_from_anatop(); | ||
48 | imx_init_l2cache(); | 49 | imx_init_l2cache(); |
49 | imx_src_init(); | 50 | imx_src_init(); |
50 | imx_gpc_init(); | 51 | imx_gpc_init(); |