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authorBruce Allan <bruce.w.allan@intel.com>2013-01-18 20:09:58 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2013-01-27 03:36:35 -0500
commitd89777bf0e42e7cb6ce8eae35190b9375c3b4211 (patch)
treef1ec4ec54324abc8b19ce0ac04b53b57ca0d4542
parent347b5201cb2e8b9e4a20d81582563f51336eb215 (diff)
e1000e: add support for IEEE-1588 PTP
Add PTP IEEE-1588 support and make accesible via the PHC subsystem. v2: make e1000e_ptp_clock_info a static const struct per Stephen Hemminger Cc: Stephen Hemminger <stephen@networkplumber.org> Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Reviewed-by: Jacob Keller <Jacob.e.keller@intel.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r--drivers/net/ethernet/intel/Kconfig1
-rw-r--r--drivers/net/ethernet/intel/e1000e/Makefile2
-rw-r--r--drivers/net/ethernet/intel/e1000e/defines.h11
-rw-r--r--drivers/net/ethernet/intel/e1000e/e1000.h9
-rw-r--r--drivers/net/ethernet/intel/e1000e/ethtool.c12
-rw-r--r--drivers/net/ethernet/intel/e1000e/hw.h2
-rw-r--r--drivers/net/ethernet/intel/e1000e/netdev.c107
-rw-r--r--drivers/net/ethernet/intel/e1000e/ptp.c276
8 files changed, 417 insertions, 3 deletions
diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/intel/Kconfig
index 21353f0fef63..3d5f6d463757 100644
--- a/drivers/net/ethernet/intel/Kconfig
+++ b/drivers/net/ethernet/intel/Kconfig
@@ -74,6 +74,7 @@ config E1000E
74 tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support" 74 tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support"
75 depends on PCI && (!SPARC32 || BROKEN) 75 depends on PCI && (!SPARC32 || BROKEN)
76 select CRC32 76 select CRC32
77 select PTP_1588_CLOCK
77 ---help--- 78 ---help---
78 This driver supports the PCI-Express Intel(R) PRO/1000 gigabit 79 This driver supports the PCI-Express Intel(R) PRO/1000 gigabit
79 ethernet family of adapters. For PCI or PCI-X e1000 adapters, 80 ethernet family of adapters. For PCI or PCI-X e1000 adapters,
diff --git a/drivers/net/ethernet/intel/e1000e/Makefile b/drivers/net/ethernet/intel/e1000e/Makefile
index 591b71324505..1da0faac0411 100644
--- a/drivers/net/ethernet/intel/e1000e/Makefile
+++ b/drivers/net/ethernet/intel/e1000e/Makefile
@@ -34,5 +34,5 @@ obj-$(CONFIG_E1000E) += e1000e.o
34 34
35e1000e-objs := 82571.o ich8lan.o 80003es2lan.o \ 35e1000e-objs := 82571.o ich8lan.o 80003es2lan.o \
36 mac.o manage.o nvm.o phy.o \ 36 mac.o manage.o nvm.o phy.o \
37 param.o ethtool.o netdev.o 37 param.o ethtool.o netdev.o ptp.o
38 38
diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h
index 36f9fad19a76..5cb7441dca2a 100644
--- a/drivers/net/ethernet/intel/e1000e/defines.h
+++ b/drivers/net/ethernet/intel/e1000e/defines.h
@@ -544,9 +544,20 @@
544 544
545#define E1000_TSYNCRXCTL_VALID 0x00000001 /* Rx timestamp valid */ 545#define E1000_TSYNCRXCTL_VALID 0x00000001 /* Rx timestamp valid */
546#define E1000_TSYNCRXCTL_TYPE_MASK 0x0000000E /* Rx type mask */ 546#define E1000_TSYNCRXCTL_TYPE_MASK 0x0000000E /* Rx type mask */
547#define E1000_TSYNCRXCTL_TYPE_L2_V2 0x00
548#define E1000_TSYNCRXCTL_TYPE_L4_V1 0x02
549#define E1000_TSYNCRXCTL_TYPE_L2_L4_V2 0x04
550#define E1000_TSYNCRXCTL_TYPE_ALL 0x08
551#define E1000_TSYNCRXCTL_TYPE_EVENT_V2 0x0A
547#define E1000_TSYNCRXCTL_ENABLED 0x00000010 /* enable Rx timestamping */ 552#define E1000_TSYNCRXCTL_ENABLED 0x00000010 /* enable Rx timestamping */
548#define E1000_TSYNCRXCTL_SYSCFI 0x00000020 /* Sys clock frequency */ 553#define E1000_TSYNCRXCTL_SYSCFI 0x00000020 /* Sys clock frequency */
549 554
555#define E1000_RXMTRL_PTP_V1_SYNC_MESSAGE 0x00000000
556#define E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE 0x00010000
557
558#define E1000_RXMTRL_PTP_V2_SYNC_MESSAGE 0x00000000
559#define E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE 0x01000000
560
550#define E1000_TIMINCA_INCPERIOD_SHIFT 24 561#define E1000_TIMINCA_INCPERIOD_SHIFT 24
551#define E1000_TIMINCA_INCVALUE_MASK 0x00FFFFFF 562#define E1000_TIMINCA_INCVALUE_MASK 0x00FFFFFF
552 563
diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h
index dea9e5552966..bd5876171376 100644
--- a/drivers/net/ethernet/intel/e1000e/e1000.h
+++ b/drivers/net/ethernet/intel/e1000e/e1000.h
@@ -43,7 +43,8 @@
43#include <linux/if_vlan.h> 43#include <linux/if_vlan.h>
44#include <linux/clocksource.h> 44#include <linux/clocksource.h>
45#include <linux/net_tstamp.h> 45#include <linux/net_tstamp.h>
46 46#include <linux/ptp_clock_kernel.h>
47#include <linux/ptp_classify.h>
47#include "hw.h" 48#include "hw.h"
48 49
49struct e1000_info; 50struct e1000_info;
@@ -413,6 +414,8 @@ struct e1000_adapter {
413 spinlock_t systim_lock; /* protects SYSTIML/H regsters */ 414 spinlock_t systim_lock; /* protects SYSTIML/H regsters */
414 struct cyclecounter cc; 415 struct cyclecounter cc;
415 struct timecounter tc; 416 struct timecounter tc;
417 struct ptp_clock *ptp_clock;
418 struct ptp_clock_info ptp_clock_info;
416}; 419};
417 420
418struct e1000_info { 421struct e1000_info {
@@ -427,6 +430,8 @@ struct e1000_info {
427 const struct e1000_nvm_operations *nvm_ops; 430 const struct e1000_nvm_operations *nvm_ops;
428}; 431};
429 432
433s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca);
434
430/* The system time is maintained by a 64-bit counter comprised of the 32-bit 435/* The system time is maintained by a 64-bit counter comprised of the 32-bit
431 * SYSTIMH and SYSTIML registers. How the counter increments (and therefore 436 * SYSTIMH and SYSTIML registers. How the counter increments (and therefore
432 * its resolution) is based on the contents of the TIMINCA register - it 437 * its resolution) is based on the contents of the TIMINCA register - it
@@ -704,6 +709,8 @@ extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
704extern s32 e1000_check_polarity_igp(struct e1000_hw *hw); 709extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
705extern bool e1000_check_phy_82574(struct e1000_hw *hw); 710extern bool e1000_check_phy_82574(struct e1000_hw *hw);
706extern s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data); 711extern s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data);
712extern void e1000e_ptp_init(struct e1000_adapter *adapter);
713extern void e1000e_ptp_remove(struct e1000_adapter *adapter);
707 714
708static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) 715static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
709{ 716{
diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c
index ceff1bf300b3..e3855bb10599 100644
--- a/drivers/net/ethernet/intel/e1000e/ethtool.c
+++ b/drivers/net/ethernet/intel/e1000e/ethtool.c
@@ -2209,8 +2209,20 @@ static int e1000e_get_ts_info(struct net_device *netdev,
2209 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 2209 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
2210 2210
2211 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) | 2211 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
2212 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2213 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2214 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2215 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2216 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2217 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2218 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
2219 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
2220 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2212 (1 << HWTSTAMP_FILTER_ALL)); 2221 (1 << HWTSTAMP_FILTER_ALL));
2213 2222
2223 if (adapter->ptp_clock)
2224 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2225
2214 return 0; 2226 return 0;
2215} 2227}
2216 2228
diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index 8e7e80345a60..84e6beb78718 100644
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -251,6 +251,8 @@ enum e1e_registers {
251 E1000_TSYNCRXCTL = 0x0B620, /* Rx Time Sync Control register - RW */ 251 E1000_TSYNCRXCTL = 0x0B620, /* Rx Time Sync Control register - RW */
252 E1000_RXSTMPL = 0x0B624, /* Rx timestamp Low - RO */ 252 E1000_RXSTMPL = 0x0B624, /* Rx timestamp Low - RO */
253 E1000_RXSTMPH = 0x0B628, /* Rx timestamp High - RO */ 253 E1000_RXSTMPH = 0x0B628, /* Rx timestamp High - RO */
254 E1000_RXMTRL = 0x0B634, /* Timesync Rx EtherType and Msg Type - RW */
255 E1000_RXUDP = 0x0B638, /* Timesync Rx UDP Port - RW */
254}; 256};
255 257
256#define E1000_MAX_PHY_ADDR 4 258#define E1000_MAX_PHY_ADDR 4
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 8bb5d28eca14..34be756ee1e2 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -3413,7 +3413,7 @@ static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3413 * Get attributes for incrementing the System Time Register SYSTIML/H at 3413 * Get attributes for incrementing the System Time Register SYSTIML/H at
3414 * the default base frequency, and set the cyclecounter shift value. 3414 * the default base frequency, and set the cyclecounter shift value.
3415 **/ 3415 **/
3416static s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca) 3416s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3417{ 3417{
3418 struct e1000_hw *hw = &adapter->hw; 3418 struct e1000_hw *hw = &adapter->hw;
3419 u32 incvalue, incperiod, shift; 3419 u32 incvalue, incperiod, shift;
@@ -3485,6 +3485,10 @@ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter)
3485 struct hwtstamp_config *config = &adapter->hwtstamp_config; 3485 struct hwtstamp_config *config = &adapter->hwtstamp_config;
3486 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED; 3486 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3487 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED; 3487 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3488 u32 rxmtrl = 0;
3489 u16 rxudp = 0;
3490 bool is_l4 = false;
3491 bool is_l2 = false;
3488 u32 regval; 3492 u32 regval;
3489 s32 ret_val; 3493 s32 ret_val;
3490 3494
@@ -3509,7 +3513,69 @@ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter)
3509 case HWTSTAMP_FILTER_NONE: 3513 case HWTSTAMP_FILTER_NONE:
3510 tsync_rx_ctl = 0; 3514 tsync_rx_ctl = 0;
3511 break; 3515 break;
3516 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3517 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3518 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3519 is_l4 = true;
3520 break;
3521 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3522 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3523 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3524 is_l4 = true;
3525 break;
3526 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3527 /* Also time stamps V2 L2 Path Delay Request/Response */
3528 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3529 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3530 is_l2 = true;
3531 break;
3532 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3533 /* Also time stamps V2 L2 Path Delay Request/Response. */
3534 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3535 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3536 is_l2 = true;
3537 break;
3538 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3539 /* Hardware cannot filter just V2 L4 Sync messages;
3540 * fall-through to V2 (both L2 and L4) Sync.
3541 */
3542 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3543 /* Also time stamps V2 Path Delay Request/Response. */
3544 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3545 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3546 is_l2 = true;
3547 is_l4 = true;
3548 break;
3549 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3550 /* Hardware cannot filter just V2 L4 Delay Request messages;
3551 * fall-through to V2 (both L2 and L4) Delay Request.
3552 */
3553 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3554 /* Also time stamps V2 Path Delay Request/Response. */
3555 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3556 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3557 is_l2 = true;
3558 is_l4 = true;
3559 break;
3560 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3561 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3562 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3563 * fall-through to all V2 (both L2 and L4) Events.
3564 */
3565 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3566 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3567 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3568 is_l2 = true;
3569 is_l4 = true;
3570 break;
3571 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3572 /* For V1, the hardware can only filter Sync messages or
3573 * Delay Request messages but not both so fall-through to
3574 * time stamp all packets.
3575 */
3512 case HWTSTAMP_FILTER_ALL: 3576 case HWTSTAMP_FILTER_ALL:
3577 is_l2 = true;
3578 is_l4 = true;
3513 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL; 3579 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3514 config->rx_filter = HWTSTAMP_FILTER_ALL; 3580 config->rx_filter = HWTSTAMP_FILTER_ALL;
3515 break; 3581 break;
@@ -3541,6 +3607,22 @@ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter)
3541 return -EAGAIN; 3607 return -EAGAIN;
3542 } 3608 }
3543 3609
3610 /* L2: define ethertype filter for time stamped packets */
3611 if (is_l2)
3612 rxmtrl |= ETH_P_1588;
3613
3614 /* define which PTP packets get time stamped */
3615 ew32(RXMTRL, rxmtrl);
3616
3617 /* Filter by destination port */
3618 if (is_l4) {
3619 rxudp = PTP_EV_PORT;
3620 cpu_to_be16s(&rxudp);
3621 }
3622 ew32(RXUDP, rxudp);
3623
3624 e1e_flush();
3625
3544 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */ 3626 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3545 regval = er32(RXSTMPH); 3627 regval = er32(RXSTMPH);
3546 regval = er32(TXSTMPH); 3628 regval = er32(TXSTMPH);
@@ -5665,6 +5747,24 @@ static int e1000e_hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)
5665 5747
5666 config = adapter->hwtstamp_config; 5748 config = adapter->hwtstamp_config;
5667 5749
5750 switch (config.rx_filter) {
5751 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
5752 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
5753 case HWTSTAMP_FILTER_PTP_V2_SYNC:
5754 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
5755 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
5756 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
5757 /* With V2 type filters which specify a Sync or Delay Request,
5758 * Path Delay Request/Response messages are also time stamped
5759 * by hardware so notify the caller the requested packets plus
5760 * some others are time stamped.
5761 */
5762 config.rx_filter = HWTSTAMP_FILTER_SOME;
5763 break;
5764 default:
5765 break;
5766 }
5767
5668 return copy_to_user(ifr->ifr_data, &config, 5768 return copy_to_user(ifr->ifr_data, &config,
5669 sizeof(config)) ? -EFAULT : 0; 5769 sizeof(config)) ? -EFAULT : 0;
5670} 5770}
@@ -6672,6 +6772,9 @@ static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6672 /* carrier off reporting is important to ethtool even BEFORE open */ 6772 /* carrier off reporting is important to ethtool even BEFORE open */
6673 netif_carrier_off(netdev); 6773 netif_carrier_off(netdev);
6674 6774
6775 /* init PTP hardware clock */
6776 e1000e_ptp_init(adapter);
6777
6675 e1000_print_device_info(adapter); 6778 e1000_print_device_info(adapter);
6676 6779
6677 if (pci_dev_run_wake(pdev)) 6780 if (pci_dev_run_wake(pdev))
@@ -6720,6 +6823,8 @@ static void e1000_remove(struct pci_dev *pdev)
6720 struct e1000_adapter *adapter = netdev_priv(netdev); 6823 struct e1000_adapter *adapter = netdev_priv(netdev);
6721 bool down = test_bit(__E1000_DOWN, &adapter->state); 6824 bool down = test_bit(__E1000_DOWN, &adapter->state);
6722 6825
6826 e1000e_ptp_remove(adapter);
6827
6723 /* The timers may be rescheduled, so explicitly disable them 6828 /* The timers may be rescheduled, so explicitly disable them
6724 * from being rescheduled. 6829 * from being rescheduled.
6725 */ 6830 */
diff --git a/drivers/net/ethernet/intel/e1000e/ptp.c b/drivers/net/ethernet/intel/e1000e/ptp.c
new file mode 100644
index 000000000000..32da00c0cbc9
--- /dev/null
+++ b/drivers/net/ethernet/intel/e1000e/ptp.c
@@ -0,0 +1,276 @@
1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* PTP 1588 Hardware Clock (PHC)
30 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
31 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
32 */
33
34#include "e1000.h"
35
36/**
37 * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
38 * @ptp: ptp clock structure
39 * @delta: Desired frequency change in parts per billion
40 *
41 * Adjust the frequency of the PHC cycle counter by the indicated delta from
42 * the base frequency.
43 **/
44static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
45{
46 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
47 ptp_clock_info);
48 struct e1000_hw *hw = &adapter->hw;
49 bool neg_adj = false;
50 u64 adjustment;
51 u32 timinca, incvalue;
52 s32 ret_val;
53
54 if ((delta > ptp->max_adj) || (delta <= -1000000000))
55 return -EINVAL;
56
57 if (delta < 0) {
58 neg_adj = true;
59 delta = -delta;
60 }
61
62 /* Get the System Time Register SYSTIM base frequency */
63 ret_val = e1000e_get_base_timinca(adapter, &timinca);
64 if (ret_val)
65 return ret_val;
66
67 incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
68
69 adjustment = incvalue;
70 adjustment *= delta;
71 adjustment = div_u64(adjustment, 1000000000);
72
73 incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
74
75 timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
76 timinca |= incvalue;
77
78 ew32(TIMINCA, timinca);
79
80 return 0;
81}
82
83/**
84 * e1000e_phc_adjtime - Shift the time of the hardware clock
85 * @ptp: ptp clock structure
86 * @delta: Desired change in nanoseconds
87 *
88 * Adjust the timer by resetting the timecounter structure.
89 **/
90static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
91{
92 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
93 ptp_clock_info);
94 unsigned long flags;
95 s64 now;
96
97 spin_lock_irqsave(&adapter->systim_lock, flags);
98 now = timecounter_read(&adapter->tc);
99 now += delta;
100 timecounter_init(&adapter->tc, &adapter->cc, now);
101 spin_unlock_irqrestore(&adapter->systim_lock, flags);
102
103 return 0;
104}
105
106/**
107 * e1000e_phc_gettime - Reads the current time from the hardware clock
108 * @ptp: ptp clock structure
109 * @ts: timespec structure to hold the current time value
110 *
111 * Read the timecounter and return the correct value in ns after converting
112 * it into a struct timespec.
113 **/
114static int e1000e_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
115{
116 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
117 ptp_clock_info);
118 unsigned long flags;
119 u32 remainder;
120 u64 ns;
121
122 spin_lock_irqsave(&adapter->systim_lock, flags);
123 ns = timecounter_read(&adapter->tc);
124 spin_unlock_irqrestore(&adapter->systim_lock, flags);
125
126 ts->tv_sec = div_u64_rem(ns, NSEC_PER_SEC, &remainder);
127 ts->tv_nsec = remainder;
128
129 return 0;
130}
131
132/**
133 * e1000e_phc_settime - Set the current time on the hardware clock
134 * @ptp: ptp clock structure
135 * @ts: timespec containing the new time for the cycle counter
136 *
137 * Reset the timecounter to use a new base value instead of the kernel
138 * wall timer value.
139 **/
140static int e1000e_phc_settime(struct ptp_clock_info *ptp,
141 const struct timespec *ts)
142{
143 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
144 ptp_clock_info);
145 unsigned long flags;
146 u64 ns;
147
148 ns = ts->tv_sec * NSEC_PER_SEC;
149 ns += ts->tv_nsec;
150
151 /* reset the timecounter */
152 spin_lock_irqsave(&adapter->systim_lock, flags);
153 timecounter_init(&adapter->tc, &adapter->cc, ns);
154 spin_unlock_irqrestore(&adapter->systim_lock, flags);
155
156 return 0;
157}
158
159/**
160 * e1000e_phc_enable - enable or disable an ancillary feature
161 * @ptp: ptp clock structure
162 * @request: Desired resource to enable or disable
163 * @on: Caller passes one to enable or zero to disable
164 *
165 * Enable (or disable) ancillary features of the PHC subsystem.
166 * Currently, no ancillary features are supported.
167 **/
168static int e1000e_phc_enable(struct ptp_clock_info *ptp,
169 struct ptp_clock_request *request, int on)
170{
171 return -EOPNOTSUPP;
172}
173
174static void e1000e_systim_overflow_work(struct work_struct *work)
175{
176 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
177 systim_overflow_work.work);
178 struct e1000_hw *hw = &adapter->hw;
179 struct timespec ts;
180
181 adapter->ptp_clock_info.gettime(&adapter->ptp_clock_info, &ts);
182
183 e_dbg("SYSTIM overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
184
185 schedule_delayed_work(&adapter->systim_overflow_work,
186 E1000_SYSTIM_OVERFLOW_PERIOD);
187}
188
189static const struct ptp_clock_info e1000e_ptp_clock_info = {
190 .owner = THIS_MODULE,
191 .n_alarm = 0,
192 .n_ext_ts = 0,
193 .n_per_out = 0,
194 .pps = 0,
195 .adjfreq = e1000e_phc_adjfreq,
196 .adjtime = e1000e_phc_adjtime,
197 .gettime = e1000e_phc_gettime,
198 .settime = e1000e_phc_settime,
199 .enable = e1000e_phc_enable,
200};
201
202/**
203 * e1000e_ptp_init - initialize PTP for devices which support it
204 * @adapter: board private structure
205 *
206 * This function performs the required steps for enabling PTP support.
207 * If PTP support has already been loaded it simply calls the cyclecounter
208 * init routine and exits.
209 **/
210void e1000e_ptp_init(struct e1000_adapter *adapter)
211{
212 struct e1000_hw *hw = &adapter->hw;
213
214 adapter->ptp_clock = NULL;
215
216 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
217 return;
218
219 adapter->ptp_clock_info = e1000e_ptp_clock_info;
220
221 snprintf(adapter->ptp_clock_info.name,
222 sizeof(adapter->ptp_clock_info.name), "%pm",
223 adapter->netdev->perm_addr);
224
225 switch (hw->mac.type) {
226 case e1000_pch2lan:
227 case e1000_pch_lpt:
228 if ((hw->mac.type != e1000_pch_lpt) ||
229 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
230 adapter->ptp_clock_info.max_adj = 24000000 - 1;
231 break;
232 }
233 /* fall-through */
234 case e1000_82574:
235 case e1000_82583:
236 adapter->ptp_clock_info.max_adj = 600000000 - 1;
237 break;
238 default:
239 break;
240 }
241
242 INIT_DELAYED_WORK(&adapter->systim_overflow_work,
243 e1000e_systim_overflow_work);
244
245 schedule_delayed_work(&adapter->systim_overflow_work,
246 E1000_SYSTIM_OVERFLOW_PERIOD);
247
248 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
249 &adapter->pdev->dev);
250 if (IS_ERR(adapter->ptp_clock)) {
251 adapter->ptp_clock = NULL;
252 e_err("ptp_clock_register failed\n");
253 } else {
254 e_info("registered PHC clock\n");
255 }
256}
257
258/**
259 * e1000e_ptp_remove - disable PTP device and stop the overflow check
260 * @adapter: board private structure
261 *
262 * Stop the PTP support, and cancel the delayed work.
263 **/
264void e1000e_ptp_remove(struct e1000_adapter *adapter)
265{
266 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
267 return;
268
269 cancel_delayed_work_sync(&adapter->systim_overflow_work);
270
271 if (adapter->ptp_clock) {
272 ptp_clock_unregister(adapter->ptp_clock);
273 adapter->ptp_clock = NULL;
274 e_info("removed PHC\n");
275 }
276}