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authorSteven J. Hill <sjhill@mips.com>2012-11-15 00:34:17 -0500
committerRalf Baechle <ralf@linux-mips.org>2012-12-13 12:15:24 -0500
commitd7ea335c05ba7c013615d1e0d5a71459eb4195e8 (patch)
tree333f0cb8edd150b6c967bffacad07c03fea393da
parentdcb96a4e36425d563cefd44a20d3386e02a547f3 (diff)
MIPS: Remove usage of CSRC_R4K_LIB config option.
Manuel Lauss <manuel.lauss@gmail.com> writes: I introduced it as a fallback because early revisions of Alchemy hardware we shipped had a non-functional 32kHz timer and had to rely on the r4k timer instead. Previously the r4k timer was initialized regardless, but it's useless with the "wait" instruction. So long story short: I need either the on-chip 32kHz timer OR the r4k timer if the 32kHz one is unusable, but not both, and r4k timer is useless when au1k_idle is in use. The current in-kernel Alchemy boards all work with the 32kHz timer, so I'm not against removing R4K_LIB symbols. Signed-off-by: Steven J. Hill <sjhill@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/Kconfig6
-rw-r--r--arch/mips/include/asm/time.h2
-rw-r--r--arch/mips/kernel/Makefile2
3 files changed, 3 insertions, 7 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9b3759eef953..b04b4916aa3d 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -55,7 +55,7 @@ config MIPS_ALCHEMY
55 bool "Alchemy processor based machines" 55 bool "Alchemy processor based machines"
56 select 64BIT_PHYS_ADDR 56 select 64BIT_PHYS_ADDR
57 select CEVT_R4K_LIB 57 select CEVT_R4K_LIB
58 select CSRC_R4K_LIB 58 select CSRC_R4K
59 select IRQ_CPU 59 select IRQ_CPU
60 select SYS_HAS_CPU_MIPS32_R1 60 select SYS_HAS_CPU_MIPS32_R1
61 select SYS_SUPPORTS_32BIT_KERNEL 61 select SYS_SUPPORTS_32BIT_KERNEL
@@ -948,11 +948,7 @@ config CSRC_IOASIC
948config CSRC_POWERTV 948config CSRC_POWERTV
949 bool 949 bool
950 950
951config CSRC_R4K_LIB
952 bool
953
954config CSRC_R4K 951config CSRC_R4K
955 select CSRC_R4K_LIB
956 bool 952 bool
957 953
958config CSRC_SB1250 954config CSRC_SB1250
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h
index bc14447e69b5..6be93a468ec9 100644
--- a/arch/mips/include/asm/time.h
+++ b/arch/mips/include/asm/time.h
@@ -71,7 +71,7 @@ static inline int mips_clockevent_init(void)
71/* 71/*
72 * Initialize the count register as a clocksource 72 * Initialize the count register as a clocksource
73 */ 73 */
74#ifdef CONFIG_CSRC_R4K_LIB 74#ifdef CONFIG_CSRC_R4K
75extern int init_r4k_clocksource(void); 75extern int init_r4k_clocksource(void);
76#endif 76#endif
77 77
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 764597b5fb56..d9abe17b3556 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o
25obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o 25obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o
26obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o 26obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o
27obj-$(CONFIG_CSRC_POWERTV) += csrc-powertv.o 27obj-$(CONFIG_CSRC_POWERTV) += csrc-powertv.o
28obj-$(CONFIG_CSRC_R4K_LIB) += csrc-r4k.o 28obj-$(CONFIG_CSRC_R4K) += csrc-r4k.o
29obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o 29obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o
30obj-$(CONFIG_SYNC_R4K) += sync-r4k.o 30obj-$(CONFIG_SYNC_R4K) += sync-r4k.o
31 31