diff options
author | Ben Widawsky <benjamin.widawsky@intel.com> | 2012-12-18 13:31:25 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-12-20 10:27:35 -0500 |
commit | d7e5008f7c2077d856e40a3af746f1a47028b5f2 (patch) | |
tree | c4ec438e40cf7da7504701c300ea9afb359a0dcb | |
parent | e94fbaa8750a8f20c14718633764fba2e6755825 (diff) |
drm/i915: Move even more gtt code to i915_gem_gtt
This really should have been part of the kill agp series.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 51 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_gtt.c | 59 |
3 files changed, 61 insertions, 56 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b0faa9149a1a..15799e783b7a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1587,10 +1587,9 @@ void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj, | |||
1587 | enum i915_cache_level cache_level); | 1587 | enum i915_cache_level cache_level); |
1588 | void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj); | 1588 | void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj); |
1589 | void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj); | 1589 | void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj); |
1590 | void i915_gem_init_global_gtt(struct drm_device *dev, | 1590 | void i915_gem_init_global_gtt(struct drm_device *dev); |
1591 | unsigned long start, | 1591 | void i915_gem_setup_global_gtt(struct drm_device *dev, unsigned long start, |
1592 | unsigned long mappable_end, | 1592 | unsigned long mappable_end, unsigned long end); |
1593 | unsigned long end); | ||
1594 | int i915_gem_gtt_init(struct drm_device *dev); | 1593 | int i915_gem_gtt_init(struct drm_device *dev); |
1595 | void i915_gem_gtt_fini(struct drm_device *dev); | 1594 | void i915_gem_gtt_fini(struct drm_device *dev); |
1596 | static inline void i915_gem_chipset_flush(struct drm_device *dev) | 1595 | static inline void i915_gem_chipset_flush(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 23b883a135db..ad98db5d22ea 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -163,8 +163,8 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data, | |||
163 | return -ENODEV; | 163 | return -ENODEV; |
164 | 164 | ||
165 | mutex_lock(&dev->struct_mutex); | 165 | mutex_lock(&dev->struct_mutex); |
166 | i915_gem_init_global_gtt(dev, args->gtt_start, | 166 | i915_gem_setup_global_gtt(dev, args->gtt_start, args->gtt_end, |
167 | args->gtt_end, args->gtt_end); | 167 | args->gtt_end); |
168 | mutex_unlock(&dev->struct_mutex); | 168 | mutex_unlock(&dev->struct_mutex); |
169 | 169 | ||
170 | return 0; | 170 | return 0; |
@@ -3981,58 +3981,13 @@ cleanup_render_ring: | |||
3981 | return ret; | 3981 | return ret; |
3982 | } | 3982 | } |
3983 | 3983 | ||
3984 | static bool | ||
3985 | intel_enable_ppgtt(struct drm_device *dev) | ||
3986 | { | ||
3987 | if (i915_enable_ppgtt >= 0) | ||
3988 | return i915_enable_ppgtt; | ||
3989 | |||
3990 | #ifdef CONFIG_INTEL_IOMMU | ||
3991 | /* Disable ppgtt on SNB if VT-d is on. */ | ||
3992 | if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) | ||
3993 | return false; | ||
3994 | #endif | ||
3995 | |||
3996 | return true; | ||
3997 | } | ||
3998 | |||
3999 | int i915_gem_init(struct drm_device *dev) | 3984 | int i915_gem_init(struct drm_device *dev) |
4000 | { | 3985 | { |
4001 | struct drm_i915_private *dev_priv = dev->dev_private; | 3986 | struct drm_i915_private *dev_priv = dev->dev_private; |
4002 | unsigned long gtt_size, mappable_size; | ||
4003 | int ret; | 3987 | int ret; |
4004 | 3988 | ||
4005 | gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT; | ||
4006 | mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; | ||
4007 | |||
4008 | mutex_lock(&dev->struct_mutex); | 3989 | mutex_lock(&dev->struct_mutex); |
4009 | if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) { | 3990 | i915_gem_init_global_gtt(dev); |
4010 | /* PPGTT pdes are stolen from global gtt ptes, so shrink the | ||
4011 | * aperture accordingly when using aliasing ppgtt. */ | ||
4012 | gtt_size -= I915_PPGTT_PD_ENTRIES*PAGE_SIZE; | ||
4013 | |||
4014 | i915_gem_init_global_gtt(dev, 0, mappable_size, gtt_size); | ||
4015 | |||
4016 | ret = i915_gem_init_aliasing_ppgtt(dev); | ||
4017 | if (ret) { | ||
4018 | mutex_unlock(&dev->struct_mutex); | ||
4019 | return ret; | ||
4020 | } | ||
4021 | } else { | ||
4022 | /* Let GEM Manage all of the aperture. | ||
4023 | * | ||
4024 | * However, leave one page at the end still bound to the scratch | ||
4025 | * page. There are a number of places where the hardware | ||
4026 | * apparently prefetches past the end of the object, and we've | ||
4027 | * seen multiple hangs with the GPU head pointer stuck in a | ||
4028 | * batchbuffer bound at the last page of the aperture. One page | ||
4029 | * should be enough to keep any prefetching inside of the | ||
4030 | * aperture. | ||
4031 | */ | ||
4032 | i915_gem_init_global_gtt(dev, 0, mappable_size, | ||
4033 | gtt_size); | ||
4034 | } | ||
4035 | |||
4036 | ret = i915_gem_init_hw(dev); | 3991 | ret = i915_gem_init_hw(dev); |
4037 | mutex_unlock(&dev->struct_mutex); | 3992 | mutex_unlock(&dev->struct_mutex); |
4038 | if (ret) { | 3993 | if (ret) { |
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index ea646b4c312a..61b3e728be34 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c | |||
@@ -525,10 +525,10 @@ static void i915_gtt_color_adjust(struct drm_mm_node *node, | |||
525 | } | 525 | } |
526 | } | 526 | } |
527 | 527 | ||
528 | void i915_gem_init_global_gtt(struct drm_device *dev, | 528 | void i915_gem_setup_global_gtt(struct drm_device *dev, |
529 | unsigned long start, | 529 | unsigned long start, |
530 | unsigned long mappable_end, | 530 | unsigned long mappable_end, |
531 | unsigned long end) | 531 | unsigned long end) |
532 | { | 532 | { |
533 | drm_i915_private_t *dev_priv = dev->dev_private; | 533 | drm_i915_private_t *dev_priv = dev->dev_private; |
534 | struct drm_mm_node *entry; | 534 | struct drm_mm_node *entry; |
@@ -573,6 +573,57 @@ void i915_gem_init_global_gtt(struct drm_device *dev, | |||
573 | i915_ggtt_clear_range(dev, end / PAGE_SIZE - 1, 1); | 573 | i915_ggtt_clear_range(dev, end / PAGE_SIZE - 1, 1); |
574 | } | 574 | } |
575 | 575 | ||
576 | static bool | ||
577 | intel_enable_ppgtt(struct drm_device *dev) | ||
578 | { | ||
579 | if (i915_enable_ppgtt >= 0) | ||
580 | return i915_enable_ppgtt; | ||
581 | |||
582 | #ifdef CONFIG_INTEL_IOMMU | ||
583 | /* Disable ppgtt on SNB if VT-d is on. */ | ||
584 | if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) | ||
585 | return false; | ||
586 | #endif | ||
587 | |||
588 | return true; | ||
589 | } | ||
590 | |||
591 | void i915_gem_init_global_gtt(struct drm_device *dev) | ||
592 | { | ||
593 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
594 | unsigned long gtt_size, mappable_size; | ||
595 | int ret; | ||
596 | |||
597 | gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT; | ||
598 | mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; | ||
599 | |||
600 | if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) { | ||
601 | /* PPGTT pdes are stolen from global gtt ptes, so shrink the | ||
602 | * aperture accordingly when using aliasing ppgtt. */ | ||
603 | gtt_size -= I915_PPGTT_PD_ENTRIES*PAGE_SIZE; | ||
604 | |||
605 | i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size); | ||
606 | |||
607 | ret = i915_gem_init_aliasing_ppgtt(dev); | ||
608 | if (ret) { | ||
609 | mutex_unlock(&dev->struct_mutex); | ||
610 | return; | ||
611 | } | ||
612 | } else { | ||
613 | /* Let GEM Manage all of the aperture. | ||
614 | * | ||
615 | * However, leave one page at the end still bound to the scratch | ||
616 | * page. There are a number of places where the hardware | ||
617 | * apparently prefetches past the end of the object, and we've | ||
618 | * seen multiple hangs with the GPU head pointer stuck in a | ||
619 | * batchbuffer bound at the last page of the aperture. One page | ||
620 | * should be enough to keep any prefetching inside of the | ||
621 | * aperture. | ||
622 | */ | ||
623 | i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size); | ||
624 | } | ||
625 | } | ||
626 | |||
576 | static int setup_scratch_page(struct drm_device *dev) | 627 | static int setup_scratch_page(struct drm_device *dev) |
577 | { | 628 | { |
578 | struct drm_i915_private *dev_priv = dev->dev_private; | 629 | struct drm_i915_private *dev_priv = dev->dev_private; |