metag: tz1090: select and instantiate gpio-tz1090

Select ARCH_WANT_OPTIONAL_GPIOLIB from SOC_TZ1090 to allow GPIOLIB and
GPIO_TZ1090 (the main gpio driver) to be enabled once it is merged, and
instantiate it from tz1090.dtsi.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>

2 files changed, 36 insertions, 0 deletions

diff --git a/arch/metag/Kconfig.soc b/arch/metag/Kconfig.soc
index 50f979c2b02d..973640f46752 100644
--- a/arch/metag/Kconfig.soc
+++ b/arch/metag/Kconfig.soc
@@ -16,6 +16,7 @@ config META21_FPGA
 
 config SOC_TZ1090
         bool "Toumaz Xenif TZ1090 SoC (Comet)"
+        select ARCH_WANT_OPTIONAL_GPIOLIB
         select IMGPDC_IRQ
         select METAG_LNKGET_AROUND_CACHE
         select METAG_META21
diff --git a/arch/metag/boot/dts/tz1090.dtsi b/arch/metag/boot/dts/tz1090.dtsi
index d0869b19e08e..66cf55de1825 100644
--- a/arch/metag/boot/dts/tz1090.dtsi
+++ b/arch/metag/boot/dts/tz1090.dtsi
@@ -55,5 +55,40 @@
                         compatible = "img,tz1090-pdc-pinctrl";
                         reg = <0x02006500 0x100>;
                 };
+
+                gpios: gpios@02005800 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "img,tz1090-gpio";
+                        reg = <0x02005800 0x90>;
+
+                        gpios0: bank@0 {
+                                gpio-controller;
+                                interrupt-controller;
+                                #gpio-cells = <2>;
+                                #interrupt-cells = <2>;
+                                reg = <0>;
+                                interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
+                                gpio-ranges = <&pinctrl 0 0 30>;
+                        };
+                        gpios1: bank@1 {
+                                gpio-controller;
+                                interrupt-controller;
+                                #gpio-cells = <2>;
+                                #interrupt-cells = <2>;
+                                reg = <1>;
+                                interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
+                                gpio-ranges = <&pinctrl 0 30 30>;
+                        };
+                        gpios2: bank@2 {
+                                gpio-controller;
+                                interrupt-controller;
+                                #gpio-cells = <2>;
+                                #interrupt-cells = <2>;
+                                reg = <2>;
+                                interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
+                                gpio-ranges = <&pinctrl 0 60 30>;
+                        };
+                };
         };
 };