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authorMax Filippov <jcmvbkbc@gmail.com>2012-09-16 21:44:40 -0400
committerChris Zankel <chris@zankel.net>2012-10-03 18:11:42 -0400
commitd38efc1f150f38b7f593ac7e26789c550d4bc183 (patch)
tree79ec8a6d3066c0e0fe0d303ed62e48bdba8cede1
parent02f3774877382bac52972a677c2c5fbd3532a1a1 (diff)
xtensa: adopt generic io routines
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
-rw-r--r--arch/xtensa/Kconfig2
-rw-r--r--arch/xtensa/include/asm/io.h156
-rw-r--r--arch/xtensa/kernel/Makefile2
-rw-r--r--arch/xtensa/kernel/io.c75
-rw-r--r--drivers/usb/musb/musb_io.h3
5 files changed, 14 insertions, 224 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 8ed64cfae4ff..2debe94443b2 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -11,6 +11,8 @@ config XTENSA
11 select HAVE_GENERIC_HARDIRQS 11 select HAVE_GENERIC_HARDIRQS
12 select GENERIC_IRQ_SHOW 12 select GENERIC_IRQ_SHOW
13 select GENERIC_CPU_DEVICES 13 select GENERIC_CPU_DEVICES
14 select MODULES_USE_ELF_RELA
15 select GENERIC_PCI_IOMAP
14 help 16 help
15 Xtensa processors are 32-bit RISC machines designed by Tensilica 17 Xtensa processors are 32-bit RISC machines designed by Tensilica
16 primarily for embedded systems. These processors are both 18 primarily for embedded systems. These processors are both
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index 4f66dfc103a5..e6be5b9091c2 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -25,74 +25,31 @@
25#define XCHAL_KIO_SIZE 0x10000000 25#define XCHAL_KIO_SIZE 0x10000000
26 26
27#define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x)) 27#define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x))
28#define IO_SPACE_LIMIT ~0
28 29
30#ifdef CONFIG_MMU
29/* 31/*
30 * swap functions to change byte order from little-endian to big-endian and 32 * Return the virtual address for the specified bus memory.
31 * vice versa.
32 */
33
34static inline unsigned short _swapw (unsigned short v)
35{
36 return (v << 8) | (v >> 8);
37}
38
39static inline unsigned int _swapl (unsigned int v)
40{
41 return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24);
42}
43
44/*
45 * Change virtual addresses to physical addresses and vv.
46 * These are trivial on the 1:1 Linux/Xtensa mapping
47 */
48
49static inline unsigned long virt_to_phys(volatile void * address)
50{
51 return __pa(address);
52}
53
54static inline void * phys_to_virt(unsigned long address)
55{
56 return __va(address);
57}
58
59/*
60 * virt_to_bus and bus_to_virt are deprecated.
61 */
62
63#define virt_to_bus(x) virt_to_phys(x)
64#define bus_to_virt(x) phys_to_virt(x)
65
66/*
67 * Return the virtual (cached) address for the specified bus memory.
68 * Note that we currently don't support any address outside the KIO segment. 33 * Note that we currently don't support any address outside the KIO segment.
69 */ 34 */
70static inline void __iomem *ioremap_nocache(unsigned long offset, 35static inline void __iomem *ioremap_nocache(unsigned long offset,
71 unsigned long size) 36 unsigned long size)
72{ 37{
73#ifdef CONFIG_MMU
74 if (offset >= XCHAL_KIO_PADDR 38 if (offset >= XCHAL_KIO_PADDR
75 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE) 39 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE)
76 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR); 40 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR);
77 else 41 else
78 BUG(); 42 BUG();
79#else
80 return (void *)offset;
81#endif
82} 43}
83 44
84static inline void __iomem *ioremap_cache(unsigned long offset, 45static inline void __iomem *ioremap_cache(unsigned long offset,
85 unsigned long size) 46 unsigned long size)
86{ 47{
87#ifdef CONFIG_MMU
88 if (offset >= XCHAL_KIO_PADDR 48 if (offset >= XCHAL_KIO_PADDR
89 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE) 49 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE)
90 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR); 50 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR);
91 else 51 else
92 BUG(); 52 BUG();
93#else
94 return (void *)offset;
95#endif
96} 53}
97 54
98#define ioremap_wc ioremap_nocache 55#define ioremap_wc ioremap_nocache
@@ -105,112 +62,17 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
105static inline void iounmap(volatile void __iomem *addr) 62static inline void iounmap(volatile void __iomem *addr)
106{ 63{
107} 64}
65#endif /* CONFIG_MMU */
108 66
109/* 67/*
110 * Generic I/O 68 * Generic I/O
111 */ 69 */
112 70#define readb_relaxed readb
113#define readb(addr) \ 71#define readw_relaxed readw
114 ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; }) 72#define readl_relaxed readl
115#define readw(addr) \
116 ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; })
117#define readl(addr) \
118 ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; })
119#define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b))
120#define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b))
121#define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b))
122
123static inline __u8 __raw_readb(const volatile void __iomem *addr)
124{
125 return *(__force volatile __u8 *)(addr);
126}
127static inline __u16 __raw_readw(const volatile void __iomem *addr)
128{
129 return *(__force volatile __u16 *)(addr);
130}
131static inline __u32 __raw_readl(const volatile void __iomem *addr)
132{
133 return *(__force volatile __u32 *)(addr);
134}
135static inline void __raw_writeb(__u8 b, volatile void __iomem *addr)
136{
137 *(__force volatile __u8 *)(addr) = b;
138}
139static inline void __raw_writew(__u16 b, volatile void __iomem *addr)
140{
141 *(__force volatile __u16 *)(addr) = b;
142}
143static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
144{
145 *(__force volatile __u32 *)(addr) = b;
146}
147
148/* These are the definitions for the x86 IO instructions
149 * inb/inw/inl/outb/outw/outl, the "string" versions
150 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
151 * inb_p/inw_p/...
152 * The macros don't do byte-swapping.
153 */
154
155#define inb(port) readb((u8 *)((port)))
156#define outb(val, port) writeb((val),(u8 *)((unsigned long)(port)))
157#define inw(port) readw((u16 *)((port)))
158#define outw(val, port) writew((val),(u16 *)((unsigned long)(port)))
159#define inl(port) readl((u32 *)((port)))
160#define outl(val, port) writel((val),(u32 *)((unsigned long)(port)))
161
162#define inb_p(port) inb((port))
163#define outb_p(val, port) outb((val), (port))
164#define inw_p(port) inw((port))
165#define outw_p(val, port) outw((val), (port))
166#define inl_p(port) inl((port))
167#define outl_p(val, port) outl((val), (port))
168
169extern void insb (unsigned long port, void *dst, unsigned long count);
170extern void insw (unsigned long port, void *dst, unsigned long count);
171extern void insl (unsigned long port, void *dst, unsigned long count);
172extern void outsb (unsigned long port, const void *src, unsigned long count);
173extern void outsw (unsigned long port, const void *src, unsigned long count);
174extern void outsl (unsigned long port, const void *src, unsigned long count);
175
176#define IO_SPACE_LIMIT ~0
177
178#define memset_io(a,b,c) memset((void *)(a),(b),(c))
179#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
180#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
181
182/* At this point the Xtensa doesn't provide byte swap instructions */
183
184#ifdef __XTENSA_EB__
185# define in_8(addr) (*(u8*)(addr))
186# define in_le16(addr) _swapw(*(u16*)(addr))
187# define in_le32(addr) _swapl(*(u32*)(addr))
188# define out_8(b, addr) *(u8*)(addr) = (b)
189# define out_le16(b, addr) *(u16*)(addr) = _swapw(b)
190# define out_le32(b, addr) *(u32*)(addr) = _swapl(b)
191#elif defined(__XTENSA_EL__)
192# define in_8(addr) (*(u8*)(addr))
193# define in_le16(addr) (*(u16*)(addr))
194# define in_le32(addr) (*(u32*)(addr))
195# define out_8(b, addr) *(u8*)(addr) = (b)
196# define out_le16(b, addr) *(u16*)(addr) = (b)
197# define out_le32(b, addr) *(u32*)(addr) = (b)
198#else
199# error processor byte order undefined!
200#endif
201
202
203/*
204 * Convert a physical pointer to a virtual kernel pointer for /dev/mem access
205 */
206#define xlate_dev_mem_ptr(p) __va(p)
207
208/*
209 * Convert a virtual cached pointer to an uncached pointer
210 */
211#define xlate_dev_kmem_ptr(p) p
212
213 73
214#endif /* __KERNEL__ */ 74#endif /* __KERNEL__ */
215 75
76#include <asm-generic/io.h>
77
216#endif /* _XTENSA_IO_H */ 78#endif /* _XTENSA_IO_H */
diff --git a/arch/xtensa/kernel/Makefile b/arch/xtensa/kernel/Makefile
index 0f9f35fc191a..f36cef5a62ff 100644
--- a/arch/xtensa/kernel/Makefile
+++ b/arch/xtensa/kernel/Makefile
@@ -6,7 +6,7 @@ extra-y := head.o vmlinux.lds
6 6
7obj-y := align.o entry.o irq.o coprocessor.o process.o ptrace.o \ 7obj-y := align.o entry.o irq.o coprocessor.o process.o ptrace.o \
8 setup.o signal.o syscall.o time.o traps.o vectors.o platform.o \ 8 setup.o signal.o syscall.o time.o traps.o vectors.o platform.o \
9 pci-dma.o io.o 9 pci-dma.o
10 10
11obj-$(CONFIG_KGDB) += xtensa-stub.o 11obj-$(CONFIG_KGDB) += xtensa-stub.o
12obj-$(CONFIG_PCI) += pci.o 12obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/xtensa/kernel/io.c b/arch/xtensa/kernel/io.c
deleted file mode 100644
index 5b65269b1d2f..000000000000
--- a/arch/xtensa/kernel/io.c
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * arch/xtensa/io.c
3 *
4 * IO primitives
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Copied from sparc.
12 *
13 * Chris Zankel <chris@zankel.net>
14 *
15 */
16
17#include <asm/io.h>
18#include <asm/byteorder.h>
19
20void outsb(unsigned long addr, const void *src, unsigned long count) {
21 while (count) {
22 count -= 1;
23 writeb(*(const char *)src, addr);
24 src += 1;
25 addr += 1;
26 }
27}
28
29void outsw(unsigned long addr, const void *src, unsigned long count) {
30 while (count) {
31 count -= 2;
32 writew(*(const short *)src, addr);
33 src += 2;
34 addr += 2;
35 }
36}
37
38void outsl(unsigned long addr, const void *src, unsigned long count) {
39 while (count) {
40 count -= 4;
41 writel(*(const long *)src, addr);
42 src += 4;
43 addr += 4;
44 }
45}
46
47void insb(unsigned long addr, void *dst, unsigned long count) {
48 while (count) {
49 count -= 1;
50 *(unsigned char *)dst = readb(addr);
51 dst += 1;
52 addr += 1;
53 }
54}
55
56void insw(unsigned long addr, void *dst, unsigned long count) {
57 while (count) {
58 count -= 2;
59 *(unsigned short *)dst = readw(addr);
60 dst += 2;
61 addr += 2;
62 }
63}
64
65void insl(unsigned long addr, void *dst, unsigned long count) {
66 while (count) {
67 count -= 4;
68 /*
69 * XXX I am sure we are in for an unaligned trap here.
70 */
71 *(unsigned long *)dst = readl(addr);
72 dst += 4;
73 addr += 4;
74 }
75}
diff --git a/drivers/usb/musb/musb_io.h b/drivers/usb/musb/musb_io.h
index f7c1c8e2dc3f..565ad1617832 100644
--- a/drivers/usb/musb/musb_io.h
+++ b/drivers/usb/musb/musb_io.h
@@ -40,7 +40,8 @@
40#if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \ 40#if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \
41 && !defined(CONFIG_AVR32) && !defined(CONFIG_PPC32) \ 41 && !defined(CONFIG_AVR32) && !defined(CONFIG_PPC32) \
42 && !defined(CONFIG_PPC64) && !defined(CONFIG_BLACKFIN) \ 42 && !defined(CONFIG_PPC64) && !defined(CONFIG_BLACKFIN) \
43 && !defined(CONFIG_MIPS) && !defined(CONFIG_M68K) 43 && !defined(CONFIG_MIPS) && !defined(CONFIG_M68K) \
44 && !defined(CONFIG_XTENSA)
44static inline void readsl(const void __iomem *addr, void *buf, int len) 45static inline void readsl(const void __iomem *addr, void *buf, int len)
45 { insl((unsigned long)addr, buf, len); } 46 { insl((unsigned long)addr, buf, len); }
46static inline void readsw(const void __iomem *addr, void *buf, int len) 47static inline void readsw(const void __iomem *addr, void *buf, int len)