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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2014-02-20 06:11:31 -0500
committerJason Cooper <jason@lakedaemon.net>2014-02-21 23:11:03 -0500
commitd11548e3113961b3d3c0b362f0dbe72d72a7959b (patch)
treea838d5d85714ed706b0b6569635b739b77e64ca3
parentf327d43da130fe6a4a0b3ecf6ad27eff7fd92877 (diff)
ARM: mvebu: use macros for interrupt flags on Armada 375/38x
Instead of hardcoding the values of the interrupt flags, use the macros provided by <include/dt-bindings/interrupt-controller/irq.h> and <include/dt-bindings/interrupt-controller/arm-gic.h> for the Armada 375 and Armada 38x Device Tree files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat
-rw-r--r--arch/arm/boot/dts/armada-375.dtsi57
-rw-r--r--arch/arm/boot/dts/armada-380.dtsi6
-rw-r--r--arch/arm/boot/dts/armada-385.dtsi8
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi45
4 files changed, 63 insertions, 53 deletions
diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index 23d497f3f3bc..3877693fb2d8 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -13,6 +13,7 @@
13 13
14#include "skeleton.dtsi" 14#include "skeleton.dtsi"
15#include <dt-bindings/interrupt-controller/arm-gic.h> 15#include <dt-bindings/interrupt-controller/arm-gic.h>
16#include <dt-bindings/interrupt-controller/irq.h>
16 17
17#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) 18#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
18 19
@@ -130,7 +131,7 @@
130 timer@c600 { 131 timer@c600 {
131 compatible = "arm,cortex-a9-twd-timer"; 132 compatible = "arm,cortex-a9-twd-timer";
132 reg = <0xc600 0x20>; 133 reg = <0xc600 0x20>;
133 interrupts = <GIC_PPI 13 0x301>; 134 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
134 clocks = <&coreclk 2>; 135 clocks = <&coreclk 2>;
135 }; 136 };
136 137
@@ -149,7 +150,7 @@
149 #address-cells = <1>; 150 #address-cells = <1>;
150 #size-cells = <0>; 151 #size-cells = <0>;
151 cell-index = <0>; 152 cell-index = <0>;
152 interrupts = <GIC_SPI 1 0x4>; 153 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
153 clocks = <&coreclk 0>; 154 clocks = <&coreclk 0>;
154 status = "disabled"; 155 status = "disabled";
155 }; 156 };
@@ -160,7 +161,7 @@
160 #address-cells = <1>; 161 #address-cells = <1>;
161 #size-cells = <0>; 162 #size-cells = <0>;
162 cell-index = <1>; 163 cell-index = <1>;
163 interrupts = <GIC_SPI 63 0x4>; 164 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
164 clocks = <&coreclk 0>; 165 clocks = <&coreclk 0>;
165 status = "disabled"; 166 status = "disabled";
166 }; 167 };
@@ -170,7 +171,7 @@
170 reg = <0x11000 0x20>; 171 reg = <0x11000 0x20>;
171 #address-cells = <1>; 172 #address-cells = <1>;
172 #size-cells = <0>; 173 #size-cells = <0>;
173 interrupts = <GIC_SPI 2 0x4>; 174 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
174 timeout-ms = <1000>; 175 timeout-ms = <1000>;
175 clocks = <&coreclk 0>; 176 clocks = <&coreclk 0>;
176 status = "disabled"; 177 status = "disabled";
@@ -181,7 +182,7 @@
181 reg = <0x11100 0x20>; 182 reg = <0x11100 0x20>;
182 #address-cells = <1>; 183 #address-cells = <1>;
183 #size-cells = <0>; 184 #size-cells = <0>;
184 interrupts = <GIC_SPI 3 0x4>; 185 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
185 timeout-ms = <1000>; 186 timeout-ms = <1000>;
186 clocks = <&coreclk 0>; 187 clocks = <&coreclk 0>;
187 status = "disabled"; 188 status = "disabled";
@@ -191,7 +192,7 @@
191 compatible = "snps,dw-apb-uart"; 192 compatible = "snps,dw-apb-uart";
192 reg = <0x12000 0x100>; 193 reg = <0x12000 0x100>;
193 reg-shift = <2>; 194 reg-shift = <2>;
194 interrupts = <GIC_SPI 12 4>; 195 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
195 reg-io-width = <1>; 196 reg-io-width = <1>;
196 status = "disabled"; 197 status = "disabled";
197 }; 198 };
@@ -200,7 +201,7 @@
200 compatible = "snps,dw-apb-uart"; 201 compatible = "snps,dw-apb-uart";
201 reg = <0x12100 0x100>; 202 reg = <0x12100 0x100>;
202 reg-shift = <2>; 203 reg-shift = <2>;
203 interrupts = <GIC_SPI 13 4>; 204 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
204 reg-io-width = <1>; 205 reg-io-width = <1>;
205 status = "disabled"; 206 status = "disabled";
206 }; 207 };
@@ -249,8 +250,10 @@
249 #gpio-cells = <2>; 250 #gpio-cells = <2>;
250 interrupt-controller; 251 interrupt-controller;
251 #interrupt-cells = <2>; 252 #interrupt-cells = <2>;
252 interrupts = <GIC_SPI 53 0x4>, <GIC_SPI 54 0x4>, 253 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
253 <GIC_SPI 55 0x4>, <GIC_SPI 56 0x4>; 254 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
255 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
256 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
254 }; 257 };
255 258
256 gpio1: gpio@18140 { 259 gpio1: gpio@18140 {
@@ -261,8 +264,10 @@
261 #gpio-cells = <2>; 264 #gpio-cells = <2>;
262 interrupt-controller; 265 interrupt-controller;
263 #interrupt-cells = <2>; 266 #interrupt-cells = <2>;
264 interrupts = <GIC_SPI 58 0x4>, <GIC_SPI 59 0x4>, 267 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
265 <GIC_SPI 60 0x4>, <GIC_SPI 61 0x4>; 268 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
269 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
270 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
266 }; 271 };
267 272
268 gpio2: gpio@18180 { 273 gpio2: gpio@18180 {
@@ -273,7 +278,7 @@
273 #gpio-cells = <2>; 278 #gpio-cells = <2>;
274 interrupt-controller; 279 interrupt-controller;
275 #interrupt-cells = <2>; 280 #interrupt-cells = <2>;
276 interrupts = <GIC_SPI 62 0x4>; 281 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
277 }; 282 };
278 283
279 system-controller@18200 { 284 system-controller@18200 {
@@ -300,16 +305,16 @@
300 #size-cells = <1>; 305 #size-cells = <1>;
301 interrupt-controller; 306 interrupt-controller;
302 msi-controller; 307 msi-controller;
303 interrupts = <GIC_PPI 15 0x4>; 308 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
304 }; 309 };
305 310
306 timer@20300 { 311 timer@20300 {
307 compatible = "marvell,armada-375-timer", "marvell,armada-370-timer"; 312 compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
308 reg = <0x20300 0x30>, <0x21040 0x30>; 313 reg = <0x20300 0x30>, <0x21040 0x30>;
309 interrupts-extended = <&gic GIC_SPI 8 4>, 314 interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
310 <&gic GIC_SPI 9 4>, 315 <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
311 <&gic GIC_SPI 10 4>, 316 <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
312 <&gic GIC_SPI 11 4>, 317 <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
313 <&mpic 5>, 318 <&mpic 5>,
314 <&mpic 6>; 319 <&mpic 6>;
315 clocks = <&coreclk 0>; 320 clocks = <&coreclk 0>;
@@ -323,12 +328,12 @@
323 status = "okay"; 328 status = "okay";
324 329
325 xor00 { 330 xor00 {
326 interrupts = <GIC_SPI 22 0x4>; 331 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
327 dmacap,memcpy; 332 dmacap,memcpy;
328 dmacap,xor; 333 dmacap,xor;
329 }; 334 };
330 xor01 { 335 xor01 {
331 interrupts = <GIC_SPI 23 0x4>; 336 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
332 dmacap,memcpy; 337 dmacap,memcpy;
333 dmacap,xor; 338 dmacap,xor;
334 dmacap,memset; 339 dmacap,memset;
@@ -343,12 +348,12 @@
343 status = "okay"; 348 status = "okay";
344 349
345 xor10 { 350 xor10 {
346 interrupts = <GIC_SPI 65 0x4>; 351 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
347 dmacap,memcpy; 352 dmacap,memcpy;
348 dmacap,xor; 353 dmacap,xor;
349 }; 354 };
350 xor11 { 355 xor11 {
351 interrupts = <GIC_SPI 66 0x4>; 356 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
352 dmacap,memcpy; 357 dmacap,memcpy;
353 dmacap,xor; 358 dmacap,xor;
354 dmacap,memset; 359 dmacap,memset;
@@ -358,7 +363,7 @@
358 sata@a0000 { 363 sata@a0000 {
359 compatible = "marvell,orion-sata"; 364 compatible = "marvell,orion-sata";
360 reg = <0xa0000 0x5000>; 365 reg = <0xa0000 0x5000>;
361 interrupts = <GIC_SPI 26 0x4>; 366 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
362 clocks = <&gateclk 14>, <&gateclk 20>; 367 clocks = <&gateclk 14>, <&gateclk 20>;
363 clock-names = "0", "1"; 368 clock-names = "0", "1";
364 status = "disabled"; 369 status = "disabled";
@@ -369,7 +374,7 @@
369 reg = <0xd0000 0x54>; 374 reg = <0xd0000 0x54>;
370 #address-cells = <1>; 375 #address-cells = <1>;
371 #size-cells = <1>; 376 #size-cells = <1>;
372 interrupts = <GIC_SPI 84 0x4>; 377 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
373 clocks = <&gateclk 11>; 378 clocks = <&gateclk 11>;
374 status = "disabled"; 379 status = "disabled";
375 }; 380 };
@@ -377,7 +382,7 @@
377 mvsdio@d4000 { 382 mvsdio@d4000 {
378 compatible = "marvell,orion-sdio"; 383 compatible = "marvell,orion-sdio";
379 reg = <0xd4000 0x200>; 384 reg = <0xd4000 0x200>;
380 interrupts = <GIC_SPI 25 0x4>; 385 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
381 clocks = <&gateclk 17>; 386 clocks = <&gateclk 17>;
382 bus-width = <4>; 387 bus-width = <4>;
383 cap-sdio-irq; 388 cap-sdio-irq;
@@ -430,7 +435,7 @@
430 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 435 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
431 0x81000000 0 0 0x81000000 0x1 0 1 0>; 436 0x81000000 0 0 0x81000000 0x1 0 1 0>;
432 interrupt-map-mask = <0 0 0 0>; 437 interrupt-map-mask = <0 0 0 0>;
433 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>; 438 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
434 marvell,pcie-port = <0>; 439 marvell,pcie-port = <0>;
435 marvell,pcie-lane = <0>; 440 marvell,pcie-lane = <0>;
436 clocks = <&gateclk 5>; 441 clocks = <&gateclk 5>;
@@ -447,7 +452,7 @@
447 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 452 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
448 0x81000000 0 0 0x81000000 0x2 0 1 0>; 453 0x81000000 0 0 0x81000000 0x2 0 1 0>;
449 interrupt-map-mask = <0 0 0 0>; 454 interrupt-map-mask = <0 0 0 0>;
450 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>; 455 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
451 marvell,pcie-port = <0>; 456 marvell,pcie-port = <0>;
452 marvell,pcie-lane = <1>; 457 marvell,pcie-lane = <1>;
453 clocks = <&gateclk 6>; 458 clocks = <&gateclk 6>;
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 678ba3d0c485..068031f0f263 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -70,7 +70,7 @@
70 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 70 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
71 0x81000000 0 0 0x81000000 0x1 0 1 0>; 71 0x81000000 0 0 0x81000000 0x1 0 1 0>;
72 interrupt-map-mask = <0 0 0 0>; 72 interrupt-map-mask = <0 0 0 0>;
73 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>; 73 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
74 marvell,pcie-port = <0>; 74 marvell,pcie-port = <0>;
75 marvell,pcie-lane = <0>; 75 marvell,pcie-lane = <0>;
76 clocks = <&gateclk 8>; 76 clocks = <&gateclk 8>;
@@ -88,7 +88,7 @@
88 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 88 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
89 0x81000000 0 0 0x81000000 0x2 0 1 0>; 89 0x81000000 0 0 0x81000000 0x2 0 1 0>;
90 interrupt-map-mask = <0 0 0 0>; 90 interrupt-map-mask = <0 0 0 0>;
91 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>; 91 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
92 marvell,pcie-port = <1>; 92 marvell,pcie-port = <1>;
93 marvell,pcie-lane = <0>; 93 marvell,pcie-lane = <0>;
94 clocks = <&gateclk 5>; 94 clocks = <&gateclk 5>;
@@ -106,7 +106,7 @@
106 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 106 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
107 0x81000000 0 0 0x81000000 0x3 0 1 0>; 107 0x81000000 0 0 0x81000000 0x3 0 1 0>;
108 interrupt-map-mask = <0 0 0 0>; 108 interrupt-map-mask = <0 0 0 0>;
109 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 0x4>; 109 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
110 marvell,pcie-port = <2>; 110 marvell,pcie-port = <2>;
111 marvell,pcie-lane = <0>; 111 marvell,pcie-lane = <0>;
112 clocks = <&gateclk 6>; 112 clocks = <&gateclk 6>;
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index 055bc2f1c051..e2919f02e1d4 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -81,7 +81,7 @@
81 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 81 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
82 0x81000000 0 0 0x81000000 0x1 0 1 0>; 82 0x81000000 0 0 0x81000000 0x1 0 1 0>;
83 interrupt-map-mask = <0 0 0 0>; 83 interrupt-map-mask = <0 0 0 0>;
84 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>; 84 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
85 marvell,pcie-port = <0>; 85 marvell,pcie-port = <0>;
86 marvell,pcie-lane = <0>; 86 marvell,pcie-lane = <0>;
87 clocks = <&gateclk 8>; 87 clocks = <&gateclk 8>;
@@ -99,7 +99,7 @@
99 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 99 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
100 0x81000000 0 0 0x81000000 0x2 0 1 0>; 100 0x81000000 0 0 0x81000000 0x2 0 1 0>;
101 interrupt-map-mask = <0 0 0 0>; 101 interrupt-map-mask = <0 0 0 0>;
102 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>; 102 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
103 marvell,pcie-port = <1>; 103 marvell,pcie-port = <1>;
104 marvell,pcie-lane = <0>; 104 marvell,pcie-lane = <0>;
105 clocks = <&gateclk 5>; 105 clocks = <&gateclk 5>;
@@ -117,7 +117,7 @@
117 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 117 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
118 0x81000000 0 0 0x81000000 0x3 0 1 0>; 118 0x81000000 0 0 0x81000000 0x3 0 1 0>;
119 interrupt-map-mask = <0 0 0 0>; 119 interrupt-map-mask = <0 0 0 0>;
120 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 0x4>; 120 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
121 marvell,pcie-port = <2>; 121 marvell,pcie-port = <2>;
122 marvell,pcie-lane = <0>; 122 marvell,pcie-lane = <0>;
123 clocks = <&gateclk 6>; 123 clocks = <&gateclk 6>;
@@ -138,7 +138,7 @@
138 ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 138 ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
139 0x81000000 0 0 0x81000000 0x4 0 1 0>; 139 0x81000000 0 0 0x81000000 0x4 0 1 0>;
140 interrupt-map-mask = <0 0 0 0>; 140 interrupt-map-mask = <0 0 0 0>;
141 interrupt-map = <0 0 0 0 &gic GIC_SPI 71 0x4>; 141 interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
142 marvell,pcie-port = <3>; 142 marvell,pcie-port = <3>;
143 marvell,pcie-lane = <0>; 143 marvell,pcie-lane = <0>;
144 clocks = <&gateclk 7>; 144 clocks = <&gateclk 7>;
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 502d21ae7b61..812ce280b349 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -14,6 +14,7 @@
14 14
15#include "skeleton.dtsi" 15#include "skeleton.dtsi"
16#include <dt-bindings/interrupt-controller/arm-gic.h> 16#include <dt-bindings/interrupt-controller/arm-gic.h>
17#include <dt-bindings/interrupt-controller/irq.h>
17 18
18#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) 19#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
19 20
@@ -110,7 +111,7 @@
110 timer@c600 { 111 timer@c600 {
111 compatible = "arm,cortex-a9-twd-timer"; 112 compatible = "arm,cortex-a9-twd-timer";
112 reg = <0xc600 0x20>; 113 reg = <0xc600 0x20>;
113 interrupts = <GIC_PPI 13 0x301>; 114 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
114 clocks = <&coreclk 2>; 115 clocks = <&coreclk 2>;
115 }; 116 };
116 117
@@ -129,7 +130,7 @@
129 #address-cells = <1>; 130 #address-cells = <1>;
130 #size-cells = <0>; 131 #size-cells = <0>;
131 cell-index = <0>; 132 cell-index = <0>;
132 interrupts = <GIC_SPI 1 0x4>; 133 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
133 clocks = <&coreclk 0>; 134 clocks = <&coreclk 0>;
134 status = "disabled"; 135 status = "disabled";
135 }; 136 };
@@ -140,7 +141,7 @@
140 #address-cells = <1>; 141 #address-cells = <1>;
141 #size-cells = <0>; 142 #size-cells = <0>;
142 cell-index = <1>; 143 cell-index = <1>;
143 interrupts = <GIC_SPI 63 0x4>; 144 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
144 clocks = <&coreclk 0>; 145 clocks = <&coreclk 0>;
145 status = "disabled"; 146 status = "disabled";
146 }; 147 };
@@ -150,7 +151,7 @@
150 reg = <0x11000 0x20>; 151 reg = <0x11000 0x20>;
151 #address-cells = <1>; 152 #address-cells = <1>;
152 #size-cells = <0>; 153 #size-cells = <0>;
153 interrupts = <GIC_SPI 2 0x4>; 154 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
154 timeout-ms = <1000>; 155 timeout-ms = <1000>;
155 clocks = <&coreclk 0>; 156 clocks = <&coreclk 0>;
156 status = "disabled"; 157 status = "disabled";
@@ -161,7 +162,7 @@
161 reg = <0x11100 0x20>; 162 reg = <0x11100 0x20>;
162 #address-cells = <1>; 163 #address-cells = <1>;
163 #size-cells = <0>; 164 #size-cells = <0>;
164 interrupts = <GIC_SPI 3 0x4>; 165 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
165 timeout-ms = <1000>; 166 timeout-ms = <1000>;
166 clocks = <&coreclk 0>; 167 clocks = <&coreclk 0>;
167 status = "disabled"; 168 status = "disabled";
@@ -171,7 +172,7 @@
171 compatible = "snps,dw-apb-uart"; 172 compatible = "snps,dw-apb-uart";
172 reg = <0x12000 0x100>; 173 reg = <0x12000 0x100>;
173 reg-shift = <2>; 174 reg-shift = <2>;
174 interrupts = <GIC_SPI 12 4>; 175 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
175 reg-io-width = <1>; 176 reg-io-width = <1>;
176 status = "disabled"; 177 status = "disabled";
177 }; 178 };
@@ -180,7 +181,7 @@
180 compatible = "snps,dw-apb-uart"; 181 compatible = "snps,dw-apb-uart";
181 reg = <0x12100 0x100>; 182 reg = <0x12100 0x100>;
182 reg-shift = <2>; 183 reg-shift = <2>;
183 interrupts = <GIC_SPI 13 4>; 184 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
184 reg-io-width = <1>; 185 reg-io-width = <1>;
185 status = "disabled"; 186 status = "disabled";
186 }; 187 };
@@ -198,8 +199,10 @@
198 #gpio-cells = <2>; 199 #gpio-cells = <2>;
199 interrupt-controller; 200 interrupt-controller;
200 #interrupt-cells = <2>; 201 #interrupt-cells = <2>;
201 interrupts = <GIC_SPI 53 0x4>, <GIC_SPI 54 0x4>, 202 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
202 <GIC_SPI 55 0x4>, <GIC_SPI 56 0x4>; 203 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
204 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
205 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
203 }; 206 };
204 207
205 gpio1: gpio@18140 { 208 gpio1: gpio@18140 {
@@ -210,8 +213,10 @@
210 #gpio-cells = <2>; 213 #gpio-cells = <2>;
211 interrupt-controller; 214 interrupt-controller;
212 #interrupt-cells = <2>; 215 #interrupt-cells = <2>;
213 interrupts = <GIC_SPI 58 0x4>, <GIC_SPI 59 0x4>, 216 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
214 <GIC_SPI 60 0x4>, <GIC_SPI 61 0x4>; 217 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
218 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
219 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
215 }; 220 };
216 221
217 system-controller@18200 { 222 system-controller@18200 {
@@ -245,17 +250,17 @@
245 #size-cells = <1>; 250 #size-cells = <1>;
246 interrupt-controller; 251 interrupt-controller;
247 msi-controller; 252 msi-controller;
248 interrupts = <GIC_PPI 15 0x4>; 253 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
249 }; 254 };
250 255
251 timer@20300 { 256 timer@20300 {
252 compatible = "marvell,armada-380-timer", 257 compatible = "marvell,armada-380-timer",
253 "marvell,armada-xp-timer"; 258 "marvell,armada-xp-timer";
254 reg = <0x20300 0x30>, <0x21040 0x30>; 259 reg = <0x20300 0x30>, <0x21040 0x30>;
255 interrupts-extended = <&gic GIC_SPI 8 4>, 260 interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
256 <&gic GIC_SPI 9 4>, 261 <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
257 <&gic GIC_SPI 10 4>, 262 <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
258 <&gic GIC_SPI 11 4>, 263 <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
259 <&mpic 5>, 264 <&mpic 5>,
260 <&mpic 6>; 265 <&mpic 6>;
261 clocks = <&coreclk 2>, <&refclk>; 266 clocks = <&coreclk 2>, <&refclk>;
@@ -286,12 +291,12 @@
286 status = "okay"; 291 status = "okay";
287 292
288 xor00 { 293 xor00 {
289 interrupts = <GIC_SPI 22 0x4>; 294 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
290 dmacap,memcpy; 295 dmacap,memcpy;
291 dmacap,xor; 296 dmacap,xor;
292 }; 297 };
293 xor01 { 298 xor01 {
294 interrupts = <GIC_SPI 23 0x4>; 299 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
295 dmacap,memcpy; 300 dmacap,memcpy;
296 dmacap,xor; 301 dmacap,xor;
297 dmacap,memset; 302 dmacap,memset;
@@ -306,12 +311,12 @@
306 status = "okay"; 311 status = "okay";
307 312
308 xor10 { 313 xor10 {
309 interrupts = <GIC_SPI 65 0x4>; 314 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
310 dmacap,memcpy; 315 dmacap,memcpy;
311 dmacap,xor; 316 dmacap,xor;
312 }; 317 };
313 xor11 { 318 xor11 {
314 interrupts = <GIC_SPI 66 0x4>; 319 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
315 dmacap,memcpy; 320 dmacap,memcpy;
316 dmacap,xor; 321 dmacap,xor;
317 dmacap,memset; 322 dmacap,memset;
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-16 16:13:32 -0400