diff options
| author | Archit Taneja <archit@ti.com> | 2012-06-24 03:38:10 -0400 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-06-29 03:15:53 -0400 |
| commit | cc937e5e4bcf6c97746384e5c07dd2b2c45898b3 (patch) | |
| tree | 3481dedbc93da8343c3f5e9622769795b737e833 | |
| parent | 23bae3adbf90f8ad537687e1b46b7c87558936ae (diff) | |
OMAPDSS: HDMI: Remove custom hdmi_video_timings struct
The hdmi CEA and VESA timings were represented by the struct hdmi_video_timings,
omap_video_timings couldn't be used as it didn't contain the fields hsync/vsync
polarities and interlaced/progressive information.
Remove hdmi_video_timings, and use omap_video_timings instead.
Cc: Mythri P K <mythripk@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
| -rw-r--r-- | drivers/video/omap2/dss/hdmi.c | 241 | ||||
| -rw-r--r-- | drivers/video/omap2/dss/ti_hdmi.h | 19 | ||||
| -rw-r--r-- | drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 8 |
3 files changed, 213 insertions, 55 deletions
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index fb834abc5c2e..060216fdc578 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c | |||
| @@ -78,43 +78,214 @@ static struct { | |||
| 78 | */ | 78 | */ |
| 79 | 79 | ||
| 80 | static const struct hdmi_config cea_timings[] = { | 80 | static const struct hdmi_config cea_timings[] = { |
| 81 | { {640, 480, 25200, 96, 16, 48, 2, 10, 33, 0, 0, 0}, {1, HDMI_HDMI} }, | 81 | { |
| 82 | { {720, 480, 27027, 62, 16, 60, 6, 9, 30, 0, 0, 0}, {2, HDMI_HDMI} }, | 82 | { 640, 480, 25200, 96, 16, 48, 2, 10, 33, |
| 83 | { {1280, 720, 74250, 40, 110, 220, 5, 5, 20, 1, 1, 0}, {4, HDMI_HDMI} }, | 83 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 84 | { {1920, 540, 74250, 44, 88, 148, 5, 2, 15, 1, 1, 1}, {5, HDMI_HDMI} }, | 84 | false, }, |
| 85 | { {1440, 240, 27027, 124, 38, 114, 3, 4, 15, 0, 0, 1}, {6, HDMI_HDMI} }, | 85 | { 1, HDMI_HDMI }, |
| 86 | { {1920, 1080, 148500, 44, 88, 148, 5, 4, 36, 1, 1, 0}, {16, HDMI_HDMI} }, | 86 | }, |
| 87 | { {720, 576, 27000, 64, 12, 68, 5, 5, 39, 0, 0, 0}, {17, HDMI_HDMI} }, | 87 | { |
| 88 | { {1280, 720, 74250, 40, 440, 220, 5, 5, 20, 1, 1, 0}, {19, HDMI_HDMI} }, | 88 | { 720, 480, 27027, 62, 16, 60, 6, 9, 30, |
| 89 | { {1920, 540, 74250, 44, 528, 148, 5, 2, 15, 1, 1, 1}, {20, HDMI_HDMI} }, | 89 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 90 | { {1440, 288, 27000, 126, 24, 138, 3, 2, 19, 0, 0, 1}, {21, HDMI_HDMI} }, | 90 | false, }, |
| 91 | { {1440, 576, 54000, 128, 24, 136, 5, 5, 39, 0, 0, 0}, {29, HDMI_HDMI} }, | 91 | { 2, HDMI_HDMI }, |
| 92 | { {1920, 1080, 148500, 44, 528, 148, 5, 4, 36, 1, 1, 0}, {31, HDMI_HDMI} }, | 92 | }, |
| 93 | { {1920, 1080, 74250, 44, 638, 148, 5, 4, 36, 1, 1, 0}, {32, HDMI_HDMI} }, | 93 | { |
| 94 | { {2880, 480, 108108, 248, 64, 240, 6, 9, 30, 0, 0, 0}, {35, HDMI_HDMI} }, | 94 | { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, |
| 95 | { {2880, 576, 108000, 256, 48, 272, 5, 5, 39, 0, 0, 0}, {37, HDMI_HDMI} }, | 95 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 96 | false, }, | ||
| 97 | { 4, HDMI_HDMI }, | ||
| 98 | }, | ||
| 99 | { | ||
| 100 | { 1920, 540, 74250, 44, 88, 148, 5, 2, 15, | ||
| 101 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 102 | true, }, | ||
| 103 | { 5, HDMI_HDMI }, | ||
| 104 | }, | ||
| 105 | { | ||
| 106 | { 1440, 240, 27027, 124, 38, 114, 3, 4, 15, | ||
| 107 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 108 | true, }, | ||
| 109 | { 6, HDMI_HDMI }, | ||
| 110 | }, | ||
| 111 | { | ||
| 112 | { 1920, 1080, 148500, 44, 88, 148, 5, 4, 36, | ||
| 113 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 114 | false, }, | ||
| 115 | { 16, HDMI_HDMI }, | ||
| 116 | }, | ||
| 117 | { | ||
| 118 | { 720, 576, 27000, 64, 12, 68, 5, 5, 39, | ||
| 119 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 120 | false, }, | ||
| 121 | { 17, HDMI_HDMI }, | ||
| 122 | }, | ||
| 123 | { | ||
| 124 | { 1280, 720, 74250, 40, 440, 220, 5, 5, 20, | ||
| 125 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 126 | false, }, | ||
| 127 | { 19, HDMI_HDMI }, | ||
| 128 | }, | ||
| 129 | { | ||
| 130 | { 1920, 540, 74250, 44, 528, 148, 5, 2, 15, | ||
| 131 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 132 | true, }, | ||
| 133 | { 20, HDMI_HDMI }, | ||
| 134 | }, | ||
| 135 | { | ||
| 136 | { 1440, 288, 27000, 126, 24, 138, 3, 2, 19, | ||
| 137 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 138 | true, }, | ||
| 139 | { 21, HDMI_HDMI }, | ||
| 140 | }, | ||
| 141 | { | ||
| 142 | { 1440, 576, 54000, 128, 24, 136, 5, 5, 39, | ||
| 143 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 144 | false, }, | ||
| 145 | { 29, HDMI_HDMI }, | ||
| 146 | }, | ||
| 147 | { | ||
| 148 | { 1920, 1080, 148500, 44, 528, 148, 5, 4, 36, | ||
| 149 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 150 | false, }, | ||
| 151 | { 31, HDMI_HDMI }, | ||
| 152 | }, | ||
| 153 | { | ||
| 154 | { 1920, 1080, 74250, 44, 638, 148, 5, 4, 36, | ||
| 155 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 156 | false, }, | ||
| 157 | { 32, HDMI_HDMI }, | ||
| 158 | }, | ||
| 159 | { | ||
| 160 | { 2880, 480, 108108, 248, 64, 240, 6, 9, 30, | ||
| 161 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 162 | false, }, | ||
| 163 | { 35, HDMI_HDMI }, | ||
| 164 | }, | ||
| 165 | { | ||
| 166 | { 2880, 576, 108000, 256, 48, 272, 5, 5, 39, | ||
| 167 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 168 | false, }, | ||
| 169 | { 37, HDMI_HDMI }, | ||
| 170 | }, | ||
| 96 | }; | 171 | }; |
| 172 | |||
| 97 | static const struct hdmi_config vesa_timings[] = { | 173 | static const struct hdmi_config vesa_timings[] = { |
| 98 | /* VESA From Here */ | 174 | /* VESA From Here */ |
| 99 | { {640, 480, 25175, 96, 16, 48, 2 , 11, 31, 0, 0, 0}, {4, HDMI_DVI} }, | 175 | { |
| 100 | { {800, 600, 40000, 128, 40, 88, 4 , 1, 23, 1, 1, 0}, {9, HDMI_DVI} }, | 176 | { 640, 480, 25175, 96, 16, 48, 2, 11, 31, |
| 101 | { {848, 480, 33750, 112, 16, 112, 8 , 6, 23, 1, 1, 0}, {0xE, HDMI_DVI} }, | 177 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 102 | { {1280, 768, 79500, 128, 64, 192, 7 , 3, 20, 1, 0, 0}, {0x17, HDMI_DVI} }, | 178 | false, }, |
| 103 | { {1280, 800, 83500, 128, 72, 200, 6 , 3, 22, 1, 0, 0}, {0x1C, HDMI_DVI} }, | 179 | { 4, HDMI_DVI }, |
| 104 | { {1360, 768, 85500, 112, 64, 256, 6 , 3, 18, 1, 1, 0}, {0x27, HDMI_DVI} }, | 180 | }, |
| 105 | { {1280, 960, 108000, 112, 96, 312, 3 , 1, 36, 1, 1, 0}, {0x20, HDMI_DVI} }, | 181 | { |
| 106 | { {1280, 1024, 108000, 112, 48, 248, 3 , 1, 38, 1, 1, 0}, {0x23, HDMI_DVI} }, | 182 | { 800, 600, 40000, 128, 40, 88, 4, 1, 23, |
| 107 | { {1024, 768, 65000, 136, 24, 160, 6, 3, 29, 0, 0, 0}, {0x10, HDMI_DVI} }, | 183 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 108 | { {1400, 1050, 121750, 144, 88, 232, 4, 3, 32, 1, 0, 0}, {0x2A, HDMI_DVI} }, | 184 | false, }, |
| 109 | { {1440, 900, 106500, 152, 80, 232, 6, 3, 25, 1, 0, 0}, {0x2F, HDMI_DVI} }, | 185 | { 9, HDMI_DVI }, |
| 110 | { {1680, 1050, 146250, 176 , 104, 280, 6, 3, 30, 1, 0, 0}, {0x3A, HDMI_DVI} }, | 186 | }, |
| 111 | { {1366, 768, 85500, 143, 70, 213, 3, 3, 24, 1, 1, 0}, {0x51, HDMI_DVI} }, | 187 | { |
| 112 | { {1920, 1080, 148500, 44, 148, 80, 5, 4, 36, 1, 1, 0}, {0x52, HDMI_DVI} }, | 188 | { 848, 480, 33750, 112, 16, 112, 8, 6, 23, |
| 113 | { {1280, 768, 68250, 32, 48, 80, 7, 3, 12, 0, 1, 0}, {0x16, HDMI_DVI} }, | 189 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 114 | { {1400, 1050, 101000, 32, 48, 80, 4, 3, 23, 0, 1, 0}, {0x29, HDMI_DVI} }, | 190 | false, }, |
| 115 | { {1680, 1050, 119000, 32, 48, 80, 6, 3, 21, 0, 1, 0}, {0x39, HDMI_DVI} }, | 191 | { 0xE, HDMI_DVI }, |
| 116 | { {1280, 800, 79500, 32, 48, 80, 6, 3, 14, 0, 1, 0}, {0x1B, HDMI_DVI} }, | 192 | }, |
| 117 | { {1280, 720, 74250, 40, 110, 220, 5, 5, 20, 1, 1, 0}, {0x55, HDMI_DVI} } | 193 | { |
| 194 | { 1280, 768, 79500, 128, 64, 192, 7, 3, 20, | ||
| 195 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 196 | false, }, | ||
| 197 | { 0x17, HDMI_DVI }, | ||
| 198 | }, | ||
| 199 | { | ||
| 200 | { 1280, 800, 83500, 128, 72, 200, 6, 3, 22, | ||
| 201 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 202 | false, }, | ||
| 203 | { 0x1C, HDMI_DVI }, | ||
| 204 | }, | ||
| 205 | { | ||
| 206 | { 1360, 768, 85500, 112, 64, 256, 6, 3, 18, | ||
| 207 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 208 | false, }, | ||
| 209 | { 0x27, HDMI_DVI }, | ||
| 210 | }, | ||
| 211 | { | ||
| 212 | { 1280, 960, 108000, 112, 96, 312, 3, 1, 36, | ||
| 213 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 214 | false, }, | ||
| 215 | { 0x20, HDMI_DVI }, | ||
| 216 | }, | ||
| 217 | { | ||
| 218 | { 1280, 1024, 108000, 112, 48, 248, 3, 1, 38, | ||
| 219 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 220 | false, }, | ||
| 221 | { 0x23, HDMI_DVI }, | ||
| 222 | }, | ||
| 223 | { | ||
| 224 | { 1024, 768, 65000, 136, 24, 160, 6, 3, 29, | ||
| 225 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 226 | false, }, | ||
| 227 | { 0x10, HDMI_DVI }, | ||
| 228 | }, | ||
| 229 | { | ||
| 230 | { 1400, 1050, 121750, 144, 88, 232, 4, 3, 32, | ||
| 231 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 232 | false, }, | ||
| 233 | { 0x2A, HDMI_DVI }, | ||
| 234 | }, | ||
| 235 | { | ||
| 236 | { 1440, 900, 106500, 152, 80, 232, 6, 3, 25, | ||
| 237 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 238 | false, }, | ||
| 239 | { 0x2F, HDMI_DVI }, | ||
| 240 | }, | ||
| 241 | { | ||
| 242 | { 1680, 1050, 146250, 176 , 104, 280, 6, 3, 30, | ||
| 243 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | ||
| 244 | false, }, | ||
| 245 | { 0x3A, HDMI_DVI }, | ||
| 246 | }, | ||
| 247 | { | ||
| 248 | { 1366, 768, 85500, 143, 70, 213, 3, 3, 24, | ||
| 249 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 250 | false, }, | ||
| 251 | { 0x51, HDMI_DVI }, | ||
| 252 | }, | ||
| 253 | { | ||
| 254 | { 1920, 1080, 148500, 44, 148, 80, 5, 4, 36, | ||
| 255 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 256 | false, }, | ||
| 257 | { 0x52, HDMI_DVI }, | ||
| 258 | }, | ||
| 259 | { | ||
| 260 | { 1280, 768, 68250, 32, 48, 80, 7, 3, 12, | ||
| 261 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 262 | false, }, | ||
| 263 | { 0x16, HDMI_DVI }, | ||
| 264 | }, | ||
| 265 | { | ||
| 266 | { 1400, 1050, 101000, 32, 48, 80, 4, 3, 23, | ||
| 267 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 268 | false, }, | ||
| 269 | { 0x29, HDMI_DVI }, | ||
| 270 | }, | ||
| 271 | { | ||
| 272 | { 1680, 1050, 119000, 32, 48, 80, 6, 3, 21, | ||
| 273 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 274 | false, }, | ||
| 275 | { 0x39, HDMI_DVI }, | ||
| 276 | }, | ||
| 277 | { | ||
| 278 | { 1280, 800, 79500, 32, 48, 80, 6, 3, 14, | ||
| 279 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 280 | false, }, | ||
| 281 | { 0x1B, HDMI_DVI }, | ||
| 282 | }, | ||
| 283 | { | ||
| 284 | { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, | ||
| 285 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | ||
| 286 | false, }, | ||
| 287 | { 0x55, HDMI_DVI }, | ||
| 288 | }, | ||
| 118 | }; | 289 | }; |
| 119 | 290 | ||
| 120 | static int hdmi_runtime_get(void) | 291 | static int hdmi_runtime_get(void) |
| @@ -179,7 +350,7 @@ static const struct hdmi_config *hdmi_get_timings(void) | |||
| 179 | } | 350 | } |
| 180 | 351 | ||
| 181 | static bool hdmi_timings_compare(struct omap_video_timings *timing1, | 352 | static bool hdmi_timings_compare(struct omap_video_timings *timing1, |
| 182 | const struct hdmi_video_timings *timing2) | 353 | const struct omap_video_timings *timing2) |
| 183 | { | 354 | { |
| 184 | int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync; | 355 | int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync; |
| 185 | 356 | ||
diff --git a/drivers/video/omap2/dss/ti_hdmi.h b/drivers/video/omap2/dss/ti_hdmi.h index cc292b829c9d..b046c208cb97 100644 --- a/drivers/video/omap2/dss/ti_hdmi.h +++ b/drivers/video/omap2/dss/ti_hdmi.h | |||
| @@ -42,30 +42,13 @@ enum hdmi_clk_refsel { | |||
| 42 | HDMI_REFSEL_SYSCLK = 3 | 42 | HDMI_REFSEL_SYSCLK = 3 |
| 43 | }; | 43 | }; |
| 44 | 44 | ||
| 45 | /* HDMI timing structure */ | ||
| 46 | struct hdmi_video_timings { | ||
| 47 | u16 x_res; | ||
| 48 | u16 y_res; | ||
| 49 | /* Unit: KHz */ | ||
| 50 | u32 pixel_clock; | ||
| 51 | u16 hsw; | ||
| 52 | u16 hfp; | ||
| 53 | u16 hbp; | ||
| 54 | u16 vsw; | ||
| 55 | u16 vfp; | ||
| 56 | u16 vbp; | ||
| 57 | bool vsync_pol; | ||
| 58 | bool hsync_pol; | ||
| 59 | bool interlace; | ||
| 60 | }; | ||
| 61 | |||
| 62 | struct hdmi_cm { | 45 | struct hdmi_cm { |
| 63 | int code; | 46 | int code; |
| 64 | int mode; | 47 | int mode; |
| 65 | }; | 48 | }; |
| 66 | 49 | ||
| 67 | struct hdmi_config { | 50 | struct hdmi_config { |
| 68 | struct hdmi_video_timings timings; | 51 | struct omap_video_timings timings; |
| 69 | struct hdmi_cm cm; | 52 | struct hdmi_cm cm; |
| 70 | }; | 53 | }; |
| 71 | 54 | ||
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c index 49b171b1f4ae..c23b85a20cdc 100644 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c +++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | |||
| @@ -741,11 +741,15 @@ static void hdmi_wp_video_config_format(struct hdmi_ip_data *ip_data, | |||
| 741 | static void hdmi_wp_video_config_interface(struct hdmi_ip_data *ip_data) | 741 | static void hdmi_wp_video_config_interface(struct hdmi_ip_data *ip_data) |
| 742 | { | 742 | { |
| 743 | u32 r; | 743 | u32 r; |
| 744 | bool vsync_pol, hsync_pol; | ||
| 744 | pr_debug("Enter hdmi_wp_video_config_interface\n"); | 745 | pr_debug("Enter hdmi_wp_video_config_interface\n"); |
| 745 | 746 | ||
| 747 | vsync_pol = ip_data->cfg.timings.vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; | ||
| 748 | hsync_pol = ip_data->cfg.timings.hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; | ||
| 749 | |||
| 746 | r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG); | 750 | r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG); |
| 747 | r = FLD_MOD(r, ip_data->cfg.timings.vsync_pol, 7, 7); | 751 | r = FLD_MOD(r, vsync_pol, 7, 7); |
| 748 | r = FLD_MOD(r, ip_data->cfg.timings.hsync_pol, 6, 6); | 752 | r = FLD_MOD(r, hsync_pol, 6, 6); |
| 749 | r = FLD_MOD(r, ip_data->cfg.timings.interlace, 3, 3); | 753 | r = FLD_MOD(r, ip_data->cfg.timings.interlace, 3, 3); |
| 750 | r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */ | 754 | r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */ |
| 751 | hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, r); | 755 | hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, r); |
