spi: fsl-dspi: Convert to use regmap framework's endianness method.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

2 files changed, 6 insertions, 4 deletions

diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
index 5376de40f10b..cbbe16ed3874 100644
--- a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
@@ -10,7 +10,12 @@ Required properties:
 - pinctrl-names: must contain a "default" entry.
 - spi-num-chipselects : the number of the chipselect signals.
 - bus-num : the slave chip chipselect signal number.
-- big-endian : if DSPI modudle is big endian, the bool will be set in node.
+
+Optional property:
+- big-endian: If present the dspi device's registers are implemented
+  in big endian mode, otherwise in native mode(same with CPU), for more
+  detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
+
 Example:
 
 dspi0@4002c000 {
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 5021ddf03f60..ebc4d1fd76e2 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -493,9 +493,6 @@ static int dspi_probe(struct platform_device *pdev)
         }
 
         dspi_regmap_config.lock_arg = dspi;
-        dspi_regmap_config.val_format_endian =
-                of_property_read_bool(np, "big-endian")
-                        ? REGMAP_ENDIAN_BIG : REGMAP_ENDIAN_DEFAULT;
         dspi->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "dspi", base,
                                                 &dspi_regmap_config);
         if (IS_ERR(dspi->regmap)) {