diff options
author | Mark Brown <broonie@kernel.org> | 2014-12-08 07:17:10 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2014-12-08 07:17:10 -0500 |
commit | c9508d4b3a0a37157fd2fbbac8caa56d7399600b (patch) | |
tree | 3076a74b29f471143c0f97b88360da67457a94d0 | |
parent | b2776bf7149bddd1f4161f14f79520f17fc1d71d (diff) | |
parent | ee0ebe81004bd0bedf7abe8a2f3eb745da0264dc (diff) |
Merge remote-tracking branch 'spi/fix/cadence' into spi-linus
-rw-r--r-- | drivers/spi/spi-cadence.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index 7b811e38c7ad..33f0bec1a7eb 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c | |||
@@ -47,6 +47,7 @@ | |||
47 | #define CDNS_SPI_CR_CPHA_MASK 0x00000004 /* Clock Phase Control */ | 47 | #define CDNS_SPI_CR_CPHA_MASK 0x00000004 /* Clock Phase Control */ |
48 | #define CDNS_SPI_CR_CPOL_MASK 0x00000002 /* Clock Polarity Control */ | 48 | #define CDNS_SPI_CR_CPOL_MASK 0x00000002 /* Clock Polarity Control */ |
49 | #define CDNS_SPI_CR_SSCTRL_MASK 0x00003C00 /* Slave Select Mask */ | 49 | #define CDNS_SPI_CR_SSCTRL_MASK 0x00003C00 /* Slave Select Mask */ |
50 | #define CDNS_SPI_CR_PERI_SEL_MASK 0x00000200 /* Peripheral Select Decode */ | ||
50 | #define CDNS_SPI_CR_BAUD_DIV_MASK 0x00000038 /* Baud Rate Divisor Mask */ | 51 | #define CDNS_SPI_CR_BAUD_DIV_MASK 0x00000038 /* Baud Rate Divisor Mask */ |
51 | #define CDNS_SPI_CR_MSTREN_MASK 0x00000001 /* Master Enable Mask */ | 52 | #define CDNS_SPI_CR_MSTREN_MASK 0x00000001 /* Master Enable Mask */ |
52 | #define CDNS_SPI_CR_MANSTRTEN_MASK 0x00008000 /* Manual TX Enable Mask */ | 53 | #define CDNS_SPI_CR_MANSTRTEN_MASK 0x00008000 /* Manual TX Enable Mask */ |
@@ -148,6 +149,11 @@ static inline void cdns_spi_write(struct cdns_spi *xspi, u32 offset, u32 val) | |||
148 | */ | 149 | */ |
149 | static void cdns_spi_init_hw(struct cdns_spi *xspi) | 150 | static void cdns_spi_init_hw(struct cdns_spi *xspi) |
150 | { | 151 | { |
152 | u32 ctrl_reg = CDNS_SPI_CR_DEFAULT_MASK; | ||
153 | |||
154 | if (xspi->is_decoded_cs) | ||
155 | ctrl_reg |= CDNS_SPI_CR_PERI_SEL_MASK; | ||
156 | |||
151 | cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, | 157 | cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, |
152 | CDNS_SPI_ER_DISABLE_MASK); | 158 | CDNS_SPI_ER_DISABLE_MASK); |
153 | cdns_spi_write(xspi, CDNS_SPI_IDR_OFFSET, | 159 | cdns_spi_write(xspi, CDNS_SPI_IDR_OFFSET, |
@@ -160,8 +166,7 @@ static void cdns_spi_init_hw(struct cdns_spi *xspi) | |||
160 | 166 | ||
161 | cdns_spi_write(xspi, CDNS_SPI_ISR_OFFSET, | 167 | cdns_spi_write(xspi, CDNS_SPI_ISR_OFFSET, |
162 | CDNS_SPI_IXR_ALL_MASK); | 168 | CDNS_SPI_IXR_ALL_MASK); |
163 | cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, | 169 | cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, ctrl_reg); |
164 | CDNS_SPI_CR_DEFAULT_MASK); | ||
165 | cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, | 170 | cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, |
166 | CDNS_SPI_ER_ENABLE_MASK); | 171 | CDNS_SPI_ER_ENABLE_MASK); |
167 | } | 172 | } |