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authorStefan Roese <sr@denx.de>2009-04-16 17:11:54 -0400
committerGrant Likely <grant.likely@secretlab.ca>2009-04-16 17:11:54 -0400
commitc5a88dd90cf243a17c4a8c10e1ed973192ea5825 (patch)
treea49dfac872411bdd4824dfe92180f80fa8b95c57
parentefcc2da3fd148c9acb7d7cf1d9800e0649f950fc (diff)
powerpc/device-tree: Document MTD nodes with multiple "reg" tuples
Add binding for mtd nodes with multiple reg tuples. Multiple reg tuples are used when the flash region covers multiple devices of the same type, but not necessarily the same size. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
-rw-r--r--Documentation/powerpc/dts-bindings/mtd-physmap.txt19
1 files changed, 18 insertions, 1 deletions
diff --git a/Documentation/powerpc/dts-bindings/mtd-physmap.txt b/Documentation/powerpc/dts-bindings/mtd-physmap.txt
index cd474f9aef39..667c9bde8699 100644
--- a/Documentation/powerpc/dts-bindings/mtd-physmap.txt
+++ b/Documentation/powerpc/dts-bindings/mtd-physmap.txt
@@ -5,7 +5,9 @@ file systems on embedded devices.
5 5
6 - compatible : should contain the specific model of flash chip(s) 6 - compatible : should contain the specific model of flash chip(s)
7 used, if known, followed by either "cfi-flash" or "jedec-flash" 7 used, if known, followed by either "cfi-flash" or "jedec-flash"
8 - reg : Address range of the flash chip 8 - reg : Address range(s) of the flash chip(s)
9 It's possible to (optionally) define multiple "reg" tuples so that
10 non-identical NOR chips can be described in one flash node.
9 - bank-width : Width (in bytes) of the flash bank. Equal to the 11 - bank-width : Width (in bytes) of the flash bank. Equal to the
10 device width times the number of interleaved chips. 12 device width times the number of interleaved chips.
11 - device-width : (optional) Width of a single flash chip. If 13 - device-width : (optional) Width of a single flash chip. If
@@ -61,3 +63,18 @@ Example:
61 read-only; 63 read-only;
62 }; 64 };
63 }; 65 };
66
67Here an example with multiple "reg" tuples:
68
69 flash@f0000000,0 {
70 #address-cells = <1>;
71 #size-cells = <1>;
72 compatible = "intel,PC48F4400P0VB", "cfi-flash";
73 reg = <0 0x00000000 0x02000000
74 0 0x02000000 0x02000000>;
75 bank-width = <2>;
76 partition@0 {
77 label = "test-part1";
78 reg = <0 0x04000000>;
79 };
80 };