diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-10 04:42:36 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-10 13:23:02 -0400 |
commit | c4867936474183332db4c19791a65fdad6474fd5 (patch) | |
tree | 1c6c943a8186935b42e02e9adc521cc506cf4e85 | |
parent | 14667a4bde4361b7ac420d68a2e9e9b9b2df5231 (diff) |
drm/i915: properly compute dp dithering for user-created modes
We've only computed whether we need to fall back to 6bpc due to dp
link bandwidth constrains in mode_valid, but not mode_fixup. Under
various circumstances X likes to create new modes which then lack
proper 6bpc flags (if required), resulting in mode_fixup failures and
ultimately black screens.
Chris Wilson pointed out that we still get things wrong for bpp > 24,
but that should be fixed in another patch (and it'll be easier because
this patch consolidates the logic).
The likely culprit for this regression is
commit 3d794f87238f74d80e78a7611c7fbde8a54c85c2
Author: Keith Packard <keithp@keithp.com>
Date: Wed Jan 25 08:16:25 2012 -0800
drm/i915: Force explicit bpp selection for intel_dp_link_required
v2: Fix indentation and tune down the too bold claim that this should
fix the world. Both noticed by Chris Wilson.
v3: Try to really git add things.
Reported-and-tested-by: Brice Goglin <Brice.Goglin@ens-lyon.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48170
Cc: stable@kernel.org
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 49 |
1 files changed, 35 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 110552ff302c..4b637919f74f 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -219,14 +219,38 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes) | |||
219 | return (max_link_clock * max_lanes * 8) / 10; | 219 | return (max_link_clock * max_lanes * 8) / 10; |
220 | } | 220 | } |
221 | 221 | ||
222 | static bool | ||
223 | intel_dp_adjust_dithering(struct intel_dp *intel_dp, | ||
224 | struct drm_display_mode *mode, | ||
225 | struct drm_display_mode *adjusted_mode) | ||
226 | { | ||
227 | int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp)); | ||
228 | int max_lanes = intel_dp_max_lane_count(intel_dp); | ||
229 | int max_rate, mode_rate; | ||
230 | |||
231 | mode_rate = intel_dp_link_required(mode->clock, 24); | ||
232 | max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); | ||
233 | |||
234 | if (mode_rate > max_rate) { | ||
235 | mode_rate = intel_dp_link_required(mode->clock, 18); | ||
236 | if (mode_rate > max_rate) | ||
237 | return false; | ||
238 | |||
239 | if (adjusted_mode) | ||
240 | adjusted_mode->private_flags | ||
241 | |= INTEL_MODE_DP_FORCE_6BPC; | ||
242 | |||
243 | return true; | ||
244 | } | ||
245 | |||
246 | return true; | ||
247 | } | ||
248 | |||
222 | static int | 249 | static int |
223 | intel_dp_mode_valid(struct drm_connector *connector, | 250 | intel_dp_mode_valid(struct drm_connector *connector, |
224 | struct drm_display_mode *mode) | 251 | struct drm_display_mode *mode) |
225 | { | 252 | { |
226 | struct intel_dp *intel_dp = intel_attached_dp(connector); | 253 | struct intel_dp *intel_dp = intel_attached_dp(connector); |
227 | int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp)); | ||
228 | int max_lanes = intel_dp_max_lane_count(intel_dp); | ||
229 | int max_rate, mode_rate; | ||
230 | 254 | ||
231 | if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { | 255 | if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { |
232 | if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) | 256 | if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) |
@@ -236,16 +260,8 @@ intel_dp_mode_valid(struct drm_connector *connector, | |||
236 | return MODE_PANEL; | 260 | return MODE_PANEL; |
237 | } | 261 | } |
238 | 262 | ||
239 | mode_rate = intel_dp_link_required(mode->clock, 24); | 263 | if (!intel_dp_adjust_dithering(intel_dp, mode, NULL)) |
240 | max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); | 264 | return MODE_CLOCK_HIGH; |
241 | |||
242 | if (mode_rate > max_rate) { | ||
243 | mode_rate = intel_dp_link_required(mode->clock, 18); | ||
244 | if (mode_rate > max_rate) | ||
245 | return MODE_CLOCK_HIGH; | ||
246 | else | ||
247 | mode->private_flags |= INTEL_MODE_DP_FORCE_6BPC; | ||
248 | } | ||
249 | 265 | ||
250 | if (mode->clock < 10000) | 266 | if (mode->clock < 10000) |
251 | return MODE_CLOCK_LOW; | 267 | return MODE_CLOCK_LOW; |
@@ -672,7 +688,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
672 | int lane_count, clock; | 688 | int lane_count, clock; |
673 | int max_lane_count = intel_dp_max_lane_count(intel_dp); | 689 | int max_lane_count = intel_dp_max_lane_count(intel_dp); |
674 | int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; | 690 | int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; |
675 | int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; | 691 | int bpp; |
676 | static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; | 692 | static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; |
677 | 693 | ||
678 | if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { | 694 | if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { |
@@ -686,6 +702,11 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
686 | mode->clock = intel_dp->panel_fixed_mode->clock; | 702 | mode->clock = intel_dp->panel_fixed_mode->clock; |
687 | } | 703 | } |
688 | 704 | ||
705 | if (!intel_dp_adjust_dithering(intel_dp, mode, adjusted_mode)) | ||
706 | return false; | ||
707 | |||
708 | bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; | ||
709 | |||
689 | for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { | 710 | for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { |
690 | for (clock = 0; clock <= max_clock; clock++) { | 711 | for (clock = 0; clock <= max_clock; clock++) { |
691 | int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); | 712 | int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); |