diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2014-06-03 00:48:18 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2014-06-11 02:11:28 -0400 |
commit | c33ba689e54d91bac52a6f7a86d06699c9a8e7c3 (patch) | |
tree | 61afe38f8d4e694b3b2ee9e9ef055ac61ce256dd | |
parent | 3e1eb5cf7c25dee269b9873588a8beecc7a7265a (diff) |
drm/nouveau/disp/dp: make use of postcursor when its available
And at the same time, obey the spec better wrt out-of-range requests.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/disp/dport.c | 26 |
1 files changed, 18 insertions, 8 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/dport.c b/drivers/gpu/drm/nouveau/core/engine/disp/dport.c index c2bf611db593..39562d48101d 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/dport.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/dport.c | |||
@@ -130,18 +130,28 @@ dp_link_train_commit(struct dp_state *dp, bool pc) | |||
130 | 130 | ||
131 | for (i = 0; i < dp->link_nr; i++) { | 131 | for (i = 0; i < dp->link_nr; i++) { |
132 | u8 lane = (dp->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; | 132 | u8 lane = (dp->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; |
133 | u8 lpc2 = (dp->pc2stat >> (i * 2)) & 0x3; | ||
133 | u8 lpre = (lane & 0x0c) >> 2; | 134 | u8 lpre = (lane & 0x0c) >> 2; |
134 | u8 lvsw = (lane & 0x03) >> 0; | 135 | u8 lvsw = (lane & 0x03) >> 0; |
136 | u8 hivs = 3 - lpre; | ||
137 | u8 hipe = 3; | ||
138 | u8 hipc = 3; | ||
139 | |||
140 | if (lpc2 >= hipc) | ||
141 | lpc2 = hipc | DPCD_LC0F_LANE0_MAX_POST_CURSOR2_REACHED; | ||
142 | if (lpre >= hipe) { | ||
143 | lpre = hipe | DPCD_LC03_MAX_SWING_REACHED; /* yes. */ | ||
144 | lvsw = hivs = 3 - (lpre & 3); | ||
145 | } else | ||
146 | if (lvsw >= hivs) { | ||
147 | lvsw = hivs | DPCD_LC03_MAX_SWING_REACHED; | ||
148 | } | ||
135 | 149 | ||
136 | dp->conf[i] = (lpre << 3) | lvsw; | 150 | dp->conf[i] = (lpre << 3) | lvsw; |
137 | if (lvsw == 3) | 151 | dp->pc2conf[i >> 1] |= lpc2 << ((i & 1) * 4); |
138 | dp->conf[i] |= DPCD_LC03_MAX_SWING_REACHED; | 152 | |
139 | if (lpre == 3) | 153 | DBG("config lane %d %02x %02x\n", i, dp->conf[i], lpc2); |
140 | dp->conf[i] |= DPCD_LC03_MAX_PRE_EMPHASIS_REACHED; | 154 | impl->drv_ctl(outp, i, lvsw & 3, lpre & 3, lpc2 & 3); |
141 | dp->pc2conf[i >> 1] |= 4 << ((i & 1) * 4); | ||
142 | |||
143 | DBG("config lane %d %02x\n", i, dp->conf[i]); | ||
144 | impl->drv_ctl(outp, i, lvsw, lpre, 0); | ||
145 | } | 155 | } |
146 | 156 | ||
147 | ret = nv_wraux(outp->base.edid, DPCD_LC03(0), dp->conf, 4); | 157 | ret = nv_wraux(outp->base.edid, DPCD_LC03(0), dp->conf, 4); |