diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2014-03-03 01:18:55 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2014-03-26 00:08:10 -0400 |
commit | c33b1e8c63c98a400bc3ddb9e197922b64a7385e (patch) | |
tree | 35f3f81583fe743f1d508dec8537ccc5250ca13b | |
parent | 64e4886b6a33a84a3a078f0613468b8e46d1aca7 (diff) |
drm/gf100-/gr: tidy reg/ctx initval lists, mostly by giving them names
Unit names come from the Android GK20A driver.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
20 files changed, 1854 insertions, 2063 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c index 559c2466e8ad..745e909ea76a 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c | |||
@@ -22,10 +22,14 @@ | |||
22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | static struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nv108_grctx_init_icmd[] = { | 28 | * PGRAPH context register lists |
29 | ******************************************************************************/ | ||
30 | |||
31 | static const struct nvc0_graph_init | ||
32 | nv108_grctx_init_icmd_0[] = { | ||
29 | { 0x001000, 1, 0x01, 0x00000004 }, | 33 | { 0x001000, 1, 0x01, 0x00000004 }, |
30 | { 0x000039, 3, 0x01, 0x00000000 }, | 34 | { 0x000039, 3, 0x01, 0x00000000 }, |
31 | { 0x0000a9, 1, 0x01, 0x0000ffff }, | 35 | { 0x0000a9, 1, 0x01, 0x0000ffff }, |
@@ -274,839 +278,14 @@ nv108_grctx_init_icmd[] = { | |||
274 | {} | 278 | {} |
275 | }; | 279 | }; |
276 | 280 | ||
277 | static struct nvc0_graph_init | 281 | static const struct nvc0_graph_pack |
278 | nv108_grctx_init_a197[] = { | 282 | nv108_grctx_pack_icmd[] = { |
279 | { 0x000800, 1, 0x04, 0x00000000 }, | 283 | { nv108_grctx_init_icmd_0 }, |
280 | { 0x000840, 1, 0x04, 0x00000000 }, | ||
281 | { 0x000880, 1, 0x04, 0x00000000 }, | ||
282 | { 0x0008c0, 1, 0x04, 0x00000000 }, | ||
283 | { 0x000900, 1, 0x04, 0x00000000 }, | ||
284 | { 0x000940, 1, 0x04, 0x00000000 }, | ||
285 | { 0x000980, 1, 0x04, 0x00000000 }, | ||
286 | { 0x0009c0, 1, 0x04, 0x00000000 }, | ||
287 | { 0x000804, 1, 0x04, 0x00000000 }, | ||
288 | { 0x000844, 1, 0x04, 0x00000000 }, | ||
289 | { 0x000884, 1, 0x04, 0x00000000 }, | ||
290 | { 0x0008c4, 1, 0x04, 0x00000000 }, | ||
291 | { 0x000904, 1, 0x04, 0x00000000 }, | ||
292 | { 0x000944, 1, 0x04, 0x00000000 }, | ||
293 | { 0x000984, 1, 0x04, 0x00000000 }, | ||
294 | { 0x0009c4, 1, 0x04, 0x00000000 }, | ||
295 | { 0x000808, 1, 0x04, 0x00000400 }, | ||
296 | { 0x000848, 1, 0x04, 0x00000400 }, | ||
297 | { 0x000888, 1, 0x04, 0x00000400 }, | ||
298 | { 0x0008c8, 1, 0x04, 0x00000400 }, | ||
299 | { 0x000908, 1, 0x04, 0x00000400 }, | ||
300 | { 0x000948, 1, 0x04, 0x00000400 }, | ||
301 | { 0x000988, 1, 0x04, 0x00000400 }, | ||
302 | { 0x0009c8, 1, 0x04, 0x00000400 }, | ||
303 | { 0x00080c, 1, 0x04, 0x00000300 }, | ||
304 | { 0x00084c, 1, 0x04, 0x00000300 }, | ||
305 | { 0x00088c, 1, 0x04, 0x00000300 }, | ||
306 | { 0x0008cc, 1, 0x04, 0x00000300 }, | ||
307 | { 0x00090c, 1, 0x04, 0x00000300 }, | ||
308 | { 0x00094c, 1, 0x04, 0x00000300 }, | ||
309 | { 0x00098c, 1, 0x04, 0x00000300 }, | ||
310 | { 0x0009cc, 1, 0x04, 0x00000300 }, | ||
311 | { 0x000810, 1, 0x04, 0x000000cf }, | ||
312 | { 0x000850, 1, 0x04, 0x00000000 }, | ||
313 | { 0x000890, 1, 0x04, 0x00000000 }, | ||
314 | { 0x0008d0, 1, 0x04, 0x00000000 }, | ||
315 | { 0x000910, 1, 0x04, 0x00000000 }, | ||
316 | { 0x000950, 1, 0x04, 0x00000000 }, | ||
317 | { 0x000990, 1, 0x04, 0x00000000 }, | ||
318 | { 0x0009d0, 1, 0x04, 0x00000000 }, | ||
319 | { 0x000814, 1, 0x04, 0x00000040 }, | ||
320 | { 0x000854, 1, 0x04, 0x00000040 }, | ||
321 | { 0x000894, 1, 0x04, 0x00000040 }, | ||
322 | { 0x0008d4, 1, 0x04, 0x00000040 }, | ||
323 | { 0x000914, 1, 0x04, 0x00000040 }, | ||
324 | { 0x000954, 1, 0x04, 0x00000040 }, | ||
325 | { 0x000994, 1, 0x04, 0x00000040 }, | ||
326 | { 0x0009d4, 1, 0x04, 0x00000040 }, | ||
327 | { 0x000818, 1, 0x04, 0x00000001 }, | ||
328 | { 0x000858, 1, 0x04, 0x00000001 }, | ||
329 | { 0x000898, 1, 0x04, 0x00000001 }, | ||
330 | { 0x0008d8, 1, 0x04, 0x00000001 }, | ||
331 | { 0x000918, 1, 0x04, 0x00000001 }, | ||
332 | { 0x000958, 1, 0x04, 0x00000001 }, | ||
333 | { 0x000998, 1, 0x04, 0x00000001 }, | ||
334 | { 0x0009d8, 1, 0x04, 0x00000001 }, | ||
335 | { 0x00081c, 1, 0x04, 0x00000000 }, | ||
336 | { 0x00085c, 1, 0x04, 0x00000000 }, | ||
337 | { 0x00089c, 1, 0x04, 0x00000000 }, | ||
338 | { 0x0008dc, 1, 0x04, 0x00000000 }, | ||
339 | { 0x00091c, 1, 0x04, 0x00000000 }, | ||
340 | { 0x00095c, 1, 0x04, 0x00000000 }, | ||
341 | { 0x00099c, 1, 0x04, 0x00000000 }, | ||
342 | { 0x0009dc, 1, 0x04, 0x00000000 }, | ||
343 | { 0x000820, 1, 0x04, 0x00000000 }, | ||
344 | { 0x000860, 1, 0x04, 0x00000000 }, | ||
345 | { 0x0008a0, 1, 0x04, 0x00000000 }, | ||
346 | { 0x0008e0, 1, 0x04, 0x00000000 }, | ||
347 | { 0x000920, 1, 0x04, 0x00000000 }, | ||
348 | { 0x000960, 1, 0x04, 0x00000000 }, | ||
349 | { 0x0009a0, 1, 0x04, 0x00000000 }, | ||
350 | { 0x0009e0, 1, 0x04, 0x00000000 }, | ||
351 | { 0x001c00, 1, 0x04, 0x00000000 }, | ||
352 | { 0x001c10, 1, 0x04, 0x00000000 }, | ||
353 | { 0x001c20, 1, 0x04, 0x00000000 }, | ||
354 | { 0x001c30, 1, 0x04, 0x00000000 }, | ||
355 | { 0x001c40, 1, 0x04, 0x00000000 }, | ||
356 | { 0x001c50, 1, 0x04, 0x00000000 }, | ||
357 | { 0x001c60, 1, 0x04, 0x00000000 }, | ||
358 | { 0x001c70, 1, 0x04, 0x00000000 }, | ||
359 | { 0x001c80, 1, 0x04, 0x00000000 }, | ||
360 | { 0x001c90, 1, 0x04, 0x00000000 }, | ||
361 | { 0x001ca0, 1, 0x04, 0x00000000 }, | ||
362 | { 0x001cb0, 1, 0x04, 0x00000000 }, | ||
363 | { 0x001cc0, 1, 0x04, 0x00000000 }, | ||
364 | { 0x001cd0, 1, 0x04, 0x00000000 }, | ||
365 | { 0x001ce0, 1, 0x04, 0x00000000 }, | ||
366 | { 0x001cf0, 1, 0x04, 0x00000000 }, | ||
367 | { 0x001c04, 1, 0x04, 0x00000000 }, | ||
368 | { 0x001c14, 1, 0x04, 0x00000000 }, | ||
369 | { 0x001c24, 1, 0x04, 0x00000000 }, | ||
370 | { 0x001c34, 1, 0x04, 0x00000000 }, | ||
371 | { 0x001c44, 1, 0x04, 0x00000000 }, | ||
372 | { 0x001c54, 1, 0x04, 0x00000000 }, | ||
373 | { 0x001c64, 1, 0x04, 0x00000000 }, | ||
374 | { 0x001c74, 1, 0x04, 0x00000000 }, | ||
375 | { 0x001c84, 1, 0x04, 0x00000000 }, | ||
376 | { 0x001c94, 1, 0x04, 0x00000000 }, | ||
377 | { 0x001ca4, 1, 0x04, 0x00000000 }, | ||
378 | { 0x001cb4, 1, 0x04, 0x00000000 }, | ||
379 | { 0x001cc4, 1, 0x04, 0x00000000 }, | ||
380 | { 0x001cd4, 1, 0x04, 0x00000000 }, | ||
381 | { 0x001ce4, 1, 0x04, 0x00000000 }, | ||
382 | { 0x001cf4, 1, 0x04, 0x00000000 }, | ||
383 | { 0x001c08, 1, 0x04, 0x00000000 }, | ||
384 | { 0x001c18, 1, 0x04, 0x00000000 }, | ||
385 | { 0x001c28, 1, 0x04, 0x00000000 }, | ||
386 | { 0x001c38, 1, 0x04, 0x00000000 }, | ||
387 | { 0x001c48, 1, 0x04, 0x00000000 }, | ||
388 | { 0x001c58, 1, 0x04, 0x00000000 }, | ||
389 | { 0x001c68, 1, 0x04, 0x00000000 }, | ||
390 | { 0x001c78, 1, 0x04, 0x00000000 }, | ||
391 | { 0x001c88, 1, 0x04, 0x00000000 }, | ||
392 | { 0x001c98, 1, 0x04, 0x00000000 }, | ||
393 | { 0x001ca8, 1, 0x04, 0x00000000 }, | ||
394 | { 0x001cb8, 1, 0x04, 0x00000000 }, | ||
395 | { 0x001cc8, 1, 0x04, 0x00000000 }, | ||
396 | { 0x001cd8, 1, 0x04, 0x00000000 }, | ||
397 | { 0x001ce8, 1, 0x04, 0x00000000 }, | ||
398 | { 0x001cf8, 1, 0x04, 0x00000000 }, | ||
399 | { 0x001c0c, 1, 0x04, 0x00000000 }, | ||
400 | { 0x001c1c, 1, 0x04, 0x00000000 }, | ||
401 | { 0x001c2c, 1, 0x04, 0x00000000 }, | ||
402 | { 0x001c3c, 1, 0x04, 0x00000000 }, | ||
403 | { 0x001c4c, 1, 0x04, 0x00000000 }, | ||
404 | { 0x001c5c, 1, 0x04, 0x00000000 }, | ||
405 | { 0x001c6c, 1, 0x04, 0x00000000 }, | ||
406 | { 0x001c7c, 1, 0x04, 0x00000000 }, | ||
407 | { 0x001c8c, 1, 0x04, 0x00000000 }, | ||
408 | { 0x001c9c, 1, 0x04, 0x00000000 }, | ||
409 | { 0x001cac, 1, 0x04, 0x00000000 }, | ||
410 | { 0x001cbc, 1, 0x04, 0x00000000 }, | ||
411 | { 0x001ccc, 1, 0x04, 0x00000000 }, | ||
412 | { 0x001cdc, 1, 0x04, 0x00000000 }, | ||
413 | { 0x001cec, 1, 0x04, 0x00000000 }, | ||
414 | { 0x001cfc, 2, 0x04, 0x00000000 }, | ||
415 | { 0x001d10, 1, 0x04, 0x00000000 }, | ||
416 | { 0x001d20, 1, 0x04, 0x00000000 }, | ||
417 | { 0x001d30, 1, 0x04, 0x00000000 }, | ||
418 | { 0x001d40, 1, 0x04, 0x00000000 }, | ||
419 | { 0x001d50, 1, 0x04, 0x00000000 }, | ||
420 | { 0x001d60, 1, 0x04, 0x00000000 }, | ||
421 | { 0x001d70, 1, 0x04, 0x00000000 }, | ||
422 | { 0x001d80, 1, 0x04, 0x00000000 }, | ||
423 | { 0x001d90, 1, 0x04, 0x00000000 }, | ||
424 | { 0x001da0, 1, 0x04, 0x00000000 }, | ||
425 | { 0x001db0, 1, 0x04, 0x00000000 }, | ||
426 | { 0x001dc0, 1, 0x04, 0x00000000 }, | ||
427 | { 0x001dd0, 1, 0x04, 0x00000000 }, | ||
428 | { 0x001de0, 1, 0x04, 0x00000000 }, | ||
429 | { 0x001df0, 1, 0x04, 0x00000000 }, | ||
430 | { 0x001d04, 1, 0x04, 0x00000000 }, | ||
431 | { 0x001d14, 1, 0x04, 0x00000000 }, | ||
432 | { 0x001d24, 1, 0x04, 0x00000000 }, | ||
433 | { 0x001d34, 1, 0x04, 0x00000000 }, | ||
434 | { 0x001d44, 1, 0x04, 0x00000000 }, | ||
435 | { 0x001d54, 1, 0x04, 0x00000000 }, | ||
436 | { 0x001d64, 1, 0x04, 0x00000000 }, | ||
437 | { 0x001d74, 1, 0x04, 0x00000000 }, | ||
438 | { 0x001d84, 1, 0x04, 0x00000000 }, | ||
439 | { 0x001d94, 1, 0x04, 0x00000000 }, | ||
440 | { 0x001da4, 1, 0x04, 0x00000000 }, | ||
441 | { 0x001db4, 1, 0x04, 0x00000000 }, | ||
442 | { 0x001dc4, 1, 0x04, 0x00000000 }, | ||
443 | { 0x001dd4, 1, 0x04, 0x00000000 }, | ||
444 | { 0x001de4, 1, 0x04, 0x00000000 }, | ||
445 | { 0x001df4, 1, 0x04, 0x00000000 }, | ||
446 | { 0x001d08, 1, 0x04, 0x00000000 }, | ||
447 | { 0x001d18, 1, 0x04, 0x00000000 }, | ||
448 | { 0x001d28, 1, 0x04, 0x00000000 }, | ||
449 | { 0x001d38, 1, 0x04, 0x00000000 }, | ||
450 | { 0x001d48, 1, 0x04, 0x00000000 }, | ||
451 | { 0x001d58, 1, 0x04, 0x00000000 }, | ||
452 | { 0x001d68, 1, 0x04, 0x00000000 }, | ||
453 | { 0x001d78, 1, 0x04, 0x00000000 }, | ||
454 | { 0x001d88, 1, 0x04, 0x00000000 }, | ||
455 | { 0x001d98, 1, 0x04, 0x00000000 }, | ||
456 | { 0x001da8, 1, 0x04, 0x00000000 }, | ||
457 | { 0x001db8, 1, 0x04, 0x00000000 }, | ||
458 | { 0x001dc8, 1, 0x04, 0x00000000 }, | ||
459 | { 0x001dd8, 1, 0x04, 0x00000000 }, | ||
460 | { 0x001de8, 1, 0x04, 0x00000000 }, | ||
461 | { 0x001df8, 1, 0x04, 0x00000000 }, | ||
462 | { 0x001d0c, 1, 0x04, 0x00000000 }, | ||
463 | { 0x001d1c, 1, 0x04, 0x00000000 }, | ||
464 | { 0x001d2c, 1, 0x04, 0x00000000 }, | ||
465 | { 0x001d3c, 1, 0x04, 0x00000000 }, | ||
466 | { 0x001d4c, 1, 0x04, 0x00000000 }, | ||
467 | { 0x001d5c, 1, 0x04, 0x00000000 }, | ||
468 | { 0x001d6c, 1, 0x04, 0x00000000 }, | ||
469 | { 0x001d7c, 1, 0x04, 0x00000000 }, | ||
470 | { 0x001d8c, 1, 0x04, 0x00000000 }, | ||
471 | { 0x001d9c, 1, 0x04, 0x00000000 }, | ||
472 | { 0x001dac, 1, 0x04, 0x00000000 }, | ||
473 | { 0x001dbc, 1, 0x04, 0x00000000 }, | ||
474 | { 0x001dcc, 1, 0x04, 0x00000000 }, | ||
475 | { 0x001ddc, 1, 0x04, 0x00000000 }, | ||
476 | { 0x001dec, 1, 0x04, 0x00000000 }, | ||
477 | { 0x001dfc, 1, 0x04, 0x00000000 }, | ||
478 | { 0x001f00, 1, 0x04, 0x00000000 }, | ||
479 | { 0x001f08, 1, 0x04, 0x00000000 }, | ||
480 | { 0x001f10, 1, 0x04, 0x00000000 }, | ||
481 | { 0x001f18, 1, 0x04, 0x00000000 }, | ||
482 | { 0x001f20, 1, 0x04, 0x00000000 }, | ||
483 | { 0x001f28, 1, 0x04, 0x00000000 }, | ||
484 | { 0x001f30, 1, 0x04, 0x00000000 }, | ||
485 | { 0x001f38, 1, 0x04, 0x00000000 }, | ||
486 | { 0x001f40, 1, 0x04, 0x00000000 }, | ||
487 | { 0x001f48, 1, 0x04, 0x00000000 }, | ||
488 | { 0x001f50, 1, 0x04, 0x00000000 }, | ||
489 | { 0x001f58, 1, 0x04, 0x00000000 }, | ||
490 | { 0x001f60, 1, 0x04, 0x00000000 }, | ||
491 | { 0x001f68, 1, 0x04, 0x00000000 }, | ||
492 | { 0x001f70, 1, 0x04, 0x00000000 }, | ||
493 | { 0x001f78, 1, 0x04, 0x00000000 }, | ||
494 | { 0x001f04, 1, 0x04, 0x00000000 }, | ||
495 | { 0x001f0c, 1, 0x04, 0x00000000 }, | ||
496 | { 0x001f14, 1, 0x04, 0x00000000 }, | ||
497 | { 0x001f1c, 1, 0x04, 0x00000000 }, | ||
498 | { 0x001f24, 1, 0x04, 0x00000000 }, | ||
499 | { 0x001f2c, 1, 0x04, 0x00000000 }, | ||
500 | { 0x001f34, 1, 0x04, 0x00000000 }, | ||
501 | { 0x001f3c, 1, 0x04, 0x00000000 }, | ||
502 | { 0x001f44, 1, 0x04, 0x00000000 }, | ||
503 | { 0x001f4c, 1, 0x04, 0x00000000 }, | ||
504 | { 0x001f54, 1, 0x04, 0x00000000 }, | ||
505 | { 0x001f5c, 1, 0x04, 0x00000000 }, | ||
506 | { 0x001f64, 1, 0x04, 0x00000000 }, | ||
507 | { 0x001f6c, 1, 0x04, 0x00000000 }, | ||
508 | { 0x001f74, 1, 0x04, 0x00000000 }, | ||
509 | { 0x001f7c, 2, 0x04, 0x00000000 }, | ||
510 | { 0x001f88, 1, 0x04, 0x00000000 }, | ||
511 | { 0x001f90, 1, 0x04, 0x00000000 }, | ||
512 | { 0x001f98, 1, 0x04, 0x00000000 }, | ||
513 | { 0x001fa0, 1, 0x04, 0x00000000 }, | ||
514 | { 0x001fa8, 1, 0x04, 0x00000000 }, | ||
515 | { 0x001fb0, 1, 0x04, 0x00000000 }, | ||
516 | { 0x001fb8, 1, 0x04, 0x00000000 }, | ||
517 | { 0x001fc0, 1, 0x04, 0x00000000 }, | ||
518 | { 0x001fc8, 1, 0x04, 0x00000000 }, | ||
519 | { 0x001fd0, 1, 0x04, 0x00000000 }, | ||
520 | { 0x001fd8, 1, 0x04, 0x00000000 }, | ||
521 | { 0x001fe0, 1, 0x04, 0x00000000 }, | ||
522 | { 0x001fe8, 1, 0x04, 0x00000000 }, | ||
523 | { 0x001ff0, 1, 0x04, 0x00000000 }, | ||
524 | { 0x001ff8, 1, 0x04, 0x00000000 }, | ||
525 | { 0x001f84, 1, 0x04, 0x00000000 }, | ||
526 | { 0x001f8c, 1, 0x04, 0x00000000 }, | ||
527 | { 0x001f94, 1, 0x04, 0x00000000 }, | ||
528 | { 0x001f9c, 1, 0x04, 0x00000000 }, | ||
529 | { 0x001fa4, 1, 0x04, 0x00000000 }, | ||
530 | { 0x001fac, 1, 0x04, 0x00000000 }, | ||
531 | { 0x001fb4, 1, 0x04, 0x00000000 }, | ||
532 | { 0x001fbc, 1, 0x04, 0x00000000 }, | ||
533 | { 0x001fc4, 1, 0x04, 0x00000000 }, | ||
534 | { 0x001fcc, 1, 0x04, 0x00000000 }, | ||
535 | { 0x001fd4, 1, 0x04, 0x00000000 }, | ||
536 | { 0x001fdc, 1, 0x04, 0x00000000 }, | ||
537 | { 0x001fe4, 1, 0x04, 0x00000000 }, | ||
538 | { 0x001fec, 1, 0x04, 0x00000000 }, | ||
539 | { 0x001ff4, 1, 0x04, 0x00000000 }, | ||
540 | { 0x001ffc, 2, 0x04, 0x00000000 }, | ||
541 | { 0x002040, 1, 0x04, 0x00000011 }, | ||
542 | { 0x002080, 1, 0x04, 0x00000020 }, | ||
543 | { 0x0020c0, 1, 0x04, 0x00000030 }, | ||
544 | { 0x002100, 1, 0x04, 0x00000040 }, | ||
545 | { 0x002140, 1, 0x04, 0x00000051 }, | ||
546 | { 0x00200c, 1, 0x04, 0x00000001 }, | ||
547 | { 0x00204c, 1, 0x04, 0x00000001 }, | ||
548 | { 0x00208c, 1, 0x04, 0x00000001 }, | ||
549 | { 0x0020cc, 1, 0x04, 0x00000001 }, | ||
550 | { 0x00210c, 1, 0x04, 0x00000001 }, | ||
551 | { 0x00214c, 1, 0x04, 0x00000001 }, | ||
552 | { 0x002010, 1, 0x04, 0x00000000 }, | ||
553 | { 0x002050, 1, 0x04, 0x00000000 }, | ||
554 | { 0x002090, 1, 0x04, 0x00000001 }, | ||
555 | { 0x0020d0, 1, 0x04, 0x00000002 }, | ||
556 | { 0x002110, 1, 0x04, 0x00000003 }, | ||
557 | { 0x002150, 1, 0x04, 0x00000004 }, | ||
558 | { 0x000380, 1, 0x04, 0x00000000 }, | ||
559 | { 0x0003a0, 1, 0x04, 0x00000000 }, | ||
560 | { 0x0003c0, 1, 0x04, 0x00000000 }, | ||
561 | { 0x0003e0, 1, 0x04, 0x00000000 }, | ||
562 | { 0x000384, 1, 0x04, 0x00000000 }, | ||
563 | { 0x0003a4, 1, 0x04, 0x00000000 }, | ||
564 | { 0x0003c4, 1, 0x04, 0x00000000 }, | ||
565 | { 0x0003e4, 1, 0x04, 0x00000000 }, | ||
566 | { 0x000388, 1, 0x04, 0x00000000 }, | ||
567 | { 0x0003a8, 1, 0x04, 0x00000000 }, | ||
568 | { 0x0003c8, 1, 0x04, 0x00000000 }, | ||
569 | { 0x0003e8, 1, 0x04, 0x00000000 }, | ||
570 | { 0x00038c, 1, 0x04, 0x00000000 }, | ||
571 | { 0x0003ac, 1, 0x04, 0x00000000 }, | ||
572 | { 0x0003cc, 1, 0x04, 0x00000000 }, | ||
573 | { 0x0003ec, 1, 0x04, 0x00000000 }, | ||
574 | { 0x000700, 1, 0x04, 0x00000000 }, | ||
575 | { 0x000710, 1, 0x04, 0x00000000 }, | ||
576 | { 0x000720, 1, 0x04, 0x00000000 }, | ||
577 | { 0x000730, 1, 0x04, 0x00000000 }, | ||
578 | { 0x000704, 1, 0x04, 0x00000000 }, | ||
579 | { 0x000714, 1, 0x04, 0x00000000 }, | ||
580 | { 0x000724, 1, 0x04, 0x00000000 }, | ||
581 | { 0x000734, 1, 0x04, 0x00000000 }, | ||
582 | { 0x000708, 1, 0x04, 0x00000000 }, | ||
583 | { 0x000718, 1, 0x04, 0x00000000 }, | ||
584 | { 0x000728, 1, 0x04, 0x00000000 }, | ||
585 | { 0x000738, 1, 0x04, 0x00000000 }, | ||
586 | { 0x002800, 128, 0x04, 0x00000000 }, | ||
587 | { 0x000a00, 1, 0x04, 0x00000000 }, | ||
588 | { 0x000a20, 1, 0x04, 0x00000000 }, | ||
589 | { 0x000a40, 1, 0x04, 0x00000000 }, | ||
590 | { 0x000a60, 1, 0x04, 0x00000000 }, | ||
591 | { 0x000a80, 1, 0x04, 0x00000000 }, | ||
592 | { 0x000aa0, 1, 0x04, 0x00000000 }, | ||
593 | { 0x000ac0, 1, 0x04, 0x00000000 }, | ||
594 | { 0x000ae0, 1, 0x04, 0x00000000 }, | ||
595 | { 0x000b00, 1, 0x04, 0x00000000 }, | ||
596 | { 0x000b20, 1, 0x04, 0x00000000 }, | ||
597 | { 0x000b40, 1, 0x04, 0x00000000 }, | ||
598 | { 0x000b60, 1, 0x04, 0x00000000 }, | ||
599 | { 0x000b80, 1, 0x04, 0x00000000 }, | ||
600 | { 0x000ba0, 1, 0x04, 0x00000000 }, | ||
601 | { 0x000bc0, 1, 0x04, 0x00000000 }, | ||
602 | { 0x000be0, 1, 0x04, 0x00000000 }, | ||
603 | { 0x000a04, 1, 0x04, 0x00000000 }, | ||
604 | { 0x000a24, 1, 0x04, 0x00000000 }, | ||
605 | { 0x000a44, 1, 0x04, 0x00000000 }, | ||
606 | { 0x000a64, 1, 0x04, 0x00000000 }, | ||
607 | { 0x000a84, 1, 0x04, 0x00000000 }, | ||
608 | { 0x000aa4, 1, 0x04, 0x00000000 }, | ||
609 | { 0x000ac4, 1, 0x04, 0x00000000 }, | ||
610 | { 0x000ae4, 1, 0x04, 0x00000000 }, | ||
611 | { 0x000b04, 1, 0x04, 0x00000000 }, | ||
612 | { 0x000b24, 1, 0x04, 0x00000000 }, | ||
613 | { 0x000b44, 1, 0x04, 0x00000000 }, | ||
614 | { 0x000b64, 1, 0x04, 0x00000000 }, | ||
615 | { 0x000b84, 1, 0x04, 0x00000000 }, | ||
616 | { 0x000ba4, 1, 0x04, 0x00000000 }, | ||
617 | { 0x000bc4, 1, 0x04, 0x00000000 }, | ||
618 | { 0x000be4, 1, 0x04, 0x00000000 }, | ||
619 | { 0x000a08, 1, 0x04, 0x00000000 }, | ||
620 | { 0x000a28, 1, 0x04, 0x00000000 }, | ||
621 | { 0x000a48, 1, 0x04, 0x00000000 }, | ||
622 | { 0x000a68, 1, 0x04, 0x00000000 }, | ||
623 | { 0x000a88, 1, 0x04, 0x00000000 }, | ||
624 | { 0x000aa8, 1, 0x04, 0x00000000 }, | ||
625 | { 0x000ac8, 1, 0x04, 0x00000000 }, | ||
626 | { 0x000ae8, 1, 0x04, 0x00000000 }, | ||
627 | { 0x000b08, 1, 0x04, 0x00000000 }, | ||
628 | { 0x000b28, 1, 0x04, 0x00000000 }, | ||
629 | { 0x000b48, 1, 0x04, 0x00000000 }, | ||
630 | { 0x000b68, 1, 0x04, 0x00000000 }, | ||
631 | { 0x000b88, 1, 0x04, 0x00000000 }, | ||
632 | { 0x000ba8, 1, 0x04, 0x00000000 }, | ||
633 | { 0x000bc8, 1, 0x04, 0x00000000 }, | ||
634 | { 0x000be8, 1, 0x04, 0x00000000 }, | ||
635 | { 0x000a0c, 1, 0x04, 0x00000000 }, | ||
636 | { 0x000a2c, 1, 0x04, 0x00000000 }, | ||
637 | { 0x000a4c, 1, 0x04, 0x00000000 }, | ||
638 | { 0x000a6c, 1, 0x04, 0x00000000 }, | ||
639 | { 0x000a8c, 1, 0x04, 0x00000000 }, | ||
640 | { 0x000aac, 1, 0x04, 0x00000000 }, | ||
641 | { 0x000acc, 1, 0x04, 0x00000000 }, | ||
642 | { 0x000aec, 1, 0x04, 0x00000000 }, | ||
643 | { 0x000b0c, 1, 0x04, 0x00000000 }, | ||
644 | { 0x000b2c, 1, 0x04, 0x00000000 }, | ||
645 | { 0x000b4c, 1, 0x04, 0x00000000 }, | ||
646 | { 0x000b6c, 1, 0x04, 0x00000000 }, | ||
647 | { 0x000b8c, 1, 0x04, 0x00000000 }, | ||
648 | { 0x000bac, 1, 0x04, 0x00000000 }, | ||
649 | { 0x000bcc, 1, 0x04, 0x00000000 }, | ||
650 | { 0x000bec, 1, 0x04, 0x00000000 }, | ||
651 | { 0x000a10, 1, 0x04, 0x00000000 }, | ||
652 | { 0x000a30, 1, 0x04, 0x00000000 }, | ||
653 | { 0x000a50, 1, 0x04, 0x00000000 }, | ||
654 | { 0x000a70, 1, 0x04, 0x00000000 }, | ||
655 | { 0x000a90, 1, 0x04, 0x00000000 }, | ||
656 | { 0x000ab0, 1, 0x04, 0x00000000 }, | ||
657 | { 0x000ad0, 1, 0x04, 0x00000000 }, | ||
658 | { 0x000af0, 1, 0x04, 0x00000000 }, | ||
659 | { 0x000b10, 1, 0x04, 0x00000000 }, | ||
660 | { 0x000b30, 1, 0x04, 0x00000000 }, | ||
661 | { 0x000b50, 1, 0x04, 0x00000000 }, | ||
662 | { 0x000b70, 1, 0x04, 0x00000000 }, | ||
663 | { 0x000b90, 1, 0x04, 0x00000000 }, | ||
664 | { 0x000bb0, 1, 0x04, 0x00000000 }, | ||
665 | { 0x000bd0, 1, 0x04, 0x00000000 }, | ||
666 | { 0x000bf0, 1, 0x04, 0x00000000 }, | ||
667 | { 0x000a14, 1, 0x04, 0x00000000 }, | ||
668 | { 0x000a34, 1, 0x04, 0x00000000 }, | ||
669 | { 0x000a54, 1, 0x04, 0x00000000 }, | ||
670 | { 0x000a74, 1, 0x04, 0x00000000 }, | ||
671 | { 0x000a94, 1, 0x04, 0x00000000 }, | ||
672 | { 0x000ab4, 1, 0x04, 0x00000000 }, | ||
673 | { 0x000ad4, 1, 0x04, 0x00000000 }, | ||
674 | { 0x000af4, 1, 0x04, 0x00000000 }, | ||
675 | { 0x000b14, 1, 0x04, 0x00000000 }, | ||
676 | { 0x000b34, 1, 0x04, 0x00000000 }, | ||
677 | { 0x000b54, 1, 0x04, 0x00000000 }, | ||
678 | { 0x000b74, 1, 0x04, 0x00000000 }, | ||
679 | { 0x000b94, 1, 0x04, 0x00000000 }, | ||
680 | { 0x000bb4, 1, 0x04, 0x00000000 }, | ||
681 | { 0x000bd4, 1, 0x04, 0x00000000 }, | ||
682 | { 0x000bf4, 1, 0x04, 0x00000000 }, | ||
683 | { 0x000c00, 1, 0x04, 0x00000000 }, | ||
684 | { 0x000c10, 1, 0x04, 0x00000000 }, | ||
685 | { 0x000c20, 1, 0x04, 0x00000000 }, | ||
686 | { 0x000c30, 1, 0x04, 0x00000000 }, | ||
687 | { 0x000c40, 1, 0x04, 0x00000000 }, | ||
688 | { 0x000c50, 1, 0x04, 0x00000000 }, | ||
689 | { 0x000c60, 1, 0x04, 0x00000000 }, | ||
690 | { 0x000c70, 1, 0x04, 0x00000000 }, | ||
691 | { 0x000c80, 1, 0x04, 0x00000000 }, | ||
692 | { 0x000c90, 1, 0x04, 0x00000000 }, | ||
693 | { 0x000ca0, 1, 0x04, 0x00000000 }, | ||
694 | { 0x000cb0, 1, 0x04, 0x00000000 }, | ||
695 | { 0x000cc0, 1, 0x04, 0x00000000 }, | ||
696 | { 0x000cd0, 1, 0x04, 0x00000000 }, | ||
697 | { 0x000ce0, 1, 0x04, 0x00000000 }, | ||
698 | { 0x000cf0, 1, 0x04, 0x00000000 }, | ||
699 | { 0x000c04, 1, 0x04, 0x00000000 }, | ||
700 | { 0x000c14, 1, 0x04, 0x00000000 }, | ||
701 | { 0x000c24, 1, 0x04, 0x00000000 }, | ||
702 | { 0x000c34, 1, 0x04, 0x00000000 }, | ||
703 | { 0x000c44, 1, 0x04, 0x00000000 }, | ||
704 | { 0x000c54, 1, 0x04, 0x00000000 }, | ||
705 | { 0x000c64, 1, 0x04, 0x00000000 }, | ||
706 | { 0x000c74, 1, 0x04, 0x00000000 }, | ||
707 | { 0x000c84, 1, 0x04, 0x00000000 }, | ||
708 | { 0x000c94, 1, 0x04, 0x00000000 }, | ||
709 | { 0x000ca4, 1, 0x04, 0x00000000 }, | ||
710 | { 0x000cb4, 1, 0x04, 0x00000000 }, | ||
711 | { 0x000cc4, 1, 0x04, 0x00000000 }, | ||
712 | { 0x000cd4, 1, 0x04, 0x00000000 }, | ||
713 | { 0x000ce4, 1, 0x04, 0x00000000 }, | ||
714 | { 0x000cf4, 1, 0x04, 0x00000000 }, | ||
715 | { 0x000c08, 1, 0x04, 0x00000000 }, | ||
716 | { 0x000c18, 1, 0x04, 0x00000000 }, | ||
717 | { 0x000c28, 1, 0x04, 0x00000000 }, | ||
718 | { 0x000c38, 1, 0x04, 0x00000000 }, | ||
719 | { 0x000c48, 1, 0x04, 0x00000000 }, | ||
720 | { 0x000c58, 1, 0x04, 0x00000000 }, | ||
721 | { 0x000c68, 1, 0x04, 0x00000000 }, | ||
722 | { 0x000c78, 1, 0x04, 0x00000000 }, | ||
723 | { 0x000c88, 1, 0x04, 0x00000000 }, | ||
724 | { 0x000c98, 1, 0x04, 0x00000000 }, | ||
725 | { 0x000ca8, 1, 0x04, 0x00000000 }, | ||
726 | { 0x000cb8, 1, 0x04, 0x00000000 }, | ||
727 | { 0x000cc8, 1, 0x04, 0x00000000 }, | ||
728 | { 0x000cd8, 1, 0x04, 0x00000000 }, | ||
729 | { 0x000ce8, 1, 0x04, 0x00000000 }, | ||
730 | { 0x000cf8, 1, 0x04, 0x00000000 }, | ||
731 | { 0x000c0c, 1, 0x04, 0x3f800000 }, | ||
732 | { 0x000c1c, 1, 0x04, 0x3f800000 }, | ||
733 | { 0x000c2c, 1, 0x04, 0x3f800000 }, | ||
734 | { 0x000c3c, 1, 0x04, 0x3f800000 }, | ||
735 | { 0x000c4c, 1, 0x04, 0x3f800000 }, | ||
736 | { 0x000c5c, 1, 0x04, 0x3f800000 }, | ||
737 | { 0x000c6c, 1, 0x04, 0x3f800000 }, | ||
738 | { 0x000c7c, 1, 0x04, 0x3f800000 }, | ||
739 | { 0x000c8c, 1, 0x04, 0x3f800000 }, | ||
740 | { 0x000c9c, 1, 0x04, 0x3f800000 }, | ||
741 | { 0x000cac, 1, 0x04, 0x3f800000 }, | ||
742 | { 0x000cbc, 1, 0x04, 0x3f800000 }, | ||
743 | { 0x000ccc, 1, 0x04, 0x3f800000 }, | ||
744 | { 0x000cdc, 1, 0x04, 0x3f800000 }, | ||
745 | { 0x000cec, 1, 0x04, 0x3f800000 }, | ||
746 | { 0x000cfc, 1, 0x04, 0x3f800000 }, | ||
747 | { 0x000d00, 1, 0x04, 0xffff0000 }, | ||
748 | { 0x000d08, 1, 0x04, 0xffff0000 }, | ||
749 | { 0x000d10, 1, 0x04, 0xffff0000 }, | ||
750 | { 0x000d18, 1, 0x04, 0xffff0000 }, | ||
751 | { 0x000d20, 1, 0x04, 0xffff0000 }, | ||
752 | { 0x000d28, 1, 0x04, 0xffff0000 }, | ||
753 | { 0x000d30, 1, 0x04, 0xffff0000 }, | ||
754 | { 0x000d38, 1, 0x04, 0xffff0000 }, | ||
755 | { 0x000d04, 1, 0x04, 0xffff0000 }, | ||
756 | { 0x000d0c, 1, 0x04, 0xffff0000 }, | ||
757 | { 0x000d14, 1, 0x04, 0xffff0000 }, | ||
758 | { 0x000d1c, 1, 0x04, 0xffff0000 }, | ||
759 | { 0x000d24, 1, 0x04, 0xffff0000 }, | ||
760 | { 0x000d2c, 1, 0x04, 0xffff0000 }, | ||
761 | { 0x000d34, 1, 0x04, 0xffff0000 }, | ||
762 | { 0x000d3c, 1, 0x04, 0xffff0000 }, | ||
763 | { 0x000e00, 1, 0x04, 0x00000000 }, | ||
764 | { 0x000e10, 1, 0x04, 0x00000000 }, | ||
765 | { 0x000e20, 1, 0x04, 0x00000000 }, | ||
766 | { 0x000e30, 1, 0x04, 0x00000000 }, | ||
767 | { 0x000e40, 1, 0x04, 0x00000000 }, | ||
768 | { 0x000e50, 1, 0x04, 0x00000000 }, | ||
769 | { 0x000e60, 1, 0x04, 0x00000000 }, | ||
770 | { 0x000e70, 1, 0x04, 0x00000000 }, | ||
771 | { 0x000e80, 1, 0x04, 0x00000000 }, | ||
772 | { 0x000e90, 1, 0x04, 0x00000000 }, | ||
773 | { 0x000ea0, 1, 0x04, 0x00000000 }, | ||
774 | { 0x000eb0, 1, 0x04, 0x00000000 }, | ||
775 | { 0x000ec0, 1, 0x04, 0x00000000 }, | ||
776 | { 0x000ed0, 1, 0x04, 0x00000000 }, | ||
777 | { 0x000ee0, 1, 0x04, 0x00000000 }, | ||
778 | { 0x000ef0, 1, 0x04, 0x00000000 }, | ||
779 | { 0x000e04, 1, 0x04, 0xffff0000 }, | ||
780 | { 0x000e14, 1, 0x04, 0xffff0000 }, | ||
781 | { 0x000e24, 1, 0x04, 0xffff0000 }, | ||
782 | { 0x000e34, 1, 0x04, 0xffff0000 }, | ||
783 | { 0x000e44, 1, 0x04, 0xffff0000 }, | ||
784 | { 0x000e54, 1, 0x04, 0xffff0000 }, | ||
785 | { 0x000e64, 1, 0x04, 0xffff0000 }, | ||
786 | { 0x000e74, 1, 0x04, 0xffff0000 }, | ||
787 | { 0x000e84, 1, 0x04, 0xffff0000 }, | ||
788 | { 0x000e94, 1, 0x04, 0xffff0000 }, | ||
789 | { 0x000ea4, 1, 0x04, 0xffff0000 }, | ||
790 | { 0x000eb4, 1, 0x04, 0xffff0000 }, | ||
791 | { 0x000ec4, 1, 0x04, 0xffff0000 }, | ||
792 | { 0x000ed4, 1, 0x04, 0xffff0000 }, | ||
793 | { 0x000ee4, 1, 0x04, 0xffff0000 }, | ||
794 | { 0x000ef4, 1, 0x04, 0xffff0000 }, | ||
795 | { 0x000e08, 1, 0x04, 0xffff0000 }, | ||
796 | { 0x000e18, 1, 0x04, 0xffff0000 }, | ||
797 | { 0x000e28, 1, 0x04, 0xffff0000 }, | ||
798 | { 0x000e38, 1, 0x04, 0xffff0000 }, | ||
799 | { 0x000e48, 1, 0x04, 0xffff0000 }, | ||
800 | { 0x000e58, 1, 0x04, 0xffff0000 }, | ||
801 | { 0x000e68, 1, 0x04, 0xffff0000 }, | ||
802 | { 0x000e78, 1, 0x04, 0xffff0000 }, | ||
803 | { 0x000e88, 1, 0x04, 0xffff0000 }, | ||
804 | { 0x000e98, 1, 0x04, 0xffff0000 }, | ||
805 | { 0x000ea8, 1, 0x04, 0xffff0000 }, | ||
806 | { 0x000eb8, 1, 0x04, 0xffff0000 }, | ||
807 | { 0x000ec8, 1, 0x04, 0xffff0000 }, | ||
808 | { 0x000ed8, 1, 0x04, 0xffff0000 }, | ||
809 | { 0x000ee8, 1, 0x04, 0xffff0000 }, | ||
810 | { 0x000ef8, 1, 0x04, 0xffff0000 }, | ||
811 | { 0x000d40, 1, 0x04, 0x00000000 }, | ||
812 | { 0x000d48, 1, 0x04, 0x00000000 }, | ||
813 | { 0x000d50, 1, 0x04, 0x00000000 }, | ||
814 | { 0x000d58, 1, 0x04, 0x00000000 }, | ||
815 | { 0x000d44, 1, 0x04, 0x00000000 }, | ||
816 | { 0x000d4c, 1, 0x04, 0x00000000 }, | ||
817 | { 0x000d54, 1, 0x04, 0x00000000 }, | ||
818 | { 0x000d5c, 1, 0x04, 0x00000000 }, | ||
819 | { 0x001e00, 1, 0x04, 0x00000001 }, | ||
820 | { 0x001e20, 1, 0x04, 0x00000001 }, | ||
821 | { 0x001e40, 1, 0x04, 0x00000001 }, | ||
822 | { 0x001e60, 1, 0x04, 0x00000001 }, | ||
823 | { 0x001e80, 1, 0x04, 0x00000001 }, | ||
824 | { 0x001ea0, 1, 0x04, 0x00000001 }, | ||
825 | { 0x001ec0, 1, 0x04, 0x00000001 }, | ||
826 | { 0x001ee0, 1, 0x04, 0x00000001 }, | ||
827 | { 0x001e04, 1, 0x04, 0x00000001 }, | ||
828 | { 0x001e24, 1, 0x04, 0x00000001 }, | ||
829 | { 0x001e44, 1, 0x04, 0x00000001 }, | ||
830 | { 0x001e64, 1, 0x04, 0x00000001 }, | ||
831 | { 0x001e84, 1, 0x04, 0x00000001 }, | ||
832 | { 0x001ea4, 1, 0x04, 0x00000001 }, | ||
833 | { 0x001ec4, 1, 0x04, 0x00000001 }, | ||
834 | { 0x001ee4, 1, 0x04, 0x00000001 }, | ||
835 | { 0x001e08, 1, 0x04, 0x00000002 }, | ||
836 | { 0x001e28, 1, 0x04, 0x00000002 }, | ||
837 | { 0x001e48, 1, 0x04, 0x00000002 }, | ||
838 | { 0x001e68, 1, 0x04, 0x00000002 }, | ||
839 | { 0x001e88, 1, 0x04, 0x00000002 }, | ||
840 | { 0x001ea8, 1, 0x04, 0x00000002 }, | ||
841 | { 0x001ec8, 1, 0x04, 0x00000002 }, | ||
842 | { 0x001ee8, 1, 0x04, 0x00000002 }, | ||
843 | { 0x001e0c, 1, 0x04, 0x00000001 }, | ||
844 | { 0x001e2c, 1, 0x04, 0x00000001 }, | ||
845 | { 0x001e4c, 1, 0x04, 0x00000001 }, | ||
846 | { 0x001e6c, 1, 0x04, 0x00000001 }, | ||
847 | { 0x001e8c, 1, 0x04, 0x00000001 }, | ||
848 | { 0x001eac, 1, 0x04, 0x00000001 }, | ||
849 | { 0x001ecc, 1, 0x04, 0x00000001 }, | ||
850 | { 0x001eec, 1, 0x04, 0x00000001 }, | ||
851 | { 0x001e10, 1, 0x04, 0x00000001 }, | ||
852 | { 0x001e30, 1, 0x04, 0x00000001 }, | ||
853 | { 0x001e50, 1, 0x04, 0x00000001 }, | ||
854 | { 0x001e70, 1, 0x04, 0x00000001 }, | ||
855 | { 0x001e90, 1, 0x04, 0x00000001 }, | ||
856 | { 0x001eb0, 1, 0x04, 0x00000001 }, | ||
857 | { 0x001ed0, 1, 0x04, 0x00000001 }, | ||
858 | { 0x001ef0, 1, 0x04, 0x00000001 }, | ||
859 | { 0x001e14, 1, 0x04, 0x00000002 }, | ||
860 | { 0x001e34, 1, 0x04, 0x00000002 }, | ||
861 | { 0x001e54, 1, 0x04, 0x00000002 }, | ||
862 | { 0x001e74, 1, 0x04, 0x00000002 }, | ||
863 | { 0x001e94, 1, 0x04, 0x00000002 }, | ||
864 | { 0x001eb4, 1, 0x04, 0x00000002 }, | ||
865 | { 0x001ed4, 1, 0x04, 0x00000002 }, | ||
866 | { 0x001ef4, 1, 0x04, 0x00000002 }, | ||
867 | { 0x001e18, 1, 0x04, 0x00000001 }, | ||
868 | { 0x001e38, 1, 0x04, 0x00000001 }, | ||
869 | { 0x001e58, 1, 0x04, 0x00000001 }, | ||
870 | { 0x001e78, 1, 0x04, 0x00000001 }, | ||
871 | { 0x001e98, 1, 0x04, 0x00000001 }, | ||
872 | { 0x001eb8, 1, 0x04, 0x00000001 }, | ||
873 | { 0x001ed8, 1, 0x04, 0x00000001 }, | ||
874 | { 0x001ef8, 1, 0x04, 0x00000001 }, | ||
875 | { 0x003400, 128, 0x04, 0x00000000 }, | ||
876 | { 0x00030c, 1, 0x04, 0x00000001 }, | ||
877 | { 0x001944, 1, 0x04, 0x00000000 }, | ||
878 | { 0x001514, 1, 0x04, 0x00000000 }, | ||
879 | { 0x000d68, 1, 0x04, 0x0000ffff }, | ||
880 | { 0x00121c, 1, 0x04, 0x0fac6881 }, | ||
881 | { 0x000fac, 1, 0x04, 0x00000001 }, | ||
882 | { 0x001538, 1, 0x04, 0x00000001 }, | ||
883 | { 0x000fe0, 2, 0x04, 0x00000000 }, | ||
884 | { 0x000fe8, 1, 0x04, 0x00000014 }, | ||
885 | { 0x000fec, 1, 0x04, 0x00000040 }, | ||
886 | { 0x000ff0, 1, 0x04, 0x00000000 }, | ||
887 | { 0x00179c, 1, 0x04, 0x00000000 }, | ||
888 | { 0x001228, 1, 0x04, 0x00000400 }, | ||
889 | { 0x00122c, 1, 0x04, 0x00000300 }, | ||
890 | { 0x001230, 1, 0x04, 0x00010001 }, | ||
891 | { 0x0007f8, 1, 0x04, 0x00000000 }, | ||
892 | { 0x0015b4, 1, 0x04, 0x00000001 }, | ||
893 | { 0x0015cc, 1, 0x04, 0x00000000 }, | ||
894 | { 0x001534, 1, 0x04, 0x00000000 }, | ||
895 | { 0x000fb0, 1, 0x04, 0x00000000 }, | ||
896 | { 0x0015d0, 1, 0x04, 0x00000000 }, | ||
897 | { 0x00153c, 1, 0x04, 0x00000000 }, | ||
898 | { 0x0016b4, 1, 0x04, 0x00000003 }, | ||
899 | { 0x000fbc, 4, 0x04, 0x0000ffff }, | ||
900 | { 0x000df8, 2, 0x04, 0x00000000 }, | ||
901 | { 0x001948, 1, 0x04, 0x00000000 }, | ||
902 | { 0x001970, 1, 0x04, 0x00000001 }, | ||
903 | { 0x00161c, 1, 0x04, 0x000009f0 }, | ||
904 | { 0x000dcc, 1, 0x04, 0x00000010 }, | ||
905 | { 0x00163c, 1, 0x04, 0x00000000 }, | ||
906 | { 0x0015e4, 1, 0x04, 0x00000000 }, | ||
907 | { 0x001160, 32, 0x04, 0x25e00040 }, | ||
908 | { 0x001880, 32, 0x04, 0x00000000 }, | ||
909 | { 0x000f84, 2, 0x04, 0x00000000 }, | ||
910 | { 0x0017c8, 2, 0x04, 0x00000000 }, | ||
911 | { 0x0017d0, 1, 0x04, 0x000000ff }, | ||
912 | { 0x0017d4, 1, 0x04, 0xffffffff }, | ||
913 | { 0x0017d8, 1, 0x04, 0x00000002 }, | ||
914 | { 0x0017dc, 1, 0x04, 0x00000000 }, | ||
915 | { 0x0015f4, 2, 0x04, 0x00000000 }, | ||
916 | { 0x001434, 2, 0x04, 0x00000000 }, | ||
917 | { 0x000d74, 1, 0x04, 0x00000000 }, | ||
918 | { 0x000dec, 1, 0x04, 0x00000001 }, | ||
919 | { 0x0013a4, 1, 0x04, 0x00000000 }, | ||
920 | { 0x001318, 1, 0x04, 0x00000001 }, | ||
921 | { 0x001644, 1, 0x04, 0x00000000 }, | ||
922 | { 0x000748, 1, 0x04, 0x00000000 }, | ||
923 | { 0x000de8, 1, 0x04, 0x00000000 }, | ||
924 | { 0x001648, 1, 0x04, 0x00000000 }, | ||
925 | { 0x0012a4, 1, 0x04, 0x00000000 }, | ||
926 | { 0x001120, 4, 0x04, 0x00000000 }, | ||
927 | { 0x001118, 1, 0x04, 0x00000000 }, | ||
928 | { 0x00164c, 1, 0x04, 0x00000000 }, | ||
929 | { 0x001658, 1, 0x04, 0x00000000 }, | ||
930 | { 0x001910, 1, 0x04, 0x00000290 }, | ||
931 | { 0x001518, 1, 0x04, 0x00000000 }, | ||
932 | { 0x00165c, 1, 0x04, 0x00000001 }, | ||
933 | { 0x001520, 1, 0x04, 0x00000000 }, | ||
934 | { 0x001604, 1, 0x04, 0x00000000 }, | ||
935 | { 0x001570, 1, 0x04, 0x00000000 }, | ||
936 | { 0x0013b0, 2, 0x04, 0x3f800000 }, | ||
937 | { 0x00020c, 1, 0x04, 0x00000000 }, | ||
938 | { 0x001670, 1, 0x04, 0x30201000 }, | ||
939 | { 0x001674, 1, 0x04, 0x70605040 }, | ||
940 | { 0x001678, 1, 0x04, 0xb8a89888 }, | ||
941 | { 0x00167c, 1, 0x04, 0xf8e8d8c8 }, | ||
942 | { 0x00166c, 1, 0x04, 0x00000000 }, | ||
943 | { 0x001680, 1, 0x04, 0x00ffff00 }, | ||
944 | { 0x0012d0, 1, 0x04, 0x00000003 }, | ||
945 | { 0x0012d4, 1, 0x04, 0x00000002 }, | ||
946 | { 0x001684, 2, 0x04, 0x00000000 }, | ||
947 | { 0x000dac, 2, 0x04, 0x00001b02 }, | ||
948 | { 0x000db4, 1, 0x04, 0x00000000 }, | ||
949 | { 0x00168c, 1, 0x04, 0x00000000 }, | ||
950 | { 0x0015bc, 1, 0x04, 0x00000000 }, | ||
951 | { 0x00156c, 1, 0x04, 0x00000000 }, | ||
952 | { 0x00187c, 1, 0x04, 0x00000000 }, | ||
953 | { 0x001110, 1, 0x04, 0x00000001 }, | ||
954 | { 0x000dc0, 3, 0x04, 0x00000000 }, | ||
955 | { 0x001234, 1, 0x04, 0x00000000 }, | ||
956 | { 0x001690, 1, 0x04, 0x00000000 }, | ||
957 | { 0x0012ac, 1, 0x04, 0x00000001 }, | ||
958 | { 0x0002c4, 1, 0x04, 0x00000000 }, | ||
959 | { 0x000790, 5, 0x04, 0x00000000 }, | ||
960 | { 0x00077c, 1, 0x04, 0x00000000 }, | ||
961 | { 0x001000, 1, 0x04, 0x00000010 }, | ||
962 | { 0x0010fc, 1, 0x04, 0x00000000 }, | ||
963 | { 0x001290, 1, 0x04, 0x00000000 }, | ||
964 | { 0x000218, 1, 0x04, 0x00000010 }, | ||
965 | { 0x0012d8, 1, 0x04, 0x00000000 }, | ||
966 | { 0x0012dc, 1, 0x04, 0x00000010 }, | ||
967 | { 0x000d94, 1, 0x04, 0x00000001 }, | ||
968 | { 0x00155c, 2, 0x04, 0x00000000 }, | ||
969 | { 0x001564, 1, 0x04, 0x00000fff }, | ||
970 | { 0x001574, 2, 0x04, 0x00000000 }, | ||
971 | { 0x00157c, 1, 0x04, 0x000fffff }, | ||
972 | { 0x001354, 1, 0x04, 0x00000000 }, | ||
973 | { 0x001610, 1, 0x04, 0x00000012 }, | ||
974 | { 0x001608, 2, 0x04, 0x00000000 }, | ||
975 | { 0x00260c, 1, 0x04, 0x00000000 }, | ||
976 | { 0x0007ac, 1, 0x04, 0x00000000 }, | ||
977 | { 0x00162c, 1, 0x04, 0x00000003 }, | ||
978 | { 0x000210, 1, 0x04, 0x00000000 }, | ||
979 | { 0x000320, 1, 0x04, 0x00000000 }, | ||
980 | { 0x000324, 6, 0x04, 0x3f800000 }, | ||
981 | { 0x000750, 1, 0x04, 0x00000000 }, | ||
982 | { 0x000760, 1, 0x04, 0x39291909 }, | ||
983 | { 0x000764, 1, 0x04, 0x79695949 }, | ||
984 | { 0x000768, 1, 0x04, 0xb9a99989 }, | ||
985 | { 0x00076c, 1, 0x04, 0xf9e9d9c9 }, | ||
986 | { 0x000770, 1, 0x04, 0x30201000 }, | ||
987 | { 0x000774, 1, 0x04, 0x70605040 }, | ||
988 | { 0x000778, 1, 0x04, 0x00009080 }, | ||
989 | { 0x000780, 1, 0x04, 0x39291909 }, | ||
990 | { 0x000784, 1, 0x04, 0x79695949 }, | ||
991 | { 0x000788, 1, 0x04, 0xb9a99989 }, | ||
992 | { 0x00078c, 1, 0x04, 0xf9e9d9c9 }, | ||
993 | { 0x0007d0, 1, 0x04, 0x30201000 }, | ||
994 | { 0x0007d4, 1, 0x04, 0x70605040 }, | ||
995 | { 0x0007d8, 1, 0x04, 0x00009080 }, | ||
996 | { 0x00037c, 1, 0x04, 0x00000001 }, | ||
997 | { 0x000740, 2, 0x04, 0x00000000 }, | ||
998 | { 0x002600, 1, 0x04, 0x00000000 }, | ||
999 | { 0x001918, 1, 0x04, 0x00000000 }, | ||
1000 | { 0x00191c, 1, 0x04, 0x00000900 }, | ||
1001 | { 0x001920, 1, 0x04, 0x00000405 }, | ||
1002 | { 0x001308, 1, 0x04, 0x00000001 }, | ||
1003 | { 0x001924, 1, 0x04, 0x00000000 }, | ||
1004 | { 0x0013ac, 1, 0x04, 0x00000000 }, | ||
1005 | { 0x00192c, 1, 0x04, 0x00000001 }, | ||
1006 | { 0x00193c, 1, 0x04, 0x00002c1c }, | ||
1007 | { 0x000d7c, 1, 0x04, 0x00000000 }, | ||
1008 | { 0x000f8c, 1, 0x04, 0x00000000 }, | ||
1009 | { 0x0002c0, 1, 0x04, 0x00000001 }, | ||
1010 | { 0x001510, 1, 0x04, 0x00000000 }, | ||
1011 | { 0x001940, 1, 0x04, 0x00000000 }, | ||
1012 | { 0x000ff4, 2, 0x04, 0x00000000 }, | ||
1013 | { 0x00194c, 2, 0x04, 0x00000000 }, | ||
1014 | { 0x001968, 1, 0x04, 0x00000000 }, | ||
1015 | { 0x001590, 1, 0x04, 0x0000003f }, | ||
1016 | { 0x0007e8, 4, 0x04, 0x00000000 }, | ||
1017 | { 0x00196c, 1, 0x04, 0x00000011 }, | ||
1018 | { 0x0002e4, 1, 0x04, 0x0000b001 }, | ||
1019 | { 0x00036c, 2, 0x04, 0x00000000 }, | ||
1020 | { 0x00197c, 1, 0x04, 0x00000000 }, | ||
1021 | { 0x000fcc, 2, 0x04, 0x00000000 }, | ||
1022 | { 0x0002d8, 1, 0x04, 0x00000040 }, | ||
1023 | { 0x001980, 1, 0x04, 0x00000080 }, | ||
1024 | { 0x001504, 1, 0x04, 0x00000080 }, | ||
1025 | { 0x001984, 1, 0x04, 0x00000000 }, | ||
1026 | { 0x000300, 1, 0x04, 0x00000001 }, | ||
1027 | { 0x0013a8, 1, 0x04, 0x00000000 }, | ||
1028 | { 0x0012ec, 1, 0x04, 0x00000000 }, | ||
1029 | { 0x001310, 1, 0x04, 0x00000000 }, | ||
1030 | { 0x001314, 1, 0x04, 0x00000001 }, | ||
1031 | { 0x001380, 1, 0x04, 0x00000000 }, | ||
1032 | { 0x001384, 4, 0x04, 0x00000001 }, | ||
1033 | { 0x001394, 1, 0x04, 0x00000000 }, | ||
1034 | { 0x00139c, 1, 0x04, 0x00000000 }, | ||
1035 | { 0x001398, 1, 0x04, 0x00000000 }, | ||
1036 | { 0x001594, 1, 0x04, 0x00000000 }, | ||
1037 | { 0x001598, 4, 0x04, 0x00000001 }, | ||
1038 | { 0x000f54, 3, 0x04, 0x00000000 }, | ||
1039 | { 0x0019bc, 1, 0x04, 0x00000000 }, | ||
1040 | { 0x000f9c, 2, 0x04, 0x00000000 }, | ||
1041 | { 0x0012cc, 1, 0x04, 0x00000000 }, | ||
1042 | { 0x0012e8, 1, 0x04, 0x00000000 }, | ||
1043 | { 0x00130c, 1, 0x04, 0x00000001 }, | ||
1044 | { 0x001360, 8, 0x04, 0x00000000 }, | ||
1045 | { 0x00133c, 2, 0x04, 0x00000001 }, | ||
1046 | { 0x001344, 1, 0x04, 0x00000002 }, | ||
1047 | { 0x001348, 2, 0x04, 0x00000001 }, | ||
1048 | { 0x001350, 1, 0x04, 0x00000002 }, | ||
1049 | { 0x001358, 1, 0x04, 0x00000001 }, | ||
1050 | { 0x0012e4, 1, 0x04, 0x00000000 }, | ||
1051 | { 0x00131c, 4, 0x04, 0x00000000 }, | ||
1052 | { 0x0019c0, 1, 0x04, 0x00000000 }, | ||
1053 | { 0x001140, 1, 0x04, 0x00000000 }, | ||
1054 | { 0x0019c4, 1, 0x04, 0x00000000 }, | ||
1055 | { 0x0019c8, 1, 0x04, 0x00001500 }, | ||
1056 | { 0x00135c, 1, 0x04, 0x00000000 }, | ||
1057 | { 0x000f90, 1, 0x04, 0x00000000 }, | ||
1058 | { 0x0019e0, 8, 0x04, 0x00000001 }, | ||
1059 | { 0x0019cc, 1, 0x04, 0x00000001 }, | ||
1060 | { 0x0015b8, 1, 0x04, 0x00000000 }, | ||
1061 | { 0x001a00, 1, 0x04, 0x00001111 }, | ||
1062 | { 0x001a04, 7, 0x04, 0x00000000 }, | ||
1063 | { 0x000d6c, 2, 0x04, 0xffff0000 }, | ||
1064 | { 0x0010f8, 1, 0x04, 0x00001010 }, | ||
1065 | { 0x000d80, 5, 0x04, 0x00000000 }, | ||
1066 | { 0x000da0, 1, 0x04, 0x00000000 }, | ||
1067 | { 0x0007a4, 2, 0x04, 0x00000000 }, | ||
1068 | { 0x001508, 1, 0x04, 0x80000000 }, | ||
1069 | { 0x00150c, 1, 0x04, 0x40000000 }, | ||
1070 | { 0x001668, 1, 0x04, 0x00000000 }, | ||
1071 | { 0x000318, 2, 0x04, 0x00000008 }, | ||
1072 | { 0x000d9c, 1, 0x04, 0x00000001 }, | ||
1073 | { 0x000ddc, 1, 0x04, 0x00000002 }, | ||
1074 | { 0x000374, 1, 0x04, 0x00000000 }, | ||
1075 | { 0x000378, 1, 0x04, 0x00000020 }, | ||
1076 | { 0x0007dc, 1, 0x04, 0x00000000 }, | ||
1077 | { 0x00074c, 1, 0x04, 0x00000055 }, | ||
1078 | { 0x001420, 1, 0x04, 0x00000003 }, | ||
1079 | { 0x0017bc, 2, 0x04, 0x00000000 }, | ||
1080 | { 0x0017c4, 1, 0x04, 0x00000001 }, | ||
1081 | { 0x001008, 1, 0x04, 0x00000008 }, | ||
1082 | { 0x00100c, 1, 0x04, 0x00000040 }, | ||
1083 | { 0x001010, 1, 0x04, 0x0000012c }, | ||
1084 | { 0x000d60, 1, 0x04, 0x00000040 }, | ||
1085 | { 0x00075c, 1, 0x04, 0x00000003 }, | ||
1086 | { 0x001018, 1, 0x04, 0x00000020 }, | ||
1087 | { 0x00101c, 1, 0x04, 0x00000001 }, | ||
1088 | { 0x001020, 1, 0x04, 0x00000020 }, | ||
1089 | { 0x001024, 1, 0x04, 0x00000001 }, | ||
1090 | { 0x001444, 3, 0x04, 0x00000000 }, | ||
1091 | { 0x000360, 1, 0x04, 0x20164010 }, | ||
1092 | { 0x000364, 1, 0x04, 0x00000020 }, | ||
1093 | { 0x000368, 1, 0x04, 0x00000000 }, | ||
1094 | { 0x000de4, 1, 0x04, 0x00000000 }, | ||
1095 | { 0x000204, 1, 0x04, 0x00000006 }, | ||
1096 | { 0x000208, 1, 0x04, 0x00000000 }, | ||
1097 | { 0x0002cc, 2, 0x04, 0x003fffff }, | ||
1098 | { 0x001220, 1, 0x04, 0x00000005 }, | ||
1099 | { 0x000fdc, 1, 0x04, 0x00000000 }, | ||
1100 | { 0x000f98, 1, 0x04, 0x00400008 }, | ||
1101 | { 0x001284, 1, 0x04, 0x08000080 }, | ||
1102 | { 0x001450, 1, 0x04, 0x00400008 }, | ||
1103 | { 0x001454, 1, 0x04, 0x08000080 }, | ||
1104 | { 0x000214, 1, 0x04, 0x00000000 }, | ||
1105 | {} | 284 | {} |
1106 | }; | 285 | }; |
1107 | 286 | ||
1108 | static struct nvc0_graph_init | 287 | static const struct nvc0_graph_init |
1109 | nv108_grctx_init_unk40xx[] = { | 288 | nv108_grctx_init_fe_0[] = { |
1110 | { 0x404004, 8, 0x04, 0x00000000 }, | 289 | { 0x404004, 8, 0x04, 0x00000000 }, |
1111 | { 0x404024, 1, 0x04, 0x0000e000 }, | 290 | { 0x404024, 1, 0x04, 0x0000e000 }, |
1112 | { 0x404028, 8, 0x04, 0x00000000 }, | 291 | { 0x404028, 8, 0x04, 0x00000000 }, |
@@ -1132,8 +311,8 @@ nv108_grctx_init_unk40xx[] = { | |||
1132 | {} | 311 | {} |
1133 | }; | 312 | }; |
1134 | 313 | ||
1135 | static struct nvc0_graph_init | 314 | static const struct nvc0_graph_init |
1136 | nv108_grctx_init_unk58xx[] = { | 315 | nv108_grctx_init_ds_0[] = { |
1137 | { 0x405800, 1, 0x04, 0x0f8000bf }, | 316 | { 0x405800, 1, 0x04, 0x0f8000bf }, |
1138 | { 0x405830, 1, 0x04, 0x02180648 }, | 317 | { 0x405830, 1, 0x04, 0x02180648 }, |
1139 | { 0x405834, 1, 0x04, 0x08000000 }, | 318 | { 0x405834, 1, 0x04, 0x08000000 }, |
@@ -1146,8 +325,10 @@ nv108_grctx_init_unk58xx[] = { | |||
1146 | {} | 325 | {} |
1147 | }; | 326 | }; |
1148 | 327 | ||
1149 | static struct nvc0_graph_init | 328 | static const struct nvc0_graph_init |
1150 | nv108_grctx_init_unk64xx[] = { | 329 | nv108_grctx_init_pd_0[] = { |
330 | { 0x406020, 1, 0x04, 0x034103c1 }, | ||
331 | { 0x406028, 4, 0x04, 0x00000001 }, | ||
1151 | { 0x4064a8, 1, 0x04, 0x00000000 }, | 332 | { 0x4064a8, 1, 0x04, 0x00000000 }, |
1152 | { 0x4064ac, 1, 0x04, 0x00003fff }, | 333 | { 0x4064ac, 1, 0x04, 0x00003fff }, |
1153 | { 0x4064b0, 3, 0x04, 0x00000000 }, | 334 | { 0x4064b0, 3, 0x04, 0x00000000 }, |
@@ -1159,8 +340,8 @@ nv108_grctx_init_unk64xx[] = { | |||
1159 | {} | 340 | {} |
1160 | }; | 341 | }; |
1161 | 342 | ||
1162 | static struct nvc0_graph_init | 343 | static const struct nvc0_graph_init |
1163 | nv108_grctx_init_unk78xx[] = { | 344 | nv108_grctx_init_rstr2d_0[] = { |
1164 | { 0x407804, 1, 0x04, 0x00000063 }, | 345 | { 0x407804, 1, 0x04, 0x00000063 }, |
1165 | { 0x40780c, 1, 0x04, 0x0a418820 }, | 346 | { 0x40780c, 1, 0x04, 0x0a418820 }, |
1166 | { 0x407810, 1, 0x04, 0x062080e6 }, | 347 | { 0x407810, 1, 0x04, 0x062080e6 }, |
@@ -1172,8 +353,8 @@ nv108_grctx_init_unk78xx[] = { | |||
1172 | {} | 353 | {} |
1173 | }; | 354 | }; |
1174 | 355 | ||
1175 | static struct nvc0_graph_init | 356 | static const struct nvc0_graph_init |
1176 | nv108_grctx_init_unk88xx[] = { | 357 | nv108_grctx_init_be_0[] = { |
1177 | { 0x408800, 1, 0x04, 0x32802a3c }, | 358 | { 0x408800, 1, 0x04, 0x32802a3c }, |
1178 | { 0x408804, 1, 0x04, 0x00000040 }, | 359 | { 0x408804, 1, 0x04, 0x00000040 }, |
1179 | { 0x408808, 1, 0x04, 0x1003e005 }, | 360 | { 0x408808, 1, 0x04, 0x1003e005 }, |
@@ -1185,7 +366,22 @@ nv108_grctx_init_unk88xx[] = { | |||
1185 | {} | 366 | {} |
1186 | }; | 367 | }; |
1187 | 368 | ||
1188 | static struct nvc0_graph_init | 369 | static const struct nvc0_graph_pack |
370 | nv108_grctx_pack_hub[] = { | ||
371 | { nvc0_grctx_init_main_0 }, | ||
372 | { nv108_grctx_init_fe_0 }, | ||
373 | { nvf0_grctx_init_pri_0 }, | ||
374 | { nve4_grctx_init_memfmt_0 }, | ||
375 | { nv108_grctx_init_ds_0 }, | ||
376 | { nvf0_grctx_init_cwd_0 }, | ||
377 | { nv108_grctx_init_pd_0 }, | ||
378 | { nv108_grctx_init_rstr2d_0 }, | ||
379 | { nve4_grctx_init_scc_0 }, | ||
380 | { nv108_grctx_init_be_0 }, | ||
381 | {} | ||
382 | }; | ||
383 | |||
384 | static const struct nvc0_graph_init | ||
1189 | nv108_grctx_init_gpc_0[] = { | 385 | nv108_grctx_init_gpc_0[] = { |
1190 | { 0x418380, 1, 0x04, 0x00000016 }, | 386 | { 0x418380, 1, 0x04, 0x00000016 }, |
1191 | { 0x418400, 1, 0x04, 0x38005e00 }, | 387 | { 0x418400, 1, 0x04, 0x38005e00 }, |
@@ -1236,8 +432,14 @@ nv108_grctx_init_gpc_0[] = { | |||
1236 | {} | 432 | {} |
1237 | }; | 433 | }; |
1238 | 434 | ||
1239 | static struct nvc0_graph_init | 435 | static const struct nvc0_graph_pack |
1240 | nv108_grctx_init_tpc[] = { | 436 | nv108_grctx_pack_gpc[] = { |
437 | { nv108_grctx_init_gpc_0 }, | ||
438 | {} | ||
439 | }; | ||
440 | |||
441 | static const struct nvc0_graph_init | ||
442 | nv108_grctx_init_tpc_0[] = { | ||
1241 | { 0x419848, 1, 0x04, 0x00000000 }, | 443 | { 0x419848, 1, 0x04, 0x00000000 }, |
1242 | { 0x419864, 1, 0x04, 0x00000129 }, | 444 | { 0x419864, 1, 0x04, 0x00000129 }, |
1243 | { 0x419888, 1, 0x04, 0x00000000 }, | 445 | { 0x419888, 1, 0x04, 0x00000000 }, |
@@ -1285,8 +487,14 @@ nv108_grctx_init_tpc[] = { | |||
1285 | {} | 487 | {} |
1286 | }; | 488 | }; |
1287 | 489 | ||
1288 | static struct nvc0_graph_init | 490 | static const struct nvc0_graph_pack |
1289 | nv108_grctx_init_unk[] = { | 491 | nv108_grctx_pack_tpc[] = { |
492 | { nv108_grctx_init_tpc_0 }, | ||
493 | {} | ||
494 | }; | ||
495 | |||
496 | static const struct nvc0_graph_init | ||
497 | nv108_grctx_init_ppc_0[] = { | ||
1290 | { 0x41be24, 1, 0x04, 0x00000006 }, | 498 | { 0x41be24, 1, 0x04, 0x00000006 }, |
1291 | { 0x41bec0, 1, 0x04, 0x10000000 }, | 499 | { 0x41bec0, 1, 0x04, 0x10000000 }, |
1292 | { 0x41bec4, 1, 0x04, 0x00037f7f }, | 500 | { 0x41bec4, 1, 0x04, 0x00037f7f }, |
@@ -1304,6 +512,16 @@ nv108_grctx_init_unk[] = { | |||
1304 | {} | 512 | {} |
1305 | }; | 513 | }; |
1306 | 514 | ||
515 | static const struct nvc0_graph_pack | ||
516 | nv108_grctx_pack_ppc[] = { | ||
517 | { nv108_grctx_init_ppc_0 }, | ||
518 | {} | ||
519 | }; | ||
520 | |||
521 | /******************************************************************************* | ||
522 | * PGRAPH context implementation | ||
523 | ******************************************************************************/ | ||
524 | |||
1307 | static void | 525 | static void |
1308 | nv108_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | 526 | nv108_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) |
1309 | { | 527 | { |
@@ -1346,47 +564,6 @@ nv108_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
1346 | mmio_list(0x17e920, 0x00090d08, 0, 0); | 564 | mmio_list(0x17e920, 0x00090d08, 0, 0); |
1347 | } | 565 | } |
1348 | 566 | ||
1349 | static struct nvc0_graph_init * | ||
1350 | nv108_grctx_init_hub[] = { | ||
1351 | nvc0_grctx_init_base, | ||
1352 | nv108_grctx_init_unk40xx, | ||
1353 | nvf0_grctx_init_unk44xx, | ||
1354 | nve4_grctx_init_unk46xx, | ||
1355 | nve4_grctx_init_unk47xx, | ||
1356 | nv108_grctx_init_unk58xx, | ||
1357 | nvf0_grctx_init_unk5bxx, | ||
1358 | nvf0_grctx_init_unk60xx, | ||
1359 | nv108_grctx_init_unk64xx, | ||
1360 | nv108_grctx_init_unk78xx, | ||
1361 | nve4_grctx_init_unk80xx, | ||
1362 | nv108_grctx_init_unk88xx, | ||
1363 | NULL | ||
1364 | }; | ||
1365 | |||
1366 | struct nvc0_graph_init * | ||
1367 | nv108_grctx_init_gpc[] = { | ||
1368 | nv108_grctx_init_gpc_0, | ||
1369 | nvc0_grctx_init_gpc_1, | ||
1370 | nv108_grctx_init_tpc, | ||
1371 | nv108_grctx_init_unk, | ||
1372 | NULL | ||
1373 | }; | ||
1374 | |||
1375 | struct nvc0_graph_init | ||
1376 | nv108_grctx_init_mthd_magic[] = { | ||
1377 | { 0x3410, 1, 0x04, 0x8e0e2006 }, | ||
1378 | { 0x3414, 1, 0x04, 0x00000038 }, | ||
1379 | {} | ||
1380 | }; | ||
1381 | |||
1382 | static struct nvc0_graph_mthd | ||
1383 | nv108_grctx_init_mthd[] = { | ||
1384 | { 0xa197, nv108_grctx_init_a197, }, | ||
1385 | { 0x902d, nvc0_grctx_init_902d, }, | ||
1386 | { 0x902d, nv108_grctx_init_mthd_magic, }, | ||
1387 | {} | ||
1388 | }; | ||
1389 | |||
1390 | struct nouveau_oclass * | 567 | struct nouveau_oclass * |
1391 | nv108_grctx_oclass = &(struct nvc0_grctx_oclass) { | 568 | nv108_grctx_oclass = &(struct nvc0_grctx_oclass) { |
1392 | .base.handle = NV_ENGCTX(GR, 0x08), | 569 | .base.handle = NV_ENGCTX(GR, 0x08), |
@@ -1398,11 +575,14 @@ nv108_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
1398 | .rd32 = _nouveau_graph_context_rd32, | 575 | .rd32 = _nouveau_graph_context_rd32, |
1399 | .wr32 = _nouveau_graph_context_wr32, | 576 | .wr32 = _nouveau_graph_context_wr32, |
1400 | }, | 577 | }, |
1401 | .main = nve4_grctx_generate_main, | 578 | .main = nve4_grctx_generate_main, |
1402 | .mods = nv108_grctx_generate_mods, | 579 | .mods = nv108_grctx_generate_mods, |
1403 | .unkn = nve4_grctx_generate_unkn, | 580 | .unkn = nve4_grctx_generate_unkn, |
1404 | .hub = nv108_grctx_init_hub, | 581 | .hub = nv108_grctx_pack_hub, |
1405 | .gpc = nv108_grctx_init_gpc, | 582 | .gpc = nv108_grctx_pack_gpc, |
1406 | .icmd = nv108_grctx_init_icmd, | 583 | .zcull = nvc0_grctx_pack_zcull, |
1407 | .mthd = nv108_grctx_init_mthd, | 584 | .tpc = nv108_grctx_pack_tpc, |
585 | .ppc = nv108_grctx_pack_ppc, | ||
586 | .icmd = nv108_grctx_pack_icmd, | ||
587 | .mthd = nvf0_grctx_pack_mthd, | ||
1408 | }.base; | 588 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c index fe67415c3e17..6e7ec4a5355c 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c | |||
@@ -22,10 +22,14 @@ | |||
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nvc0_grctx_init_icmd[] = { | 28 | * PGRAPH context register lists |
29 | ******************************************************************************/ | ||
30 | |||
31 | static const struct nvc0_graph_init | ||
32 | nvc0_grctx_init_icmd_0[] = { | ||
29 | { 0x001000, 1, 0x01, 0x00000004 }, | 33 | { 0x001000, 1, 0x01, 0x00000004 }, |
30 | { 0x0000a9, 1, 0x01, 0x0000ffff }, | 34 | { 0x0000a9, 1, 0x01, 0x0000ffff }, |
31 | { 0x000038, 1, 0x01, 0x0fac6881 }, | 35 | { 0x000038, 1, 0x01, 0x0fac6881 }, |
@@ -140,8 +144,7 @@ nvc0_grctx_init_icmd[] = { | |||
140 | { 0x000586, 1, 0x01, 0x00000040 }, | 144 | { 0x000586, 1, 0x01, 0x00000040 }, |
141 | { 0x000582, 2, 0x01, 0x00000080 }, | 145 | { 0x000582, 2, 0x01, 0x00000080 }, |
142 | { 0x0005c2, 1, 0x01, 0x00000001 }, | 146 | { 0x0005c2, 1, 0x01, 0x00000001 }, |
143 | { 0x000638, 1, 0x01, 0x00000001 }, | 147 | { 0x000638, 2, 0x01, 0x00000001 }, |
144 | { 0x000639, 1, 0x01, 0x00000001 }, | ||
145 | { 0x00063a, 1, 0x01, 0x00000002 }, | 148 | { 0x00063a, 1, 0x01, 0x00000002 }, |
146 | { 0x00063b, 2, 0x01, 0x00000001 }, | 149 | { 0x00063b, 2, 0x01, 0x00000001 }, |
147 | { 0x00063d, 1, 0x01, 0x00000002 }, | 150 | { 0x00063d, 1, 0x01, 0x00000002 }, |
@@ -201,15 +204,13 @@ nvc0_grctx_init_icmd[] = { | |||
201 | { 0x000787, 1, 0x01, 0x000000cf }, | 204 | { 0x000787, 1, 0x01, 0x000000cf }, |
202 | { 0x00078c, 1, 0x01, 0x00000008 }, | 205 | { 0x00078c, 1, 0x01, 0x00000008 }, |
203 | { 0x000792, 1, 0x01, 0x00000001 }, | 206 | { 0x000792, 1, 0x01, 0x00000001 }, |
204 | { 0x000794, 1, 0x01, 0x00000001 }, | 207 | { 0x000794, 3, 0x01, 0x00000001 }, |
205 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
206 | { 0x000797, 1, 0x01, 0x000000cf }, | 208 | { 0x000797, 1, 0x01, 0x000000cf }, |
207 | { 0x000836, 1, 0x01, 0x00000001 }, | 209 | { 0x000836, 1, 0x01, 0x00000001 }, |
208 | { 0x00079a, 1, 0x01, 0x00000002 }, | 210 | { 0x00079a, 1, 0x01, 0x00000002 }, |
209 | { 0x000833, 1, 0x01, 0x04444480 }, | 211 | { 0x000833, 1, 0x01, 0x04444480 }, |
210 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 212 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
211 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 213 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
212 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
213 | { 0x000831, 1, 0x01, 0x00000004 }, | 214 | { 0x000831, 1, 0x01, 0x00000004 }, |
214 | { 0x00080c, 1, 0x01, 0x00000002 }, | 215 | { 0x00080c, 1, 0x01, 0x00000002 }, |
215 | { 0x00080d, 2, 0x01, 0x00000100 }, | 216 | { 0x00080d, 2, 0x01, 0x00000100 }, |
@@ -235,14 +236,12 @@ nvc0_grctx_init_icmd[] = { | |||
235 | { 0x0006b1, 1, 0x01, 0x00000011 }, | 236 | { 0x0006b1, 1, 0x01, 0x00000011 }, |
236 | { 0x00078c, 1, 0x01, 0x00000008 }, | 237 | { 0x00078c, 1, 0x01, 0x00000008 }, |
237 | { 0x000792, 1, 0x01, 0x00000001 }, | 238 | { 0x000792, 1, 0x01, 0x00000001 }, |
238 | { 0x000794, 1, 0x01, 0x00000001 }, | 239 | { 0x000794, 3, 0x01, 0x00000001 }, |
239 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
240 | { 0x000797, 1, 0x01, 0x000000cf }, | 240 | { 0x000797, 1, 0x01, 0x000000cf }, |
241 | { 0x00079a, 1, 0x01, 0x00000002 }, | 241 | { 0x00079a, 1, 0x01, 0x00000002 }, |
242 | { 0x000833, 1, 0x01, 0x04444480 }, | 242 | { 0x000833, 1, 0x01, 0x04444480 }, |
243 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 243 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
244 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 244 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
245 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
246 | { 0x000831, 1, 0x01, 0x00000004 }, | 245 | { 0x000831, 1, 0x01, 0x00000004 }, |
247 | { 0x01e100, 1, 0x01, 0x00000001 }, | 246 | { 0x01e100, 1, 0x01, 0x00000001 }, |
248 | { 0x001000, 1, 0x01, 0x00000014 }, | 247 | { 0x001000, 1, 0x01, 0x00000014 }, |
@@ -267,8 +266,14 @@ nvc0_grctx_init_icmd[] = { | |||
267 | {} | 266 | {} |
268 | }; | 267 | }; |
269 | 268 | ||
270 | struct nvc0_graph_init | 269 | const struct nvc0_graph_pack |
271 | nvc0_grctx_init_9097[] = { | 270 | nvc0_grctx_pack_icmd[] = { |
271 | { nvc0_grctx_init_icmd_0 }, | ||
272 | {} | ||
273 | }; | ||
274 | |||
275 | static const struct nvc0_graph_init | ||
276 | nvc0_grctx_init_9097_0[] = { | ||
272 | { 0x000800, 8, 0x40, 0x00000000 }, | 277 | { 0x000800, 8, 0x40, 0x00000000 }, |
273 | { 0x000804, 8, 0x40, 0x00000000 }, | 278 | { 0x000804, 8, 0x40, 0x00000000 }, |
274 | { 0x000808, 8, 0x40, 0x00000400 }, | 279 | { 0x000808, 8, 0x40, 0x00000400 }, |
@@ -516,8 +521,7 @@ nvc0_grctx_init_9097[] = { | |||
516 | { 0x001350, 1, 0x04, 0x00000002 }, | 521 | { 0x001350, 1, 0x04, 0x00000002 }, |
517 | { 0x001358, 1, 0x04, 0x00000001 }, | 522 | { 0x001358, 1, 0x04, 0x00000001 }, |
518 | { 0x0012e4, 1, 0x04, 0x00000000 }, | 523 | { 0x0012e4, 1, 0x04, 0x00000000 }, |
519 | { 0x00131c, 1, 0x04, 0x00000000 }, | 524 | { 0x00131c, 4, 0x04, 0x00000000 }, |
520 | { 0x001320, 3, 0x04, 0x00000000 }, | ||
521 | { 0x0019c0, 1, 0x04, 0x00000000 }, | 525 | { 0x0019c0, 1, 0x04, 0x00000000 }, |
522 | { 0x001140, 1, 0x04, 0x00000000 }, | 526 | { 0x001140, 1, 0x04, 0x00000000 }, |
523 | { 0x0019c4, 1, 0x04, 0x00000000 }, | 527 | { 0x0019c4, 1, 0x04, 0x00000000 }, |
@@ -571,8 +575,8 @@ nvc0_grctx_init_9097[] = { | |||
571 | {} | 575 | {} |
572 | }; | 576 | }; |
573 | 577 | ||
574 | struct nvc0_graph_init | 578 | const struct nvc0_graph_init |
575 | nvc0_grctx_init_902d[] = { | 579 | nvc0_grctx_init_902d_0[] = { |
576 | { 0x000200, 1, 0x04, 0x000000cf }, | 580 | { 0x000200, 1, 0x04, 0x000000cf }, |
577 | { 0x000204, 1, 0x04, 0x00000001 }, | 581 | { 0x000204, 1, 0x04, 0x00000001 }, |
578 | { 0x000208, 1, 0x04, 0x00000020 }, | 582 | { 0x000208, 1, 0x04, 0x00000020 }, |
@@ -590,8 +594,8 @@ nvc0_grctx_init_902d[] = { | |||
590 | {} | 594 | {} |
591 | }; | 595 | }; |
592 | 596 | ||
593 | struct nvc0_graph_init | 597 | const struct nvc0_graph_init |
594 | nvc0_grctx_init_9039[] = { | 598 | nvc0_grctx_init_9039_0[] = { |
595 | { 0x00030c, 3, 0x04, 0x00000000 }, | 599 | { 0x00030c, 3, 0x04, 0x00000000 }, |
596 | { 0x000320, 1, 0x04, 0x00000000 }, | 600 | { 0x000320, 1, 0x04, 0x00000000 }, |
597 | { 0x000238, 2, 0x04, 0x00000000 }, | 601 | { 0x000238, 2, 0x04, 0x00000000 }, |
@@ -599,8 +603,8 @@ nvc0_grctx_init_9039[] = { | |||
599 | {} | 603 | {} |
600 | }; | 604 | }; |
601 | 605 | ||
602 | struct nvc0_graph_init | 606 | const struct nvc0_graph_init |
603 | nvc0_grctx_init_90c0[] = { | 607 | nvc0_grctx_init_90c0_0[] = { |
604 | { 0x00270c, 8, 0x20, 0x00000000 }, | 608 | { 0x00270c, 8, 0x20, 0x00000000 }, |
605 | { 0x00030c, 1, 0x04, 0x00000001 }, | 609 | { 0x00030c, 1, 0x04, 0x00000001 }, |
606 | { 0x001944, 1, 0x04, 0x00000000 }, | 610 | { 0x001944, 1, 0x04, 0x00000000 }, |
@@ -617,38 +621,44 @@ nvc0_grctx_init_90c0[] = { | |||
617 | {} | 621 | {} |
618 | }; | 622 | }; |
619 | 623 | ||
620 | struct nvc0_graph_init | 624 | const struct nvc0_graph_pack |
621 | nvc0_grctx_init_base[] = { | 625 | nvc0_grctx_pack_mthd[] = { |
626 | { nvc0_grctx_init_9097_0, 0x9097 }, | ||
627 | { nvc0_grctx_init_902d_0, 0x902d }, | ||
628 | { nvc0_grctx_init_9039_0, 0x9039 }, | ||
629 | { nvc0_grctx_init_90c0_0, 0x90c0 }, | ||
630 | {} | ||
631 | }; | ||
632 | |||
633 | const struct nvc0_graph_init | ||
634 | nvc0_grctx_init_main_0[] = { | ||
622 | { 0x400204, 2, 0x04, 0x00000000 }, | 635 | { 0x400204, 2, 0x04, 0x00000000 }, |
623 | {} | 636 | {} |
624 | }; | 637 | }; |
625 | 638 | ||
626 | struct nvc0_graph_init | 639 | const struct nvc0_graph_init |
627 | nvc0_grctx_init_unk40xx[] = { | 640 | nvc0_grctx_init_fe_0[] = { |
628 | { 0x404004, 10, 0x04, 0x00000000 }, | 641 | { 0x404004, 11, 0x04, 0x00000000 }, |
629 | { 0x404044, 1, 0x04, 0x00000000 }, | 642 | { 0x404044, 1, 0x04, 0x00000000 }, |
630 | { 0x404094, 1, 0x04, 0x00000000 }, | 643 | { 0x404094, 13, 0x04, 0x00000000 }, |
631 | { 0x404098, 12, 0x04, 0x00000000 }, | ||
632 | { 0x4040c8, 1, 0x04, 0xf0000087 }, | 644 | { 0x4040c8, 1, 0x04, 0xf0000087 }, |
633 | { 0x4040d0, 6, 0x04, 0x00000000 }, | 645 | { 0x4040d0, 6, 0x04, 0x00000000 }, |
634 | { 0x4040e8, 1, 0x04, 0x00001000 }, | 646 | { 0x4040e8, 1, 0x04, 0x00001000 }, |
635 | { 0x4040f8, 1, 0x04, 0x00000000 }, | 647 | { 0x4040f8, 1, 0x04, 0x00000000 }, |
636 | { 0x404130, 1, 0x04, 0x00000000 }, | 648 | { 0x404130, 2, 0x04, 0x00000000 }, |
637 | { 0x404134, 1, 0x04, 0x00000000 }, | ||
638 | { 0x404138, 1, 0x04, 0x20000040 }, | 649 | { 0x404138, 1, 0x04, 0x20000040 }, |
639 | { 0x404150, 1, 0x04, 0x0000002e }, | 650 | { 0x404150, 1, 0x04, 0x0000002e }, |
640 | { 0x404154, 1, 0x04, 0x00000400 }, | 651 | { 0x404154, 1, 0x04, 0x00000400 }, |
641 | { 0x404158, 1, 0x04, 0x00000200 }, | 652 | { 0x404158, 1, 0x04, 0x00000200 }, |
642 | { 0x404164, 1, 0x04, 0x00000055 }, | 653 | { 0x404164, 1, 0x04, 0x00000055 }, |
643 | { 0x404168, 1, 0x04, 0x00000000 }, | 654 | { 0x404168, 1, 0x04, 0x00000000 }, |
644 | { 0x404174, 1, 0x04, 0x00000000 }, | 655 | { 0x404174, 3, 0x04, 0x00000000 }, |
645 | { 0x404178, 2, 0x04, 0x00000000 }, | ||
646 | { 0x404200, 8, 0x04, 0x00000000 }, | 656 | { 0x404200, 8, 0x04, 0x00000000 }, |
647 | {} | 657 | {} |
648 | }; | 658 | }; |
649 | 659 | ||
650 | struct nvc0_graph_init | 660 | const struct nvc0_graph_init |
651 | nvc0_grctx_init_unk44xx[] = { | 661 | nvc0_grctx_init_pri_0[] = { |
652 | { 0x404404, 14, 0x04, 0x00000000 }, | 662 | { 0x404404, 14, 0x04, 0x00000000 }, |
653 | { 0x404460, 2, 0x04, 0x00000000 }, | 663 | { 0x404460, 2, 0x04, 0x00000000 }, |
654 | { 0x404468, 1, 0x04, 0x00ffffff }, | 664 | { 0x404468, 1, 0x04, 0x00ffffff }, |
@@ -658,8 +668,8 @@ nvc0_grctx_init_unk44xx[] = { | |||
658 | {} | 668 | {} |
659 | }; | 669 | }; |
660 | 670 | ||
661 | struct nvc0_graph_init | 671 | const struct nvc0_graph_init |
662 | nvc0_grctx_init_unk46xx[] = { | 672 | nvc0_grctx_init_memfmt_0[] = { |
663 | { 0x404604, 1, 0x04, 0x00000015 }, | 673 | { 0x404604, 1, 0x04, 0x00000015 }, |
664 | { 0x404608, 1, 0x04, 0x00000000 }, | 674 | { 0x404608, 1, 0x04, 0x00000000 }, |
665 | { 0x40460c, 1, 0x04, 0x00002e00 }, | 675 | { 0x40460c, 1, 0x04, 0x00002e00 }, |
@@ -674,19 +684,14 @@ nvc0_grctx_init_unk46xx[] = { | |||
674 | { 0x4046a0, 1, 0x04, 0x007f0080 }, | 684 | { 0x4046a0, 1, 0x04, 0x007f0080 }, |
675 | { 0x4046a4, 18, 0x04, 0x00000000 }, | 685 | { 0x4046a4, 18, 0x04, 0x00000000 }, |
676 | { 0x4046f0, 2, 0x04, 0x00000000 }, | 686 | { 0x4046f0, 2, 0x04, 0x00000000 }, |
677 | {} | ||
678 | }; | ||
679 | |||
680 | struct nvc0_graph_init | ||
681 | nvc0_grctx_init_unk47xx[] = { | ||
682 | { 0x404700, 13, 0x04, 0x00000000 }, | 687 | { 0x404700, 13, 0x04, 0x00000000 }, |
683 | { 0x404734, 1, 0x04, 0x00000100 }, | 688 | { 0x404734, 1, 0x04, 0x00000100 }, |
684 | { 0x404738, 8, 0x04, 0x00000000 }, | 689 | { 0x404738, 8, 0x04, 0x00000000 }, |
685 | {} | 690 | {} |
686 | }; | 691 | }; |
687 | 692 | ||
688 | struct nvc0_graph_init | 693 | static const struct nvc0_graph_init |
689 | nvc0_grctx_init_unk58xx[] = { | 694 | nvc0_grctx_init_ds_0[] = { |
690 | { 0x405800, 1, 0x04, 0x078000bf }, | 695 | { 0x405800, 1, 0x04, 0x078000bf }, |
691 | { 0x405830, 1, 0x04, 0x02180000 }, | 696 | { 0x405830, 1, 0x04, 0x02180000 }, |
692 | { 0x405834, 2, 0x04, 0x00000000 }, | 697 | { 0x405834, 2, 0x04, 0x00000000 }, |
@@ -697,23 +702,18 @@ nvc0_grctx_init_unk58xx[] = { | |||
697 | {} | 702 | {} |
698 | }; | 703 | }; |
699 | 704 | ||
700 | struct nvc0_graph_init | 705 | static const struct nvc0_graph_init |
701 | nvc0_grctx_init_unk60xx[] = { | 706 | nvc0_grctx_init_pd_0[] = { |
702 | { 0x406020, 1, 0x04, 0x000103c1 }, | 707 | { 0x406020, 1, 0x04, 0x000103c1 }, |
703 | { 0x406028, 4, 0x04, 0x00000001 }, | 708 | { 0x406028, 4, 0x04, 0x00000001 }, |
704 | {} | ||
705 | }; | ||
706 | |||
707 | struct nvc0_graph_init | ||
708 | nvc0_grctx_init_unk64xx[] = { | ||
709 | { 0x4064a8, 1, 0x04, 0x00000000 }, | 709 | { 0x4064a8, 1, 0x04, 0x00000000 }, |
710 | { 0x4064ac, 1, 0x04, 0x00003fff }, | 710 | { 0x4064ac, 1, 0x04, 0x00003fff }, |
711 | { 0x4064b4, 2, 0x04, 0x00000000 }, | 711 | { 0x4064b4, 2, 0x04, 0x00000000 }, |
712 | {} | 712 | {} |
713 | }; | 713 | }; |
714 | 714 | ||
715 | struct nvc0_graph_init | 715 | const struct nvc0_graph_init |
716 | nvc0_grctx_init_unk78xx[] = { | 716 | nvc0_grctx_init_rstr2d_0[] = { |
717 | { 0x407804, 1, 0x04, 0x00000023 }, | 717 | { 0x407804, 1, 0x04, 0x00000023 }, |
718 | { 0x40780c, 1, 0x04, 0x0a418820 }, | 718 | { 0x40780c, 1, 0x04, 0x0a418820 }, |
719 | { 0x407810, 1, 0x04, 0x062080e6 }, | 719 | { 0x407810, 1, 0x04, 0x062080e6 }, |
@@ -725,8 +725,8 @@ nvc0_grctx_init_unk78xx[] = { | |||
725 | {} | 725 | {} |
726 | }; | 726 | }; |
727 | 727 | ||
728 | struct nvc0_graph_init | 728 | const struct nvc0_graph_init |
729 | nvc0_grctx_init_unk80xx[] = { | 729 | nvc0_grctx_init_scc_0[] = { |
730 | { 0x408000, 2, 0x04, 0x00000000 }, | 730 | { 0x408000, 2, 0x04, 0x00000000 }, |
731 | { 0x408008, 1, 0x04, 0x00000018 }, | 731 | { 0x408008, 1, 0x04, 0x00000018 }, |
732 | { 0x40800c, 2, 0x04, 0x00000000 }, | 732 | { 0x40800c, 2, 0x04, 0x00000000 }, |
@@ -736,8 +736,8 @@ nvc0_grctx_init_unk80xx[] = { | |||
736 | {} | 736 | {} |
737 | }; | 737 | }; |
738 | 738 | ||
739 | struct nvc0_graph_init | 739 | static const struct nvc0_graph_init |
740 | nvc0_grctx_init_rop[] = { | 740 | nvc0_grctx_init_be_0[] = { |
741 | { 0x408800, 1, 0x04, 0x02802a3c }, | 741 | { 0x408800, 1, 0x04, 0x02802a3c }, |
742 | { 0x408804, 1, 0x04, 0x00000040 }, | 742 | { 0x408804, 1, 0x04, 0x00000040 }, |
743 | { 0x408808, 1, 0x04, 0x0003e00d }, | 743 | { 0x408808, 1, 0x04, 0x0003e00d }, |
@@ -748,7 +748,21 @@ nvc0_grctx_init_rop[] = { | |||
748 | {} | 748 | {} |
749 | }; | 749 | }; |
750 | 750 | ||
751 | struct nvc0_graph_init | 751 | const struct nvc0_graph_pack |
752 | nvc0_grctx_pack_hub[] = { | ||
753 | { nvc0_grctx_init_main_0 }, | ||
754 | { nvc0_grctx_init_fe_0 }, | ||
755 | { nvc0_grctx_init_pri_0 }, | ||
756 | { nvc0_grctx_init_memfmt_0 }, | ||
757 | { nvc0_grctx_init_ds_0 }, | ||
758 | { nvc0_grctx_init_pd_0 }, | ||
759 | { nvc0_grctx_init_rstr2d_0 }, | ||
760 | { nvc0_grctx_init_scc_0 }, | ||
761 | { nvc0_grctx_init_be_0 }, | ||
762 | {} | ||
763 | }; | ||
764 | |||
765 | static const struct nvc0_graph_init | ||
752 | nvc0_grctx_init_gpc_0[] = { | 766 | nvc0_grctx_init_gpc_0[] = { |
753 | { 0x418380, 1, 0x04, 0x00000016 }, | 767 | { 0x418380, 1, 0x04, 0x00000016 }, |
754 | { 0x418400, 1, 0x04, 0x38004e00 }, | 768 | { 0x418400, 1, 0x04, 0x38004e00 }, |
@@ -797,8 +811,14 @@ nvc0_grctx_init_gpc_0[] = { | |||
797 | {} | 811 | {} |
798 | }; | 812 | }; |
799 | 813 | ||
800 | struct nvc0_graph_init | 814 | const struct nvc0_graph_pack |
801 | nvc0_grctx_init_gpc_1[] = { | 815 | nvc0_grctx_pack_gpc[] = { |
816 | { nvc0_grctx_init_gpc_0 }, | ||
817 | {} | ||
818 | }; | ||
819 | |||
820 | static const struct nvc0_graph_init | ||
821 | nvc0_grctx_init_zcullr_0[] = { | ||
802 | { 0x418a00, 3, 0x04, 0x00000000 }, | 822 | { 0x418a00, 3, 0x04, 0x00000000 }, |
803 | { 0x418a0c, 1, 0x04, 0x00010000 }, | 823 | { 0x418a0c, 1, 0x04, 0x00010000 }, |
804 | { 0x418a10, 3, 0x04, 0x00000000 }, | 824 | { 0x418a10, 3, 0x04, 0x00000000 }, |
@@ -826,8 +846,14 @@ nvc0_grctx_init_gpc_1[] = { | |||
826 | {} | 846 | {} |
827 | }; | 847 | }; |
828 | 848 | ||
829 | struct nvc0_graph_init | 849 | const struct nvc0_graph_pack |
830 | nvc0_grctx_init_tpc[] = { | 850 | nvc0_grctx_pack_zcull[] = { |
851 | { nvc0_grctx_init_zcullr_0 }, | ||
852 | {} | ||
853 | }; | ||
854 | |||
855 | static const struct nvc0_graph_init | ||
856 | nvc0_grctx_init_tpc_0[] = { | ||
831 | { 0x419818, 1, 0x04, 0x00000000 }, | 857 | { 0x419818, 1, 0x04, 0x00000000 }, |
832 | { 0x41983c, 1, 0x04, 0x00038bc7 }, | 858 | { 0x41983c, 1, 0x04, 0x00038bc7 }, |
833 | { 0x419848, 1, 0x04, 0x00000000 }, | 859 | { 0x419848, 1, 0x04, 0x00000000 }, |
@@ -868,6 +894,16 @@ nvc0_grctx_init_tpc[] = { | |||
868 | {} | 894 | {} |
869 | }; | 895 | }; |
870 | 896 | ||
897 | const struct nvc0_graph_pack | ||
898 | nvc0_grctx_pack_tpc[] = { | ||
899 | { nvc0_grctx_init_tpc_0 }, | ||
900 | {} | ||
901 | }; | ||
902 | |||
903 | /******************************************************************************* | ||
904 | * PGRAPH context implementation | ||
905 | ******************************************************************************/ | ||
906 | |||
871 | void | 907 | void |
872 | nvc0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | 908 | nvc0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) |
873 | { | 909 | { |
@@ -1055,14 +1091,14 @@ void | |||
1055 | nvc0_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | 1091 | nvc0_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) |
1056 | { | 1092 | { |
1057 | struct nvc0_grctx_oclass *oclass = (void *)nv_engine(priv)->cclass; | 1093 | struct nvc0_grctx_oclass *oclass = (void *)nv_engine(priv)->cclass; |
1058 | int i; | ||
1059 | 1094 | ||
1060 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); | 1095 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); |
1061 | 1096 | ||
1062 | for (i = 0; oclass->hub[i]; i++) | 1097 | nvc0_graph_mmio(priv, oclass->hub); |
1063 | nvc0_graph_mmio(priv, oclass->hub[i]); | 1098 | nvc0_graph_mmio(priv, oclass->gpc); |
1064 | for (i = 0; oclass->gpc[i]; i++) | 1099 | nvc0_graph_mmio(priv, oclass->zcull); |
1065 | nvc0_graph_mmio(priv, oclass->gpc[i]); | 1100 | nvc0_graph_mmio(priv, oclass->tpc); |
1101 | nvc0_graph_mmio(priv, oclass->ppc); | ||
1066 | 1102 | ||
1067 | nv_wr32(priv, 0x404154, 0x00000000); | 1103 | nv_wr32(priv, 0x404154, 0x00000000); |
1068 | 1104 | ||
@@ -1182,46 +1218,6 @@ done: | |||
1182 | return ret; | 1218 | return ret; |
1183 | } | 1219 | } |
1184 | 1220 | ||
1185 | struct nvc0_graph_init * | ||
1186 | nvc0_grctx_init_hub[] = { | ||
1187 | nvc0_grctx_init_base, | ||
1188 | nvc0_grctx_init_unk40xx, | ||
1189 | nvc0_grctx_init_unk44xx, | ||
1190 | nvc0_grctx_init_unk46xx, | ||
1191 | nvc0_grctx_init_unk47xx, | ||
1192 | nvc0_grctx_init_unk58xx, | ||
1193 | nvc0_grctx_init_unk60xx, | ||
1194 | nvc0_grctx_init_unk64xx, | ||
1195 | nvc0_grctx_init_unk78xx, | ||
1196 | nvc0_grctx_init_unk80xx, | ||
1197 | nvc0_grctx_init_rop, | ||
1198 | NULL | ||
1199 | }; | ||
1200 | |||
1201 | static struct nvc0_graph_init * | ||
1202 | nvc0_grctx_init_gpc[] = { | ||
1203 | nvc0_grctx_init_gpc_0, | ||
1204 | nvc0_grctx_init_gpc_1, | ||
1205 | nvc0_grctx_init_tpc, | ||
1206 | NULL | ||
1207 | }; | ||
1208 | |||
1209 | struct nvc0_graph_init | ||
1210 | nvc0_grctx_init_mthd_magic[] = { | ||
1211 | { 0x3410, 1, 0x04, 0x00000000 }, | ||
1212 | {} | ||
1213 | }; | ||
1214 | |||
1215 | struct nvc0_graph_mthd | ||
1216 | nvc0_grctx_init_mthd[] = { | ||
1217 | { 0x9097, nvc0_grctx_init_9097, }, | ||
1218 | { 0x902d, nvc0_grctx_init_902d, }, | ||
1219 | { 0x9039, nvc0_grctx_init_9039, }, | ||
1220 | { 0x90c0, nvc0_grctx_init_90c0, }, | ||
1221 | { 0x902d, nvc0_grctx_init_mthd_magic, }, | ||
1222 | {} | ||
1223 | }; | ||
1224 | |||
1225 | struct nouveau_oclass * | 1221 | struct nouveau_oclass * |
1226 | nvc0_grctx_oclass = &(struct nvc0_grctx_oclass) { | 1222 | nvc0_grctx_oclass = &(struct nvc0_grctx_oclass) { |
1227 | .base.handle = NV_ENGCTX(GR, 0xc0), | 1223 | .base.handle = NV_ENGCTX(GR, 0xc0), |
@@ -1233,11 +1229,13 @@ nvc0_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
1233 | .rd32 = _nouveau_graph_context_rd32, | 1229 | .rd32 = _nouveau_graph_context_rd32, |
1234 | .wr32 = _nouveau_graph_context_wr32, | 1230 | .wr32 = _nouveau_graph_context_wr32, |
1235 | }, | 1231 | }, |
1236 | .main = nvc0_grctx_generate_main, | 1232 | .main = nvc0_grctx_generate_main, |
1237 | .mods = nvc0_grctx_generate_mods, | 1233 | .mods = nvc0_grctx_generate_mods, |
1238 | .unkn = nvc0_grctx_generate_unkn, | 1234 | .unkn = nvc0_grctx_generate_unkn, |
1239 | .hub = nvc0_grctx_init_hub, | 1235 | .hub = nvc0_grctx_pack_hub, |
1240 | .gpc = nvc0_grctx_init_gpc, | 1236 | .gpc = nvc0_grctx_pack_gpc, |
1241 | .icmd = nvc0_grctx_init_icmd, | 1237 | .zcull = nvc0_grctx_pack_zcull, |
1242 | .mthd = nvc0_grctx_init_mthd, | 1238 | .tpc = nvc0_grctx_pack_tpc, |
1239 | .icmd = nvc0_grctx_pack_icmd, | ||
1240 | .mthd = nvc0_grctx_pack_mthd, | ||
1243 | }.base; | 1241 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h new file mode 100644 index 000000000000..0bfc17a775d4 --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h | |||
@@ -0,0 +1,124 @@ | |||
1 | #ifndef __NVKM_GRCTX_NVC0_H__ | ||
2 | #define __NVKM_GRCTX_NVC0_H__ | ||
3 | |||
4 | #include "nvc0.h" | ||
5 | |||
6 | struct nvc0_grctx { | ||
7 | struct nvc0_graph_priv *priv; | ||
8 | struct nvc0_graph_data *data; | ||
9 | struct nvc0_graph_mmio *mmio; | ||
10 | int buffer_nr; | ||
11 | u64 buffer[4]; | ||
12 | u64 addr; | ||
13 | }; | ||
14 | |||
15 | struct nvc0_grctx_oclass { | ||
16 | struct nouveau_oclass base; | ||
17 | /* main context generation function */ | ||
18 | void (*main)(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
19 | /* context-specific modify-on-first-load list generation function */ | ||
20 | void (*mods)(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
21 | void (*unkn)(struct nvc0_graph_priv *); | ||
22 | /* mmio context data */ | ||
23 | const struct nvc0_graph_pack *hub; | ||
24 | const struct nvc0_graph_pack *gpc; | ||
25 | const struct nvc0_graph_pack *zcull; | ||
26 | const struct nvc0_graph_pack *tpc; | ||
27 | const struct nvc0_graph_pack *ppc; | ||
28 | /* indirect context data, generated with icmds/mthds */ | ||
29 | const struct nvc0_graph_pack *icmd; | ||
30 | const struct nvc0_graph_pack *mthd; | ||
31 | }; | ||
32 | |||
33 | #define mmio_data(s,a,p) do { \ | ||
34 | info->buffer[info->buffer_nr] = round_up(info->addr, (a)); \ | ||
35 | info->addr = info->buffer[info->buffer_nr++] + (s); \ | ||
36 | info->data->size = (s); \ | ||
37 | info->data->align = (a); \ | ||
38 | info->data->access = (p); \ | ||
39 | info->data++; \ | ||
40 | } while(0) | ||
41 | |||
42 | #define mmio_list(r,d,s,b) do { \ | ||
43 | info->mmio->addr = (r); \ | ||
44 | info->mmio->data = (d); \ | ||
45 | info->mmio->shift = (s); \ | ||
46 | info->mmio->buffer = (b); \ | ||
47 | info->mmio++; \ | ||
48 | nv_wr32(priv, (r), (d) | ((s) ? (info->buffer[(b)] >> (s)) : 0)); \ | ||
49 | } while(0) | ||
50 | |||
51 | extern struct nouveau_oclass *nvc0_grctx_oclass; | ||
52 | int nvc0_grctx_generate(struct nvc0_graph_priv *); | ||
53 | void nvc0_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
54 | void nvc0_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
55 | void nvc0_grctx_generate_unkn(struct nvc0_graph_priv *); | ||
56 | void nvc0_grctx_generate_tpcid(struct nvc0_graph_priv *); | ||
57 | void nvc0_grctx_generate_r406028(struct nvc0_graph_priv *); | ||
58 | void nvc0_grctx_generate_r4060a8(struct nvc0_graph_priv *); | ||
59 | void nvc0_grctx_generate_r418bb8(struct nvc0_graph_priv *); | ||
60 | void nvc0_grctx_generate_r406800(struct nvc0_graph_priv *); | ||
61 | |||
62 | extern struct nouveau_oclass *nvc1_grctx_oclass; | ||
63 | void nvc1_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
64 | void nvc1_grctx_generate_unkn(struct nvc0_graph_priv *); | ||
65 | |||
66 | extern struct nouveau_oclass *nvc4_grctx_oclass; | ||
67 | extern struct nouveau_oclass *nvc8_grctx_oclass; | ||
68 | extern struct nouveau_oclass *nvd7_grctx_oclass; | ||
69 | extern struct nouveau_oclass *nvd9_grctx_oclass; | ||
70 | |||
71 | extern struct nouveau_oclass *nve4_grctx_oclass; | ||
72 | void nve4_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
73 | void nve4_grctx_generate_unkn(struct nvc0_graph_priv *); | ||
74 | void nve4_grctx_generate_r418bb8(struct nvc0_graph_priv *); | ||
75 | |||
76 | extern struct nouveau_oclass *nvf0_grctx_oclass; | ||
77 | extern struct nouveau_oclass *nv108_grctx_oclass; | ||
78 | |||
79 | /* context init value lists */ | ||
80 | |||
81 | extern const struct nvc0_graph_pack nvc0_grctx_pack_icmd[]; | ||
82 | |||
83 | extern const struct nvc0_graph_pack nvc0_grctx_pack_mthd[]; | ||
84 | extern const struct nvc0_graph_init nvc0_grctx_init_902d_0[]; | ||
85 | extern const struct nvc0_graph_init nvc0_grctx_init_9039_0[]; | ||
86 | extern const struct nvc0_graph_init nvc0_grctx_init_90c0_0[]; | ||
87 | |||
88 | extern const struct nvc0_graph_pack nvc0_grctx_pack_hub[]; | ||
89 | extern const struct nvc0_graph_init nvc0_grctx_init_main_0[]; | ||
90 | extern const struct nvc0_graph_init nvc0_grctx_init_fe_0[]; | ||
91 | extern const struct nvc0_graph_init nvc0_grctx_init_pri_0[]; | ||
92 | extern const struct nvc0_graph_init nvc0_grctx_init_memfmt_0[]; | ||
93 | extern const struct nvc0_graph_init nvc0_grctx_init_rstr2d_0[]; | ||
94 | extern const struct nvc0_graph_init nvc0_grctx_init_scc_0[]; | ||
95 | |||
96 | extern const struct nvc0_graph_pack nvc0_grctx_pack_gpc[]; | ||
97 | |||
98 | extern const struct nvc0_graph_pack nvc0_grctx_pack_zcull[]; | ||
99 | |||
100 | extern const struct nvc0_graph_pack nvc0_grctx_pack_tpc[]; | ||
101 | |||
102 | extern const struct nvc0_graph_init nvc1_grctx_init_9097_0[]; | ||
103 | |||
104 | extern const struct nvc0_graph_init nvc8_grctx_init_9197_0[]; | ||
105 | extern const struct nvc0_graph_init nvc8_grctx_init_9297_0[]; | ||
106 | |||
107 | extern const struct nvc0_graph_pack nvd9_grctx_pack_icmd[]; | ||
108 | |||
109 | extern const struct nvc0_graph_pack nvd9_grctx_pack_mthd[]; | ||
110 | |||
111 | extern const struct nvc0_graph_init nvd9_grctx_init_fe_0[]; | ||
112 | extern const struct nvc0_graph_init nvd9_grctx_init_be_0[]; | ||
113 | |||
114 | extern const struct nvc0_graph_init nve4_grctx_init_memfmt_0[]; | ||
115 | extern const struct nvc0_graph_init nve4_grctx_init_ds_0[]; | ||
116 | extern const struct nvc0_graph_init nve4_grctx_init_scc_0[]; | ||
117 | |||
118 | extern const struct nvc0_graph_pack nvf0_grctx_pack_mthd[]; | ||
119 | |||
120 | extern const struct nvc0_graph_init nvf0_grctx_init_pri_0[]; | ||
121 | extern const struct nvc0_graph_init nvf0_grctx_init_cwd_0[]; | ||
122 | |||
123 | |||
124 | #endif | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c index 71b4283f7fad..cc1ee58e54e7 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c | |||
@@ -22,10 +22,14 @@ | |||
22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | static struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nvc1_grctx_init_icmd[] = { | 28 | * PGRAPH context register lists |
29 | ******************************************************************************/ | ||
30 | |||
31 | static const struct nvc0_graph_init | ||
32 | nvc1_grctx_init_icmd_0[] = { | ||
29 | { 0x001000, 1, 0x01, 0x00000004 }, | 33 | { 0x001000, 1, 0x01, 0x00000004 }, |
30 | { 0x0000a9, 1, 0x01, 0x0000ffff }, | 34 | { 0x0000a9, 1, 0x01, 0x0000ffff }, |
31 | { 0x000038, 1, 0x01, 0x0fac6881 }, | 35 | { 0x000038, 1, 0x01, 0x0fac6881 }, |
@@ -141,8 +145,7 @@ nvc1_grctx_init_icmd[] = { | |||
141 | { 0x000586, 1, 0x01, 0x00000040 }, | 145 | { 0x000586, 1, 0x01, 0x00000040 }, |
142 | { 0x000582, 2, 0x01, 0x00000080 }, | 146 | { 0x000582, 2, 0x01, 0x00000080 }, |
143 | { 0x0005c2, 1, 0x01, 0x00000001 }, | 147 | { 0x0005c2, 1, 0x01, 0x00000001 }, |
144 | { 0x000638, 1, 0x01, 0x00000001 }, | 148 | { 0x000638, 2, 0x01, 0x00000001 }, |
145 | { 0x000639, 1, 0x01, 0x00000001 }, | ||
146 | { 0x00063a, 1, 0x01, 0x00000002 }, | 149 | { 0x00063a, 1, 0x01, 0x00000002 }, |
147 | { 0x00063b, 2, 0x01, 0x00000001 }, | 150 | { 0x00063b, 2, 0x01, 0x00000001 }, |
148 | { 0x00063d, 1, 0x01, 0x00000002 }, | 151 | { 0x00063d, 1, 0x01, 0x00000002 }, |
@@ -202,15 +205,13 @@ nvc1_grctx_init_icmd[] = { | |||
202 | { 0x000787, 1, 0x01, 0x000000cf }, | 205 | { 0x000787, 1, 0x01, 0x000000cf }, |
203 | { 0x00078c, 1, 0x01, 0x00000008 }, | 206 | { 0x00078c, 1, 0x01, 0x00000008 }, |
204 | { 0x000792, 1, 0x01, 0x00000001 }, | 207 | { 0x000792, 1, 0x01, 0x00000001 }, |
205 | { 0x000794, 1, 0x01, 0x00000001 }, | 208 | { 0x000794, 3, 0x01, 0x00000001 }, |
206 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
207 | { 0x000797, 1, 0x01, 0x000000cf }, | 209 | { 0x000797, 1, 0x01, 0x000000cf }, |
208 | { 0x000836, 1, 0x01, 0x00000001 }, | 210 | { 0x000836, 1, 0x01, 0x00000001 }, |
209 | { 0x00079a, 1, 0x01, 0x00000002 }, | 211 | { 0x00079a, 1, 0x01, 0x00000002 }, |
210 | { 0x000833, 1, 0x01, 0x04444480 }, | 212 | { 0x000833, 1, 0x01, 0x04444480 }, |
211 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 213 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
212 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 214 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
213 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
214 | { 0x000831, 1, 0x01, 0x00000004 }, | 215 | { 0x000831, 1, 0x01, 0x00000004 }, |
215 | { 0x00080c, 1, 0x01, 0x00000002 }, | 216 | { 0x00080c, 1, 0x01, 0x00000002 }, |
216 | { 0x00080d, 2, 0x01, 0x00000100 }, | 217 | { 0x00080d, 2, 0x01, 0x00000100 }, |
@@ -236,14 +237,12 @@ nvc1_grctx_init_icmd[] = { | |||
236 | { 0x0006b1, 1, 0x01, 0x00000011 }, | 237 | { 0x0006b1, 1, 0x01, 0x00000011 }, |
237 | { 0x00078c, 1, 0x01, 0x00000008 }, | 238 | { 0x00078c, 1, 0x01, 0x00000008 }, |
238 | { 0x000792, 1, 0x01, 0x00000001 }, | 239 | { 0x000792, 1, 0x01, 0x00000001 }, |
239 | { 0x000794, 1, 0x01, 0x00000001 }, | 240 | { 0x000794, 3, 0x01, 0x00000001 }, |
240 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
241 | { 0x000797, 1, 0x01, 0x000000cf }, | 241 | { 0x000797, 1, 0x01, 0x000000cf }, |
242 | { 0x00079a, 1, 0x01, 0x00000002 }, | 242 | { 0x00079a, 1, 0x01, 0x00000002 }, |
243 | { 0x000833, 1, 0x01, 0x04444480 }, | 243 | { 0x000833, 1, 0x01, 0x04444480 }, |
244 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 244 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
245 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 245 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
246 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
247 | { 0x000831, 1, 0x01, 0x00000004 }, | 246 | { 0x000831, 1, 0x01, 0x00000004 }, |
248 | { 0x01e100, 1, 0x01, 0x00000001 }, | 247 | { 0x01e100, 1, 0x01, 0x00000001 }, |
249 | { 0x001000, 1, 0x01, 0x00000014 }, | 248 | { 0x001000, 1, 0x01, 0x00000014 }, |
@@ -268,8 +267,14 @@ nvc1_grctx_init_icmd[] = { | |||
268 | {} | 267 | {} |
269 | }; | 268 | }; |
270 | 269 | ||
271 | struct nvc0_graph_init | 270 | static const struct nvc0_graph_pack |
272 | nvc1_grctx_init_9097[] = { | 271 | nvc1_grctx_pack_icmd[] = { |
272 | { nvc1_grctx_init_icmd_0 }, | ||
273 | {} | ||
274 | }; | ||
275 | |||
276 | const struct nvc0_graph_init | ||
277 | nvc1_grctx_init_9097_0[] = { | ||
273 | { 0x000800, 8, 0x40, 0x00000000 }, | 278 | { 0x000800, 8, 0x40, 0x00000000 }, |
274 | { 0x000804, 8, 0x40, 0x00000000 }, | 279 | { 0x000804, 8, 0x40, 0x00000000 }, |
275 | { 0x000808, 8, 0x40, 0x00000400 }, | 280 | { 0x000808, 8, 0x40, 0x00000400 }, |
@@ -516,8 +521,7 @@ nvc1_grctx_init_9097[] = { | |||
516 | { 0x001350, 1, 0x04, 0x00000002 }, | 521 | { 0x001350, 1, 0x04, 0x00000002 }, |
517 | { 0x001358, 1, 0x04, 0x00000001 }, | 522 | { 0x001358, 1, 0x04, 0x00000001 }, |
518 | { 0x0012e4, 1, 0x04, 0x00000000 }, | 523 | { 0x0012e4, 1, 0x04, 0x00000000 }, |
519 | { 0x00131c, 1, 0x04, 0x00000000 }, | 524 | { 0x00131c, 4, 0x04, 0x00000000 }, |
520 | { 0x001320, 3, 0x04, 0x00000000 }, | ||
521 | { 0x0019c0, 1, 0x04, 0x00000000 }, | 525 | { 0x0019c0, 1, 0x04, 0x00000000 }, |
522 | { 0x001140, 1, 0x04, 0x00000000 }, | 526 | { 0x001140, 1, 0x04, 0x00000000 }, |
523 | { 0x0019c4, 1, 0x04, 0x00000000 }, | 527 | { 0x0019c4, 1, 0x04, 0x00000000 }, |
@@ -571,15 +575,25 @@ nvc1_grctx_init_9097[] = { | |||
571 | {} | 575 | {} |
572 | }; | 576 | }; |
573 | 577 | ||
574 | static struct nvc0_graph_init | 578 | static const struct nvc0_graph_init |
575 | nvc1_grctx_init_9197[] = { | 579 | nvc1_grctx_init_9197_0[] = { |
576 | { 0x003400, 128, 0x04, 0x00000000 }, | 580 | { 0x003400, 128, 0x04, 0x00000000 }, |
577 | { 0x0002e4, 1, 0x04, 0x0000b001 }, | 581 | { 0x0002e4, 1, 0x04, 0x0000b001 }, |
578 | {} | 582 | {} |
579 | }; | 583 | }; |
580 | 584 | ||
581 | static struct nvc0_graph_init | 585 | static const struct nvc0_graph_pack |
582 | nvc1_grctx_init_unk58xx[] = { | 586 | nvc1_grctx_pack_mthd[] = { |
587 | { nvc1_grctx_init_9097_0, 0x9097 }, | ||
588 | { nvc1_grctx_init_9197_0, 0x9197 }, | ||
589 | { nvc0_grctx_init_902d_0, 0x902d }, | ||
590 | { nvc0_grctx_init_9039_0, 0x9039 }, | ||
591 | { nvc0_grctx_init_90c0_0, 0x90c0 }, | ||
592 | {} | ||
593 | }; | ||
594 | |||
595 | static const struct nvc0_graph_init | ||
596 | nvc1_grctx_init_ds_0[] = { | ||
583 | { 0x405800, 1, 0x04, 0x0f8000bf }, | 597 | { 0x405800, 1, 0x04, 0x0f8000bf }, |
584 | { 0x405830, 1, 0x04, 0x02180218 }, | 598 | { 0x405830, 1, 0x04, 0x02180218 }, |
585 | { 0x405834, 2, 0x04, 0x00000000 }, | 599 | { 0x405834, 2, 0x04, 0x00000000 }, |
@@ -590,8 +604,20 @@ nvc1_grctx_init_unk58xx[] = { | |||
590 | {} | 604 | {} |
591 | }; | 605 | }; |
592 | 606 | ||
593 | static struct nvc0_graph_init | 607 | static const struct nvc0_graph_init |
594 | nvc1_grctx_init_rop[] = { | 608 | nvc1_grctx_init_pd_0[] = { |
609 | { 0x406020, 1, 0x04, 0x000103c1 }, | ||
610 | { 0x406028, 4, 0x04, 0x00000001 }, | ||
611 | { 0x4064a8, 1, 0x04, 0x00000000 }, | ||
612 | { 0x4064ac, 1, 0x04, 0x00003fff }, | ||
613 | { 0x4064b4, 2, 0x04, 0x00000000 }, | ||
614 | { 0x4064c0, 1, 0x04, 0x80140078 }, | ||
615 | { 0x4064c4, 1, 0x04, 0x0086ffff }, | ||
616 | {} | ||
617 | }; | ||
618 | |||
619 | static const struct nvc0_graph_init | ||
620 | nvc1_grctx_init_be_0[] = { | ||
595 | { 0x408800, 1, 0x04, 0x02802a3c }, | 621 | { 0x408800, 1, 0x04, 0x02802a3c }, |
596 | { 0x408804, 1, 0x04, 0x00000040 }, | 622 | { 0x408804, 1, 0x04, 0x00000040 }, |
597 | { 0x408808, 1, 0x04, 0x1003e005 }, | 623 | { 0x408808, 1, 0x04, 0x1003e005 }, |
@@ -602,7 +628,21 @@ nvc1_grctx_init_rop[] = { | |||
602 | {} | 628 | {} |
603 | }; | 629 | }; |
604 | 630 | ||
605 | static struct nvc0_graph_init | 631 | static const struct nvc0_graph_pack |
632 | nvc1_grctx_pack_hub[] = { | ||
633 | { nvc0_grctx_init_main_0 }, | ||
634 | { nvc0_grctx_init_fe_0 }, | ||
635 | { nvc0_grctx_init_pri_0 }, | ||
636 | { nvc0_grctx_init_memfmt_0 }, | ||
637 | { nvc1_grctx_init_ds_0 }, | ||
638 | { nvc1_grctx_init_pd_0 }, | ||
639 | { nvc0_grctx_init_rstr2d_0 }, | ||
640 | { nvc0_grctx_init_scc_0 }, | ||
641 | { nvc1_grctx_init_be_0 }, | ||
642 | {} | ||
643 | }; | ||
644 | |||
645 | static const struct nvc0_graph_init | ||
606 | nvc1_grctx_init_gpc_0[] = { | 646 | nvc1_grctx_init_gpc_0[] = { |
607 | { 0x418380, 1, 0x04, 0x00000016 }, | 647 | { 0x418380, 1, 0x04, 0x00000016 }, |
608 | { 0x418400, 1, 0x04, 0x38004e00 }, | 648 | { 0x418400, 1, 0x04, 0x38004e00 }, |
@@ -633,30 +673,6 @@ nvc1_grctx_init_gpc_0[] = { | |||
633 | { 0x418924, 1, 0x04, 0x00000000 }, | 673 | { 0x418924, 1, 0x04, 0x00000000 }, |
634 | { 0x418928, 1, 0x04, 0x00ffff00 }, | 674 | { 0x418928, 1, 0x04, 0x00ffff00 }, |
635 | { 0x41892c, 1, 0x04, 0x0000ff00 }, | 675 | { 0x41892c, 1, 0x04, 0x0000ff00 }, |
636 | { 0x418a00, 3, 0x04, 0x00000000 }, | ||
637 | { 0x418a0c, 1, 0x04, 0x00010000 }, | ||
638 | { 0x418a10, 3, 0x04, 0x00000000 }, | ||
639 | { 0x418a20, 3, 0x04, 0x00000000 }, | ||
640 | { 0x418a2c, 1, 0x04, 0x00010000 }, | ||
641 | { 0x418a30, 3, 0x04, 0x00000000 }, | ||
642 | { 0x418a40, 3, 0x04, 0x00000000 }, | ||
643 | { 0x418a4c, 1, 0x04, 0x00010000 }, | ||
644 | { 0x418a50, 3, 0x04, 0x00000000 }, | ||
645 | { 0x418a60, 3, 0x04, 0x00000000 }, | ||
646 | { 0x418a6c, 1, 0x04, 0x00010000 }, | ||
647 | { 0x418a70, 3, 0x04, 0x00000000 }, | ||
648 | { 0x418a80, 3, 0x04, 0x00000000 }, | ||
649 | { 0x418a8c, 1, 0x04, 0x00010000 }, | ||
650 | { 0x418a90, 3, 0x04, 0x00000000 }, | ||
651 | { 0x418aa0, 3, 0x04, 0x00000000 }, | ||
652 | { 0x418aac, 1, 0x04, 0x00010000 }, | ||
653 | { 0x418ab0, 3, 0x04, 0x00000000 }, | ||
654 | { 0x418ac0, 3, 0x04, 0x00000000 }, | ||
655 | { 0x418acc, 1, 0x04, 0x00010000 }, | ||
656 | { 0x418ad0, 3, 0x04, 0x00000000 }, | ||
657 | { 0x418ae0, 3, 0x04, 0x00000000 }, | ||
658 | { 0x418aec, 1, 0x04, 0x00010000 }, | ||
659 | { 0x418af0, 3, 0x04, 0x00000000 }, | ||
660 | { 0x418b00, 1, 0x04, 0x00000000 }, | 676 | { 0x418b00, 1, 0x04, 0x00000000 }, |
661 | { 0x418b08, 1, 0x04, 0x0a418820 }, | 677 | { 0x418b08, 1, 0x04, 0x0a418820 }, |
662 | { 0x418b0c, 1, 0x04, 0x062080e6 }, | 678 | { 0x418b0c, 1, 0x04, 0x062080e6 }, |
@@ -676,8 +692,14 @@ nvc1_grctx_init_gpc_0[] = { | |||
676 | {} | 692 | {} |
677 | }; | 693 | }; |
678 | 694 | ||
679 | static struct nvc0_graph_init | 695 | static const struct nvc0_graph_pack |
680 | nvc1_grctx_init_tpc[] = { | 696 | nvc1_grctx_pack_gpc[] = { |
697 | { nvc1_grctx_init_gpc_0 }, | ||
698 | {} | ||
699 | }; | ||
700 | |||
701 | static const struct nvc0_graph_init | ||
702 | nvc1_grctx_init_tpc_0[] = { | ||
681 | { 0x419818, 1, 0x04, 0x00000000 }, | 703 | { 0x419818, 1, 0x04, 0x00000000 }, |
682 | { 0x41983c, 1, 0x04, 0x00038bc7 }, | 704 | { 0x41983c, 1, 0x04, 0x00038bc7 }, |
683 | { 0x419848, 1, 0x04, 0x00000000 }, | 705 | { 0x419848, 1, 0x04, 0x00000000 }, |
@@ -723,6 +745,16 @@ nvc1_grctx_init_tpc[] = { | |||
723 | {} | 745 | {} |
724 | }; | 746 | }; |
725 | 747 | ||
748 | static const struct nvc0_graph_pack | ||
749 | nvc1_grctx_pack_tpc[] = { | ||
750 | { nvc1_grctx_init_tpc_0 }, | ||
751 | {} | ||
752 | }; | ||
753 | |||
754 | /******************************************************************************* | ||
755 | * PGRAPH context implementation | ||
756 | ******************************************************************************/ | ||
757 | |||
726 | void | 758 | void |
727 | nvc1_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | 759 | nvc1_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) |
728 | { | 760 | { |
@@ -771,41 +803,6 @@ nvc1_grctx_generate_unkn(struct nvc0_graph_priv *priv) | |||
771 | nv_mask(priv, 0x419c00, 0x00000008, 0x00000008); | 803 | nv_mask(priv, 0x419c00, 0x00000008, 0x00000008); |
772 | } | 804 | } |
773 | 805 | ||
774 | static struct nvc0_graph_init * | ||
775 | nvc1_grctx_init_hub[] = { | ||
776 | nvc0_grctx_init_base, | ||
777 | nvc0_grctx_init_unk40xx, | ||
778 | nvc0_grctx_init_unk44xx, | ||
779 | nvc0_grctx_init_unk46xx, | ||
780 | nvc0_grctx_init_unk47xx, | ||
781 | nvc1_grctx_init_unk58xx, | ||
782 | nvc0_grctx_init_unk60xx, | ||
783 | nvc0_grctx_init_unk64xx, | ||
784 | nvc0_grctx_init_unk78xx, | ||
785 | nvc0_grctx_init_unk80xx, | ||
786 | nvc1_grctx_init_rop, | ||
787 | NULL | ||
788 | }; | ||
789 | |||
790 | struct nvc0_graph_init * | ||
791 | nvc1_grctx_init_gpc[] = { | ||
792 | nvc1_grctx_init_gpc_0, | ||
793 | nvc0_grctx_init_gpc_1, | ||
794 | nvc1_grctx_init_tpc, | ||
795 | NULL | ||
796 | }; | ||
797 | |||
798 | static struct nvc0_graph_mthd | ||
799 | nvc1_grctx_init_mthd[] = { | ||
800 | { 0x9097, nvc1_grctx_init_9097, }, | ||
801 | { 0x9197, nvc1_grctx_init_9197, }, | ||
802 | { 0x902d, nvc0_grctx_init_902d, }, | ||
803 | { 0x9039, nvc0_grctx_init_9039, }, | ||
804 | { 0x90c0, nvc0_grctx_init_90c0, }, | ||
805 | { 0x902d, nvc0_grctx_init_mthd_magic, }, | ||
806 | {} | ||
807 | }; | ||
808 | |||
809 | struct nouveau_oclass * | 806 | struct nouveau_oclass * |
810 | nvc1_grctx_oclass = &(struct nvc0_grctx_oclass) { | 807 | nvc1_grctx_oclass = &(struct nvc0_grctx_oclass) { |
811 | .base.handle = NV_ENGCTX(GR, 0xc1), | 808 | .base.handle = NV_ENGCTX(GR, 0xc1), |
@@ -817,11 +814,13 @@ nvc1_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
817 | .rd32 = _nouveau_graph_context_rd32, | 814 | .rd32 = _nouveau_graph_context_rd32, |
818 | .wr32 = _nouveau_graph_context_wr32, | 815 | .wr32 = _nouveau_graph_context_wr32, |
819 | }, | 816 | }, |
820 | .main = nvc0_grctx_generate_main, | 817 | .main = nvc0_grctx_generate_main, |
821 | .mods = nvc1_grctx_generate_mods, | 818 | .mods = nvc1_grctx_generate_mods, |
822 | .unkn = nvc1_grctx_generate_unkn, | 819 | .unkn = nvc1_grctx_generate_unkn, |
823 | .hub = nvc1_grctx_init_hub, | 820 | .hub = nvc1_grctx_pack_hub, |
824 | .gpc = nvc1_grctx_init_gpc, | 821 | .gpc = nvc1_grctx_pack_gpc, |
825 | .icmd = nvc1_grctx_init_icmd, | 822 | .zcull = nvc0_grctx_pack_zcull, |
826 | .mthd = nvc1_grctx_init_mthd, | 823 | .tpc = nvc1_grctx_pack_tpc, |
824 | .icmd = nvc1_grctx_pack_icmd, | ||
825 | .mthd = nvc1_grctx_pack_mthd, | ||
827 | }.base; | 826 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c index d2734163cae9..885171b2c54e 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c | |||
@@ -22,10 +22,14 @@ | |||
22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | static struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nvc4_grctx_init_tpc[] = { | 28 | * PGRAPH context register lists |
29 | ******************************************************************************/ | ||
30 | |||
31 | static const struct nvc0_graph_init | ||
32 | nvc4_grctx_init_tpc_0[] = { | ||
29 | { 0x419818, 1, 0x04, 0x00000000 }, | 33 | { 0x419818, 1, 0x04, 0x00000000 }, |
30 | { 0x41983c, 1, 0x04, 0x00038bc7 }, | 34 | { 0x41983c, 1, 0x04, 0x00038bc7 }, |
31 | { 0x419848, 1, 0x04, 0x00000000 }, | 35 | { 0x419848, 1, 0x04, 0x00000000 }, |
@@ -70,14 +74,16 @@ nvc4_grctx_init_tpc[] = { | |||
70 | {} | 74 | {} |
71 | }; | 75 | }; |
72 | 76 | ||
73 | struct nvc0_graph_init * | 77 | static const struct nvc0_graph_pack |
74 | nvc4_grctx_init_gpc[] = { | 78 | nvc4_grctx_pack_tpc[] = { |
75 | nvc0_grctx_init_gpc_0, | 79 | { nvc4_grctx_init_tpc_0 }, |
76 | nvc0_grctx_init_gpc_1, | 80 | {} |
77 | nvc4_grctx_init_tpc, | ||
78 | NULL | ||
79 | }; | 81 | }; |
80 | 82 | ||
83 | /******************************************************************************* | ||
84 | * PGRAPH context implementation | ||
85 | ******************************************************************************/ | ||
86 | |||
81 | struct nouveau_oclass * | 87 | struct nouveau_oclass * |
82 | nvc4_grctx_oclass = &(struct nvc0_grctx_oclass) { | 88 | nvc4_grctx_oclass = &(struct nvc0_grctx_oclass) { |
83 | .base.handle = NV_ENGCTX(GR, 0xc3), | 89 | .base.handle = NV_ENGCTX(GR, 0xc3), |
@@ -89,11 +95,13 @@ nvc4_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
89 | .rd32 = _nouveau_graph_context_rd32, | 95 | .rd32 = _nouveau_graph_context_rd32, |
90 | .wr32 = _nouveau_graph_context_wr32, | 96 | .wr32 = _nouveau_graph_context_wr32, |
91 | }, | 97 | }, |
92 | .main = nvc0_grctx_generate_main, | 98 | .main = nvc0_grctx_generate_main, |
93 | .mods = nvc0_grctx_generate_mods, | 99 | .mods = nvc0_grctx_generate_mods, |
94 | .unkn = nvc0_grctx_generate_unkn, | 100 | .unkn = nvc0_grctx_generate_unkn, |
95 | .hub = nvc0_grctx_init_hub, | 101 | .hub = nvc0_grctx_pack_hub, |
96 | .gpc = nvc4_grctx_init_gpc, | 102 | .gpc = nvc0_grctx_pack_gpc, |
97 | .icmd = nvc0_grctx_init_icmd, | 103 | .zcull = nvc0_grctx_pack_zcull, |
98 | .mthd = nvc0_grctx_init_mthd, | 104 | .tpc = nvc4_grctx_pack_tpc, |
105 | .icmd = nvc0_grctx_pack_icmd, | ||
106 | .mthd = nvc0_grctx_pack_mthd, | ||
99 | }.base; | 107 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c index 9a8fd6df96fb..f70bc068bb3e 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c | |||
@@ -22,10 +22,14 @@ | |||
22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | static struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nvc8_grctx_init_icmd[] = { | 28 | * PGRAPH context register lists |
29 | ******************************************************************************/ | ||
30 | |||
31 | static const struct nvc0_graph_init | ||
32 | nvc8_grctx_init_icmd_0[] = { | ||
29 | { 0x001000, 1, 0x01, 0x00000004 }, | 33 | { 0x001000, 1, 0x01, 0x00000004 }, |
30 | { 0x0000a9, 1, 0x01, 0x0000ffff }, | 34 | { 0x0000a9, 1, 0x01, 0x0000ffff }, |
31 | { 0x000038, 1, 0x01, 0x0fac6881 }, | 35 | { 0x000038, 1, 0x01, 0x0fac6881 }, |
@@ -141,8 +145,7 @@ nvc8_grctx_init_icmd[] = { | |||
141 | { 0x000586, 1, 0x01, 0x00000040 }, | 145 | { 0x000586, 1, 0x01, 0x00000040 }, |
142 | { 0x000582, 2, 0x01, 0x00000080 }, | 146 | { 0x000582, 2, 0x01, 0x00000080 }, |
143 | { 0x0005c2, 1, 0x01, 0x00000001 }, | 147 | { 0x0005c2, 1, 0x01, 0x00000001 }, |
144 | { 0x000638, 1, 0x01, 0x00000001 }, | 148 | { 0x000638, 2, 0x01, 0x00000001 }, |
145 | { 0x000639, 1, 0x01, 0x00000001 }, | ||
146 | { 0x00063a, 1, 0x01, 0x00000002 }, | 149 | { 0x00063a, 1, 0x01, 0x00000002 }, |
147 | { 0x00063b, 2, 0x01, 0x00000001 }, | 150 | { 0x00063b, 2, 0x01, 0x00000001 }, |
148 | { 0x00063d, 1, 0x01, 0x00000002 }, | 151 | { 0x00063d, 1, 0x01, 0x00000002 }, |
@@ -203,15 +206,13 @@ nvc8_grctx_init_icmd[] = { | |||
203 | { 0x000787, 1, 0x01, 0x000000cf }, | 206 | { 0x000787, 1, 0x01, 0x000000cf }, |
204 | { 0x00078c, 1, 0x01, 0x00000008 }, | 207 | { 0x00078c, 1, 0x01, 0x00000008 }, |
205 | { 0x000792, 1, 0x01, 0x00000001 }, | 208 | { 0x000792, 1, 0x01, 0x00000001 }, |
206 | { 0x000794, 1, 0x01, 0x00000001 }, | 209 | { 0x000794, 3, 0x01, 0x00000001 }, |
207 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
208 | { 0x000797, 1, 0x01, 0x000000cf }, | 210 | { 0x000797, 1, 0x01, 0x000000cf }, |
209 | { 0x000836, 1, 0x01, 0x00000001 }, | 211 | { 0x000836, 1, 0x01, 0x00000001 }, |
210 | { 0x00079a, 1, 0x01, 0x00000002 }, | 212 | { 0x00079a, 1, 0x01, 0x00000002 }, |
211 | { 0x000833, 1, 0x01, 0x04444480 }, | 213 | { 0x000833, 1, 0x01, 0x04444480 }, |
212 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 214 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
213 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 215 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
214 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
215 | { 0x000831, 1, 0x01, 0x00000004 }, | 216 | { 0x000831, 1, 0x01, 0x00000004 }, |
216 | { 0x00080c, 1, 0x01, 0x00000002 }, | 217 | { 0x00080c, 1, 0x01, 0x00000002 }, |
217 | { 0x00080d, 2, 0x01, 0x00000100 }, | 218 | { 0x00080d, 2, 0x01, 0x00000100 }, |
@@ -237,14 +238,12 @@ nvc8_grctx_init_icmd[] = { | |||
237 | { 0x0006b1, 1, 0x01, 0x00000011 }, | 238 | { 0x0006b1, 1, 0x01, 0x00000011 }, |
238 | { 0x00078c, 1, 0x01, 0x00000008 }, | 239 | { 0x00078c, 1, 0x01, 0x00000008 }, |
239 | { 0x000792, 1, 0x01, 0x00000001 }, | 240 | { 0x000792, 1, 0x01, 0x00000001 }, |
240 | { 0x000794, 1, 0x01, 0x00000001 }, | 241 | { 0x000794, 3, 0x01, 0x00000001 }, |
241 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
242 | { 0x000797, 1, 0x01, 0x000000cf }, | 242 | { 0x000797, 1, 0x01, 0x000000cf }, |
243 | { 0x00079a, 1, 0x01, 0x00000002 }, | 243 | { 0x00079a, 1, 0x01, 0x00000002 }, |
244 | { 0x000833, 1, 0x01, 0x04444480 }, | 244 | { 0x000833, 1, 0x01, 0x04444480 }, |
245 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 245 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
246 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 246 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
247 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
248 | { 0x000831, 1, 0x01, 0x00000004 }, | 247 | { 0x000831, 1, 0x01, 0x00000004 }, |
249 | { 0x01e100, 1, 0x01, 0x00000001 }, | 248 | { 0x01e100, 1, 0x01, 0x00000001 }, |
250 | { 0x001000, 1, 0x01, 0x00000014 }, | 249 | { 0x001000, 1, 0x01, 0x00000014 }, |
@@ -269,7 +268,40 @@ nvc8_grctx_init_icmd[] = { | |||
269 | {} | 268 | {} |
270 | }; | 269 | }; |
271 | 270 | ||
272 | static struct nvc0_graph_init | 271 | static const struct nvc0_graph_pack |
272 | nvc8_grctx_pack_icmd[] = { | ||
273 | { nvc8_grctx_init_icmd_0 }, | ||
274 | {} | ||
275 | }; | ||
276 | |||
277 | const struct nvc0_graph_init | ||
278 | nvc8_grctx_init_9197_0[] = { | ||
279 | { 0x0002e4, 1, 0x04, 0x0000b001 }, | ||
280 | {} | ||
281 | }; | ||
282 | |||
283 | const struct nvc0_graph_init | ||
284 | nvc8_grctx_init_9297_0[] = { | ||
285 | { 0x003400, 128, 0x04, 0x00000000 }, | ||
286 | { 0x00036c, 2, 0x04, 0x00000000 }, | ||
287 | { 0x0007a4, 2, 0x04, 0x00000000 }, | ||
288 | { 0x000374, 1, 0x04, 0x00000000 }, | ||
289 | { 0x000378, 1, 0x04, 0x00000020 }, | ||
290 | {} | ||
291 | }; | ||
292 | |||
293 | static const struct nvc0_graph_pack | ||
294 | nvc8_grctx_pack_mthd[] = { | ||
295 | { nvc1_grctx_init_9097_0, 0x9097 }, | ||
296 | { nvc8_grctx_init_9197_0, 0x9197 }, | ||
297 | { nvc8_grctx_init_9297_0, 0x9297 }, | ||
298 | { nvc0_grctx_init_902d_0, 0x902d }, | ||
299 | { nvc0_grctx_init_9039_0, 0x9039 }, | ||
300 | { nvc0_grctx_init_90c0_0, 0x90c0 }, | ||
301 | {} | ||
302 | }; | ||
303 | |||
304 | static const struct nvc0_graph_init | ||
273 | nvc8_grctx_init_gpc_0[] = { | 305 | nvc8_grctx_init_gpc_0[] = { |
274 | { 0x418380, 1, 0x04, 0x00000016 }, | 306 | { 0x418380, 1, 0x04, 0x00000016 }, |
275 | { 0x418400, 1, 0x04, 0x38004e00 }, | 307 | { 0x418400, 1, 0x04, 0x38004e00 }, |
@@ -318,41 +350,15 @@ nvc8_grctx_init_gpc_0[] = { | |||
318 | {} | 350 | {} |
319 | }; | 351 | }; |
320 | 352 | ||
321 | struct nvc0_graph_init | 353 | static const struct nvc0_graph_pack |
322 | nvc8_grctx_init_9197[] = { | 354 | nvc8_grctx_pack_gpc[] = { |
323 | { 0x0002e4, 1, 0x04, 0x0000b001 }, | 355 | { nvc8_grctx_init_gpc_0 }, |
324 | {} | ||
325 | }; | ||
326 | |||
327 | struct nvc0_graph_init | ||
328 | nvc8_grctx_init_9297[] = { | ||
329 | { 0x003400, 128, 0x04, 0x00000000 }, | ||
330 | { 0x00036c, 2, 0x04, 0x00000000 }, | ||
331 | { 0x0007a4, 2, 0x04, 0x00000000 }, | ||
332 | { 0x000374, 1, 0x04, 0x00000000 }, | ||
333 | { 0x000378, 1, 0x04, 0x00000020 }, | ||
334 | {} | ||
335 | }; | ||
336 | |||
337 | static struct nvc0_graph_mthd | ||
338 | nvc8_grctx_init_mthd[] = { | ||
339 | { 0x9097, nvc1_grctx_init_9097, }, | ||
340 | { 0x9197, nvc8_grctx_init_9197, }, | ||
341 | { 0x9297, nvc8_grctx_init_9297, }, | ||
342 | { 0x902d, nvc0_grctx_init_902d, }, | ||
343 | { 0x9039, nvc0_grctx_init_9039, }, | ||
344 | { 0x90c0, nvc0_grctx_init_90c0, }, | ||
345 | { 0x902d, nvc0_grctx_init_mthd_magic, }, | ||
346 | {} | 356 | {} |
347 | }; | 357 | }; |
348 | 358 | ||
349 | static struct nvc0_graph_init * | 359 | /******************************************************************************* |
350 | nvc8_grctx_init_gpc[] = { | 360 | * PGRAPH context implementation |
351 | nvc8_grctx_init_gpc_0, | 361 | ******************************************************************************/ |
352 | nvc0_grctx_init_gpc_1, | ||
353 | nvc0_grctx_init_tpc, | ||
354 | NULL | ||
355 | }; | ||
356 | 362 | ||
357 | struct nouveau_oclass * | 363 | struct nouveau_oclass * |
358 | nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) { | 364 | nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) { |
@@ -365,11 +371,13 @@ nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
365 | .rd32 = _nouveau_graph_context_rd32, | 371 | .rd32 = _nouveau_graph_context_rd32, |
366 | .wr32 = _nouveau_graph_context_wr32, | 372 | .wr32 = _nouveau_graph_context_wr32, |
367 | }, | 373 | }, |
368 | .main = nvc0_grctx_generate_main, | 374 | .main = nvc0_grctx_generate_main, |
369 | .mods = nvc0_grctx_generate_mods, | 375 | .mods = nvc0_grctx_generate_mods, |
370 | .unkn = nvc0_grctx_generate_unkn, | 376 | .unkn = nvc0_grctx_generate_unkn, |
371 | .hub = nvc0_grctx_init_hub, | 377 | .hub = nvc0_grctx_pack_hub, |
372 | .gpc = nvc8_grctx_init_gpc, | 378 | .gpc = nvc8_grctx_pack_gpc, |
373 | .icmd = nvc8_grctx_init_icmd, | 379 | .zcull = nvc0_grctx_pack_zcull, |
374 | .mthd = nvc8_grctx_init_mthd, | 380 | .tpc = nvc0_grctx_pack_tpc, |
381 | .icmd = nvc8_grctx_pack_icmd, | ||
382 | .mthd = nvc8_grctx_pack_mthd, | ||
375 | }.base; | 383 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c index c4740d528532..4d95394ca6b4 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c | |||
@@ -22,33 +22,14 @@ | |||
22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nvd7_grctx_init_unk40xx[] = { | 28 | * PGRAPH context register lists |
29 | { 0x404004, 10, 0x04, 0x00000000 }, | 29 | ******************************************************************************/ |
30 | { 0x404044, 1, 0x04, 0x00000000 }, | ||
31 | { 0x404094, 1, 0x04, 0x00000000 }, | ||
32 | { 0x404098, 12, 0x04, 0x00000000 }, | ||
33 | { 0x4040c8, 1, 0x04, 0xf0000087 }, | ||
34 | { 0x4040d0, 6, 0x04, 0x00000000 }, | ||
35 | { 0x4040e8, 1, 0x04, 0x00001000 }, | ||
36 | { 0x4040f8, 1, 0x04, 0x00000000 }, | ||
37 | { 0x404130, 1, 0x04, 0x00000000 }, | ||
38 | { 0x404134, 1, 0x04, 0x00000000 }, | ||
39 | { 0x404138, 1, 0x04, 0x20000040 }, | ||
40 | { 0x404150, 1, 0x04, 0x0000002e }, | ||
41 | { 0x404154, 1, 0x04, 0x00000400 }, | ||
42 | { 0x404158, 1, 0x04, 0x00000200 }, | ||
43 | { 0x404164, 1, 0x04, 0x00000055 }, | ||
44 | { 0x404168, 1, 0x04, 0x00000000 }, | ||
45 | { 0x404178, 2, 0x04, 0x00000000 }, | ||
46 | { 0x404200, 8, 0x04, 0x00000000 }, | ||
47 | {} | ||
48 | }; | ||
49 | 30 | ||
50 | static struct nvc0_graph_init | 31 | static const struct nvc0_graph_init |
51 | nvd7_grctx_init_unk58xx[] = { | 32 | nvd7_grctx_init_ds_0[] = { |
52 | { 0x405800, 1, 0x04, 0x0f8000bf }, | 33 | { 0x405800, 1, 0x04, 0x0f8000bf }, |
53 | { 0x405830, 1, 0x04, 0x02180324 }, | 34 | { 0x405830, 1, 0x04, 0x02180324 }, |
54 | { 0x405834, 1, 0x04, 0x08000000 }, | 35 | { 0x405834, 1, 0x04, 0x08000000 }, |
@@ -60,8 +41,10 @@ nvd7_grctx_init_unk58xx[] = { | |||
60 | {} | 41 | {} |
61 | }; | 42 | }; |
62 | 43 | ||
63 | static struct nvc0_graph_init | 44 | static const struct nvc0_graph_init |
64 | nvd7_grctx_init_unk64xx[] = { | 45 | nvd7_grctx_init_pd_0[] = { |
46 | { 0x406020, 1, 0x04, 0x000103c1 }, | ||
47 | { 0x406028, 4, 0x04, 0x00000001 }, | ||
65 | { 0x4064a8, 1, 0x04, 0x00000000 }, | 48 | { 0x4064a8, 1, 0x04, 0x00000000 }, |
66 | { 0x4064ac, 1, 0x04, 0x00003fff }, | 49 | { 0x4064ac, 1, 0x04, 0x00003fff }, |
67 | { 0x4064b4, 3, 0x04, 0x00000000 }, | 50 | { 0x4064b4, 3, 0x04, 0x00000000 }, |
@@ -71,7 +54,21 @@ nvd7_grctx_init_unk64xx[] = { | |||
71 | {} | 54 | {} |
72 | }; | 55 | }; |
73 | 56 | ||
74 | static struct nvc0_graph_init | 57 | static const struct nvc0_graph_pack |
58 | nvd7_grctx_pack_hub[] = { | ||
59 | { nvc0_grctx_init_main_0 }, | ||
60 | { nvd9_grctx_init_fe_0 }, | ||
61 | { nvc0_grctx_init_pri_0 }, | ||
62 | { nvc0_grctx_init_memfmt_0 }, | ||
63 | { nvd7_grctx_init_ds_0 }, | ||
64 | { nvd7_grctx_init_pd_0 }, | ||
65 | { nvc0_grctx_init_rstr2d_0 }, | ||
66 | { nvc0_grctx_init_scc_0 }, | ||
67 | { nvd9_grctx_init_be_0 }, | ||
68 | {} | ||
69 | }; | ||
70 | |||
71 | static const struct nvc0_graph_init | ||
75 | nvd7_grctx_init_gpc_0[] = { | 72 | nvd7_grctx_init_gpc_0[] = { |
76 | { 0x418380, 1, 0x04, 0x00000016 }, | 73 | { 0x418380, 1, 0x04, 0x00000016 }, |
77 | { 0x418400, 1, 0x04, 0x38004e00 }, | 74 | { 0x418400, 1, 0x04, 0x38004e00 }, |
@@ -118,8 +115,14 @@ nvd7_grctx_init_gpc_0[] = { | |||
118 | {} | 115 | {} |
119 | }; | 116 | }; |
120 | 117 | ||
121 | static struct nvc0_graph_init | 118 | static const struct nvc0_graph_pack |
122 | nvd7_grctx_init_tpc[] = { | 119 | nvd7_grctx_pack_gpc[] = { |
120 | { nvd7_grctx_init_gpc_0 }, | ||
121 | {} | ||
122 | }; | ||
123 | |||
124 | static const struct nvc0_graph_init | ||
125 | nvd7_grctx_init_tpc_0[] = { | ||
123 | { 0x419848, 1, 0x04, 0x00000000 }, | 126 | { 0x419848, 1, 0x04, 0x00000000 }, |
124 | { 0x419864, 1, 0x04, 0x00000129 }, | 127 | { 0x419864, 1, 0x04, 0x00000129 }, |
125 | { 0x419888, 1, 0x04, 0x00000000 }, | 128 | { 0x419888, 1, 0x04, 0x00000000 }, |
@@ -153,8 +156,14 @@ nvd7_grctx_init_tpc[] = { | |||
153 | {} | 156 | {} |
154 | }; | 157 | }; |
155 | 158 | ||
156 | static struct nvc0_graph_init | 159 | static const struct nvc0_graph_pack |
157 | nvd7_grctx_init_unk[] = { | 160 | nvd7_grctx_pack_tpc[] = { |
161 | { nvd7_grctx_init_tpc_0 }, | ||
162 | {} | ||
163 | }; | ||
164 | |||
165 | static const struct nvc0_graph_init | ||
166 | nvd7_grctx_init_ppc_0[] = { | ||
158 | { 0x41be24, 1, 0x04, 0x00000002 }, | 167 | { 0x41be24, 1, 0x04, 0x00000002 }, |
159 | { 0x41bec0, 1, 0x04, 0x12180000 }, | 168 | { 0x41bec0, 1, 0x04, 0x12180000 }, |
160 | { 0x41bec4, 1, 0x04, 0x00003fff }, | 169 | { 0x41bec4, 1, 0x04, 0x00003fff }, |
@@ -171,6 +180,16 @@ nvd7_grctx_init_unk[] = { | |||
171 | {} | 180 | {} |
172 | }; | 181 | }; |
173 | 182 | ||
183 | static const struct nvc0_graph_pack | ||
184 | nvd7_grctx_pack_ppc[] = { | ||
185 | { nvd7_grctx_init_ppc_0 }, | ||
186 | {} | ||
187 | }; | ||
188 | |||
189 | /******************************************************************************* | ||
190 | * PGRAPH context implementation | ||
191 | ******************************************************************************/ | ||
192 | |||
174 | static void | 193 | static void |
175 | nvd7_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | 194 | nvd7_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) |
176 | { | 195 | { |
@@ -219,10 +238,11 @@ nvd7_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
219 | 238 | ||
220 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); | 239 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); |
221 | 240 | ||
222 | for (i = 0; oclass->hub[i]; i++) | 241 | nvc0_graph_mmio(priv, oclass->hub); |
223 | nvc0_graph_mmio(priv, oclass->hub[i]); | 242 | nvc0_graph_mmio(priv, oclass->gpc); |
224 | for (i = 0; oclass->gpc[i]; i++) | 243 | nvc0_graph_mmio(priv, oclass->zcull); |
225 | nvc0_graph_mmio(priv, oclass->gpc[i]); | 244 | nvc0_graph_mmio(priv, oclass->tpc); |
245 | nvc0_graph_mmio(priv, oclass->ppc); | ||
226 | 246 | ||
227 | nv_wr32(priv, 0x404154, 0x00000000); | 247 | nv_wr32(priv, 0x404154, 0x00000000); |
228 | 248 | ||
@@ -244,32 +264,6 @@ nvd7_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
244 | nv_mask(priv, 0x000260, 0x00000001, 0x00000001); | 264 | nv_mask(priv, 0x000260, 0x00000001, 0x00000001); |
245 | } | 265 | } |
246 | 266 | ||
247 | |||
248 | static struct nvc0_graph_init * | ||
249 | nvd7_grctx_init_hub[] = { | ||
250 | nvc0_grctx_init_base, | ||
251 | nvd7_grctx_init_unk40xx, | ||
252 | nvc0_grctx_init_unk44xx, | ||
253 | nvc0_grctx_init_unk46xx, | ||
254 | nvc0_grctx_init_unk47xx, | ||
255 | nvd7_grctx_init_unk58xx, | ||
256 | nvc0_grctx_init_unk60xx, | ||
257 | nvd7_grctx_init_unk64xx, | ||
258 | nvc0_grctx_init_unk78xx, | ||
259 | nvc0_grctx_init_unk80xx, | ||
260 | nvd9_grctx_init_rop, | ||
261 | NULL | ||
262 | }; | ||
263 | |||
264 | struct nvc0_graph_init * | ||
265 | nvd7_grctx_init_gpc[] = { | ||
266 | nvd7_grctx_init_gpc_0, | ||
267 | nvc0_grctx_init_gpc_1, | ||
268 | nvd7_grctx_init_tpc, | ||
269 | nvd7_grctx_init_unk, | ||
270 | NULL | ||
271 | }; | ||
272 | |||
273 | struct nouveau_oclass * | 267 | struct nouveau_oclass * |
274 | nvd7_grctx_oclass = &(struct nvc0_grctx_oclass) { | 268 | nvd7_grctx_oclass = &(struct nvc0_grctx_oclass) { |
275 | .base.handle = NV_ENGCTX(GR, 0xd7), | 269 | .base.handle = NV_ENGCTX(GR, 0xd7), |
@@ -281,11 +275,14 @@ nvd7_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
281 | .rd32 = _nouveau_graph_context_rd32, | 275 | .rd32 = _nouveau_graph_context_rd32, |
282 | .wr32 = _nouveau_graph_context_wr32, | 276 | .wr32 = _nouveau_graph_context_wr32, |
283 | }, | 277 | }, |
284 | .main = nvd7_grctx_generate_main, | 278 | .main = nvd7_grctx_generate_main, |
285 | .mods = nvd7_grctx_generate_mods, | 279 | .mods = nvd7_grctx_generate_mods, |
286 | .unkn = nve4_grctx_generate_unkn, | 280 | .unkn = nve4_grctx_generate_unkn, |
287 | .hub = nvd7_grctx_init_hub, | 281 | .hub = nvd7_grctx_pack_hub, |
288 | .gpc = nvd7_grctx_init_gpc, | 282 | .gpc = nvd7_grctx_pack_gpc, |
289 | .icmd = nvd9_grctx_init_icmd, | 283 | .zcull = nvc0_grctx_pack_zcull, |
290 | .mthd = nvd9_grctx_init_mthd, | 284 | .tpc = nvd7_grctx_pack_tpc, |
285 | .ppc = nvd7_grctx_pack_ppc, | ||
286 | .icmd = nvd9_grctx_pack_icmd, | ||
287 | .mthd = nvd9_grctx_pack_mthd, | ||
291 | }.base; | 288 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c index d8a2361cd98a..7c6400ffc51f 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c | |||
@@ -22,38 +22,14 @@ | |||
22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nvd9_grctx_init_90c0[] = { | 28 | * PGRAPH context register lists |
29 | { 0x002700, 4, 0x40, 0x00000000 }, | 29 | ******************************************************************************/ |
30 | { 0x002720, 4, 0x40, 0x00000000 }, | ||
31 | { 0x002704, 4, 0x40, 0x00000000 }, | ||
32 | { 0x002724, 4, 0x40, 0x00000000 }, | ||
33 | { 0x002708, 4, 0x40, 0x00000000 }, | ||
34 | { 0x002728, 4, 0x40, 0x00000000 }, | ||
35 | { 0x00270c, 8, 0x20, 0x00000000 }, | ||
36 | { 0x002710, 4, 0x40, 0x00014000 }, | ||
37 | { 0x002730, 4, 0x40, 0x00014000 }, | ||
38 | { 0x002714, 4, 0x40, 0x00000040 }, | ||
39 | { 0x002734, 4, 0x40, 0x00000040 }, | ||
40 | { 0x00030c, 1, 0x04, 0x00000001 }, | ||
41 | { 0x001944, 1, 0x04, 0x00000000 }, | ||
42 | { 0x000758, 1, 0x04, 0x00000100 }, | ||
43 | { 0x0002c4, 1, 0x04, 0x00000000 }, | ||
44 | { 0x000790, 5, 0x04, 0x00000000 }, | ||
45 | { 0x00077c, 1, 0x04, 0x00000000 }, | ||
46 | { 0x000204, 3, 0x04, 0x00000000 }, | ||
47 | { 0x000214, 1, 0x04, 0x00000000 }, | ||
48 | { 0x00024c, 1, 0x04, 0x00000000 }, | ||
49 | { 0x000d94, 1, 0x04, 0x00000001 }, | ||
50 | { 0x001608, 2, 0x04, 0x00000000 }, | ||
51 | { 0x001664, 1, 0x04, 0x00000000 }, | ||
52 | {} | ||
53 | }; | ||
54 | 30 | ||
55 | struct nvc0_graph_init | 31 | static const struct nvc0_graph_init |
56 | nvd9_grctx_init_icmd[] = { | 32 | nvd9_grctx_init_icmd_0[] = { |
57 | { 0x001000, 1, 0x01, 0x00000004 }, | 33 | { 0x001000, 1, 0x01, 0x00000004 }, |
58 | { 0x0000a9, 1, 0x01, 0x0000ffff }, | 34 | { 0x0000a9, 1, 0x01, 0x0000ffff }, |
59 | { 0x000038, 1, 0x01, 0x0fac6881 }, | 35 | { 0x000038, 1, 0x01, 0x0fac6881 }, |
@@ -171,8 +147,7 @@ nvd9_grctx_init_icmd[] = { | |||
171 | { 0x000586, 1, 0x01, 0x00000040 }, | 147 | { 0x000586, 1, 0x01, 0x00000040 }, |
172 | { 0x000582, 2, 0x01, 0x00000080 }, | 148 | { 0x000582, 2, 0x01, 0x00000080 }, |
173 | { 0x0005c2, 1, 0x01, 0x00000001 }, | 149 | { 0x0005c2, 1, 0x01, 0x00000001 }, |
174 | { 0x000638, 1, 0x01, 0x00000001 }, | 150 | { 0x000638, 2, 0x01, 0x00000001 }, |
175 | { 0x000639, 1, 0x01, 0x00000001 }, | ||
176 | { 0x00063a, 1, 0x01, 0x00000002 }, | 151 | { 0x00063a, 1, 0x01, 0x00000002 }, |
177 | { 0x00063b, 2, 0x01, 0x00000001 }, | 152 | { 0x00063b, 2, 0x01, 0x00000001 }, |
178 | { 0x00063d, 1, 0x01, 0x00000002 }, | 153 | { 0x00063d, 1, 0x01, 0x00000002 }, |
@@ -233,15 +208,13 @@ nvd9_grctx_init_icmd[] = { | |||
233 | { 0x000787, 1, 0x01, 0x000000cf }, | 208 | { 0x000787, 1, 0x01, 0x000000cf }, |
234 | { 0x00078c, 1, 0x01, 0x00000008 }, | 209 | { 0x00078c, 1, 0x01, 0x00000008 }, |
235 | { 0x000792, 1, 0x01, 0x00000001 }, | 210 | { 0x000792, 1, 0x01, 0x00000001 }, |
236 | { 0x000794, 1, 0x01, 0x00000001 }, | 211 | { 0x000794, 3, 0x01, 0x00000001 }, |
237 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
238 | { 0x000797, 1, 0x01, 0x000000cf }, | 212 | { 0x000797, 1, 0x01, 0x000000cf }, |
239 | { 0x000836, 1, 0x01, 0x00000001 }, | 213 | { 0x000836, 1, 0x01, 0x00000001 }, |
240 | { 0x00079a, 1, 0x01, 0x00000002 }, | 214 | { 0x00079a, 1, 0x01, 0x00000002 }, |
241 | { 0x000833, 1, 0x01, 0x04444480 }, | 215 | { 0x000833, 1, 0x01, 0x04444480 }, |
242 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 216 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
243 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 217 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
244 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
245 | { 0x000831, 1, 0x01, 0x00000004 }, | 218 | { 0x000831, 1, 0x01, 0x00000004 }, |
246 | { 0x00080c, 1, 0x01, 0x00000002 }, | 219 | { 0x00080c, 1, 0x01, 0x00000002 }, |
247 | { 0x00080d, 2, 0x01, 0x00000100 }, | 220 | { 0x00080d, 2, 0x01, 0x00000100 }, |
@@ -267,14 +240,12 @@ nvd9_grctx_init_icmd[] = { | |||
267 | { 0x0006b1, 1, 0x01, 0x00000011 }, | 240 | { 0x0006b1, 1, 0x01, 0x00000011 }, |
268 | { 0x00078c, 1, 0x01, 0x00000008 }, | 241 | { 0x00078c, 1, 0x01, 0x00000008 }, |
269 | { 0x000792, 1, 0x01, 0x00000001 }, | 242 | { 0x000792, 1, 0x01, 0x00000001 }, |
270 | { 0x000794, 1, 0x01, 0x00000001 }, | 243 | { 0x000794, 3, 0x01, 0x00000001 }, |
271 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
272 | { 0x000797, 1, 0x01, 0x000000cf }, | 244 | { 0x000797, 1, 0x01, 0x000000cf }, |
273 | { 0x00079a, 1, 0x01, 0x00000002 }, | 245 | { 0x00079a, 1, 0x01, 0x00000002 }, |
274 | { 0x000833, 1, 0x01, 0x04444480 }, | 246 | { 0x000833, 1, 0x01, 0x04444480 }, |
275 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 247 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
276 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 248 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
277 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
278 | { 0x000831, 1, 0x01, 0x00000004 }, | 249 | { 0x000831, 1, 0x01, 0x00000004 }, |
279 | { 0x01e100, 1, 0x01, 0x00000001 }, | 250 | { 0x01e100, 1, 0x01, 0x00000001 }, |
280 | { 0x001000, 1, 0x01, 0x00000014 }, | 251 | { 0x001000, 1, 0x01, 0x00000014 }, |
@@ -299,18 +270,56 @@ nvd9_grctx_init_icmd[] = { | |||
299 | {} | 270 | {} |
300 | }; | 271 | }; |
301 | 272 | ||
302 | struct nvc0_graph_init | 273 | const struct nvc0_graph_pack |
303 | nvd9_grctx_init_unk40xx[] = { | 274 | nvd9_grctx_pack_icmd[] = { |
304 | { 0x404004, 11, 0x04, 0x00000000 }, | 275 | { nvd9_grctx_init_icmd_0 }, |
276 | {} | ||
277 | }; | ||
278 | |||
279 | static const struct nvc0_graph_init | ||
280 | nvd9_grctx_init_90c0_0[] = { | ||
281 | { 0x002700, 8, 0x20, 0x00000000 }, | ||
282 | { 0x002704, 8, 0x20, 0x00000000 }, | ||
283 | { 0x002708, 8, 0x20, 0x00000000 }, | ||
284 | { 0x00270c, 8, 0x20, 0x00000000 }, | ||
285 | { 0x002710, 8, 0x20, 0x00014000 }, | ||
286 | { 0x002714, 8, 0x20, 0x00000040 }, | ||
287 | { 0x00030c, 1, 0x04, 0x00000001 }, | ||
288 | { 0x001944, 1, 0x04, 0x00000000 }, | ||
289 | { 0x000758, 1, 0x04, 0x00000100 }, | ||
290 | { 0x0002c4, 1, 0x04, 0x00000000 }, | ||
291 | { 0x000790, 5, 0x04, 0x00000000 }, | ||
292 | { 0x00077c, 1, 0x04, 0x00000000 }, | ||
293 | { 0x000204, 3, 0x04, 0x00000000 }, | ||
294 | { 0x000214, 1, 0x04, 0x00000000 }, | ||
295 | { 0x00024c, 1, 0x04, 0x00000000 }, | ||
296 | { 0x000d94, 1, 0x04, 0x00000001 }, | ||
297 | { 0x001608, 2, 0x04, 0x00000000 }, | ||
298 | { 0x001664, 1, 0x04, 0x00000000 }, | ||
299 | {} | ||
300 | }; | ||
301 | |||
302 | const struct nvc0_graph_pack | ||
303 | nvd9_grctx_pack_mthd[] = { | ||
304 | { nvc1_grctx_init_9097_0, 0x9097 }, | ||
305 | { nvc8_grctx_init_9197_0, 0x9197 }, | ||
306 | { nvc8_grctx_init_9297_0, 0x9297 }, | ||
307 | { nvc0_grctx_init_902d_0, 0x902d }, | ||
308 | { nvc0_grctx_init_9039_0, 0x9039 }, | ||
309 | { nvd9_grctx_init_90c0_0, 0x90c0 }, | ||
310 | {} | ||
311 | }; | ||
312 | |||
313 | const struct nvc0_graph_init | ||
314 | nvd9_grctx_init_fe_0[] = { | ||
315 | { 0x404004, 10, 0x04, 0x00000000 }, | ||
305 | { 0x404044, 1, 0x04, 0x00000000 }, | 316 | { 0x404044, 1, 0x04, 0x00000000 }, |
306 | { 0x404094, 1, 0x04, 0x00000000 }, | 317 | { 0x404094, 13, 0x04, 0x00000000 }, |
307 | { 0x404098, 12, 0x04, 0x00000000 }, | ||
308 | { 0x4040c8, 1, 0x04, 0xf0000087 }, | 318 | { 0x4040c8, 1, 0x04, 0xf0000087 }, |
309 | { 0x4040d0, 6, 0x04, 0x00000000 }, | 319 | { 0x4040d0, 6, 0x04, 0x00000000 }, |
310 | { 0x4040e8, 1, 0x04, 0x00001000 }, | 320 | { 0x4040e8, 1, 0x04, 0x00001000 }, |
311 | { 0x4040f8, 1, 0x04, 0x00000000 }, | 321 | { 0x4040f8, 1, 0x04, 0x00000000 }, |
312 | { 0x404130, 1, 0x04, 0x00000000 }, | 322 | { 0x404130, 2, 0x04, 0x00000000 }, |
313 | { 0x404134, 1, 0x04, 0x00000000 }, | ||
314 | { 0x404138, 1, 0x04, 0x20000040 }, | 323 | { 0x404138, 1, 0x04, 0x20000040 }, |
315 | { 0x404150, 1, 0x04, 0x0000002e }, | 324 | { 0x404150, 1, 0x04, 0x0000002e }, |
316 | { 0x404154, 1, 0x04, 0x00000400 }, | 325 | { 0x404154, 1, 0x04, 0x00000400 }, |
@@ -322,8 +331,8 @@ nvd9_grctx_init_unk40xx[] = { | |||
322 | {} | 331 | {} |
323 | }; | 332 | }; |
324 | 333 | ||
325 | static struct nvc0_graph_init | 334 | static const struct nvc0_graph_init |
326 | nvd9_grctx_init_unk58xx[] = { | 335 | nvd9_grctx_init_ds_0[] = { |
327 | { 0x405800, 1, 0x04, 0x0f8000bf }, | 336 | { 0x405800, 1, 0x04, 0x0f8000bf }, |
328 | { 0x405830, 1, 0x04, 0x02180218 }, | 337 | { 0x405830, 1, 0x04, 0x02180218 }, |
329 | { 0x405834, 1, 0x04, 0x08000000 }, | 338 | { 0x405834, 1, 0x04, 0x08000000 }, |
@@ -335,8 +344,10 @@ nvd9_grctx_init_unk58xx[] = { | |||
335 | {} | 344 | {} |
336 | }; | 345 | }; |
337 | 346 | ||
338 | static struct nvc0_graph_init | 347 | static const struct nvc0_graph_init |
339 | nvd9_grctx_init_unk64xx[] = { | 348 | nvd9_grctx_init_pd_0[] = { |
349 | { 0x406020, 1, 0x04, 0x000103c1 }, | ||
350 | { 0x406028, 4, 0x04, 0x00000001 }, | ||
340 | { 0x4064a8, 1, 0x04, 0x00000000 }, | 351 | { 0x4064a8, 1, 0x04, 0x00000000 }, |
341 | { 0x4064ac, 1, 0x04, 0x00003fff }, | 352 | { 0x4064ac, 1, 0x04, 0x00003fff }, |
342 | { 0x4064b4, 3, 0x04, 0x00000000 }, | 353 | { 0x4064b4, 3, 0x04, 0x00000000 }, |
@@ -345,8 +356,8 @@ nvd9_grctx_init_unk64xx[] = { | |||
345 | {} | 356 | {} |
346 | }; | 357 | }; |
347 | 358 | ||
348 | struct nvc0_graph_init | 359 | const struct nvc0_graph_init |
349 | nvd9_grctx_init_rop[] = { | 360 | nvd9_grctx_init_be_0[] = { |
350 | { 0x408800, 1, 0x04, 0x02802a3c }, | 361 | { 0x408800, 1, 0x04, 0x02802a3c }, |
351 | { 0x408804, 1, 0x04, 0x00000040 }, | 362 | { 0x408804, 1, 0x04, 0x00000040 }, |
352 | { 0x408808, 1, 0x04, 0x1043e005 }, | 363 | { 0x408808, 1, 0x04, 0x1043e005 }, |
@@ -357,7 +368,21 @@ nvd9_grctx_init_rop[] = { | |||
357 | {} | 368 | {} |
358 | }; | 369 | }; |
359 | 370 | ||
360 | static struct nvc0_graph_init | 371 | static const struct nvc0_graph_pack |
372 | nvd9_grctx_pack_hub[] = { | ||
373 | { nvc0_grctx_init_main_0 }, | ||
374 | { nvd9_grctx_init_fe_0 }, | ||
375 | { nvc0_grctx_init_pri_0 }, | ||
376 | { nvc0_grctx_init_memfmt_0 }, | ||
377 | { nvd9_grctx_init_ds_0 }, | ||
378 | { nvd9_grctx_init_pd_0 }, | ||
379 | { nvc0_grctx_init_rstr2d_0 }, | ||
380 | { nvc0_grctx_init_scc_0 }, | ||
381 | { nvd9_grctx_init_be_0 }, | ||
382 | {} | ||
383 | }; | ||
384 | |||
385 | static const struct nvc0_graph_init | ||
361 | nvd9_grctx_init_gpc_0[] = { | 386 | nvd9_grctx_init_gpc_0[] = { |
362 | { 0x418380, 1, 0x04, 0x00000016 }, | 387 | { 0x418380, 1, 0x04, 0x00000016 }, |
363 | { 0x418400, 1, 0x04, 0x38004e00 }, | 388 | { 0x418400, 1, 0x04, 0x38004e00 }, |
@@ -404,8 +429,14 @@ nvd9_grctx_init_gpc_0[] = { | |||
404 | {} | 429 | {} |
405 | }; | 430 | }; |
406 | 431 | ||
407 | static struct nvc0_graph_init | 432 | static const struct nvc0_graph_pack |
408 | nvd9_grctx_init_tpc[] = { | 433 | nvd9_grctx_pack_gpc[] = { |
434 | { nvd9_grctx_init_gpc_0 }, | ||
435 | {} | ||
436 | }; | ||
437 | |||
438 | static const struct nvc0_graph_init | ||
439 | nvd9_grctx_init_tpc_0[] = { | ||
409 | { 0x419818, 1, 0x04, 0x00000000 }, | 440 | { 0x419818, 1, 0x04, 0x00000000 }, |
410 | { 0x41983c, 1, 0x04, 0x00038bc7 }, | 441 | { 0x41983c, 1, 0x04, 0x00038bc7 }, |
411 | { 0x419848, 1, 0x04, 0x00000000 }, | 442 | { 0x419848, 1, 0x04, 0x00000000 }, |
@@ -453,47 +484,15 @@ nvd9_grctx_init_tpc[] = { | |||
453 | {} | 484 | {} |
454 | }; | 485 | }; |
455 | 486 | ||
456 | static struct nvc0_graph_init * | 487 | static const struct nvc0_graph_pack |
457 | nvd9_grctx_init_hub[] = { | 488 | nvd9_grctx_pack_tpc[] = { |
458 | nvc0_grctx_init_base, | 489 | { nvd9_grctx_init_tpc_0 }, |
459 | nvd9_grctx_init_unk40xx, | ||
460 | nvc0_grctx_init_unk44xx, | ||
461 | nvc0_grctx_init_unk46xx, | ||
462 | nvc0_grctx_init_unk47xx, | ||
463 | nvd9_grctx_init_unk58xx, | ||
464 | nvc0_grctx_init_unk60xx, | ||
465 | nvd9_grctx_init_unk64xx, | ||
466 | nvc0_grctx_init_unk78xx, | ||
467 | nvc0_grctx_init_unk80xx, | ||
468 | nvd9_grctx_init_rop, | ||
469 | NULL | ||
470 | }; | ||
471 | |||
472 | struct nvc0_graph_init * | ||
473 | nvd9_grctx_init_gpc[] = { | ||
474 | nvd9_grctx_init_gpc_0, | ||
475 | nvc0_grctx_init_gpc_1, | ||
476 | nvd9_grctx_init_tpc, | ||
477 | NULL | ||
478 | }; | ||
479 | |||
480 | struct nvc0_graph_init | ||
481 | nvd9_grctx_init_mthd_magic[] = { | ||
482 | { 0x3410, 1, 0x04, 0x80002006 }, | ||
483 | {} | 490 | {} |
484 | }; | 491 | }; |
485 | 492 | ||
486 | struct nvc0_graph_mthd | 493 | /******************************************************************************* |
487 | nvd9_grctx_init_mthd[] = { | 494 | * PGRAPH context implementation |
488 | { 0x9097, nvc1_grctx_init_9097, }, | 495 | ******************************************************************************/ |
489 | { 0x9197, nvc8_grctx_init_9197, }, | ||
490 | { 0x9297, nvc8_grctx_init_9297, }, | ||
491 | { 0x902d, nvc0_grctx_init_902d, }, | ||
492 | { 0x9039, nvc0_grctx_init_9039, }, | ||
493 | { 0x90c0, nvd9_grctx_init_90c0, }, | ||
494 | { 0x902d, nvd9_grctx_init_mthd_magic, }, | ||
495 | {} | ||
496 | }; | ||
497 | 496 | ||
498 | struct nouveau_oclass * | 497 | struct nouveau_oclass * |
499 | nvd9_grctx_oclass = &(struct nvc0_grctx_oclass) { | 498 | nvd9_grctx_oclass = &(struct nvc0_grctx_oclass) { |
@@ -506,11 +505,13 @@ nvd9_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
506 | .rd32 = _nouveau_graph_context_rd32, | 505 | .rd32 = _nouveau_graph_context_rd32, |
507 | .wr32 = _nouveau_graph_context_wr32, | 506 | .wr32 = _nouveau_graph_context_wr32, |
508 | }, | 507 | }, |
509 | .main = nvc0_grctx_generate_main, | 508 | .main = nvc0_grctx_generate_main, |
510 | .mods = nvc1_grctx_generate_mods, | 509 | .mods = nvc1_grctx_generate_mods, |
511 | .unkn = nvc1_grctx_generate_unkn, | 510 | .unkn = nvc1_grctx_generate_unkn, |
512 | .hub = nvd9_grctx_init_hub, | 511 | .hub = nvd9_grctx_pack_hub, |
513 | .gpc = nvd9_grctx_init_gpc, | 512 | .gpc = nvd9_grctx_pack_gpc, |
514 | .icmd = nvd9_grctx_init_icmd, | 513 | .zcull = nvc0_grctx_pack_zcull, |
515 | .mthd = nvd9_grctx_init_mthd, | 514 | .tpc = nvd9_grctx_pack_tpc, |
515 | .icmd = nvd9_grctx_pack_icmd, | ||
516 | .mthd = nvd9_grctx_pack_mthd, | ||
516 | }.base; | 517 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c index aa9b358340af..01f82d5701dd 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c | |||
@@ -22,10 +22,14 @@ | |||
22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nve4_grctx_init_icmd[] = { | 28 | * PGRAPH context register lists |
29 | ******************************************************************************/ | ||
30 | |||
31 | static const struct nvc0_graph_init | ||
32 | nve4_grctx_init_icmd_0[] = { | ||
29 | { 0x001000, 1, 0x01, 0x00000004 }, | 33 | { 0x001000, 1, 0x01, 0x00000004 }, |
30 | { 0x000039, 3, 0x01, 0x00000000 }, | 34 | { 0x000039, 3, 0x01, 0x00000000 }, |
31 | { 0x0000a9, 1, 0x01, 0x0000ffff }, | 35 | { 0x0000a9, 1, 0x01, 0x0000ffff }, |
@@ -138,8 +142,7 @@ nve4_grctx_init_icmd[] = { | |||
138 | { 0x000586, 1, 0x01, 0x00000040 }, | 142 | { 0x000586, 1, 0x01, 0x00000040 }, |
139 | { 0x000582, 2, 0x01, 0x00000080 }, | 143 | { 0x000582, 2, 0x01, 0x00000080 }, |
140 | { 0x0005c2, 1, 0x01, 0x00000001 }, | 144 | { 0x0005c2, 1, 0x01, 0x00000001 }, |
141 | { 0x000638, 1, 0x01, 0x00000001 }, | 145 | { 0x000638, 2, 0x01, 0x00000001 }, |
142 | { 0x000639, 1, 0x01, 0x00000001 }, | ||
143 | { 0x00063a, 1, 0x01, 0x00000002 }, | 146 | { 0x00063a, 1, 0x01, 0x00000002 }, |
144 | { 0x00063b, 2, 0x01, 0x00000001 }, | 147 | { 0x00063b, 2, 0x01, 0x00000001 }, |
145 | { 0x00063d, 1, 0x01, 0x00000002 }, | 148 | { 0x00063d, 1, 0x01, 0x00000002 }, |
@@ -197,15 +200,13 @@ nve4_grctx_init_icmd[] = { | |||
197 | { 0x000787, 1, 0x01, 0x000000cf }, | 200 | { 0x000787, 1, 0x01, 0x000000cf }, |
198 | { 0x00078c, 1, 0x01, 0x00000008 }, | 201 | { 0x00078c, 1, 0x01, 0x00000008 }, |
199 | { 0x000792, 1, 0x01, 0x00000001 }, | 202 | { 0x000792, 1, 0x01, 0x00000001 }, |
200 | { 0x000794, 1, 0x01, 0x00000001 }, | 203 | { 0x000794, 3, 0x01, 0x00000001 }, |
201 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
202 | { 0x000797, 1, 0x01, 0x000000cf }, | 204 | { 0x000797, 1, 0x01, 0x000000cf }, |
203 | { 0x000836, 1, 0x01, 0x00000001 }, | 205 | { 0x000836, 1, 0x01, 0x00000001 }, |
204 | { 0x00079a, 1, 0x01, 0x00000002 }, | 206 | { 0x00079a, 1, 0x01, 0x00000002 }, |
205 | { 0x000833, 1, 0x01, 0x04444480 }, | 207 | { 0x000833, 1, 0x01, 0x04444480 }, |
206 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 208 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
207 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 209 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
208 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
209 | { 0x000831, 1, 0x01, 0x00000004 }, | 210 | { 0x000831, 1, 0x01, 0x00000004 }, |
210 | { 0x000b07, 1, 0x01, 0x00000002 }, | 211 | { 0x000b07, 1, 0x01, 0x00000002 }, |
211 | { 0x000b08, 2, 0x01, 0x00000100 }, | 212 | { 0x000b08, 2, 0x01, 0x00000100 }, |
@@ -231,14 +232,12 @@ nve4_grctx_init_icmd[] = { | |||
231 | { 0x0006b1, 1, 0x01, 0x00000011 }, | 232 | { 0x0006b1, 1, 0x01, 0x00000011 }, |
232 | { 0x00078c, 1, 0x01, 0x00000008 }, | 233 | { 0x00078c, 1, 0x01, 0x00000008 }, |
233 | { 0x000792, 1, 0x01, 0x00000001 }, | 234 | { 0x000792, 1, 0x01, 0x00000001 }, |
234 | { 0x000794, 1, 0x01, 0x00000001 }, | 235 | { 0x000794, 3, 0x01, 0x00000001 }, |
235 | { 0x000795, 2, 0x01, 0x00000001 }, | ||
236 | { 0x000797, 1, 0x01, 0x000000cf }, | 236 | { 0x000797, 1, 0x01, 0x000000cf }, |
237 | { 0x00079a, 1, 0x01, 0x00000002 }, | 237 | { 0x00079a, 1, 0x01, 0x00000002 }, |
238 | { 0x000833, 1, 0x01, 0x04444480 }, | 238 | { 0x000833, 1, 0x01, 0x04444480 }, |
239 | { 0x0007a1, 1, 0x01, 0x00000001 }, | 239 | { 0x0007a1, 1, 0x01, 0x00000001 }, |
240 | { 0x0007a3, 1, 0x01, 0x00000001 }, | 240 | { 0x0007a3, 3, 0x01, 0x00000001 }, |
241 | { 0x0007a4, 2, 0x01, 0x00000001 }, | ||
242 | { 0x000831, 1, 0x01, 0x00000004 }, | 241 | { 0x000831, 1, 0x01, 0x00000004 }, |
243 | { 0x01e100, 1, 0x01, 0x00000001 }, | 242 | { 0x01e100, 1, 0x01, 0x00000001 }, |
244 | { 0x001000, 1, 0x01, 0x00000008 }, | 243 | { 0x001000, 1, 0x01, 0x00000008 }, |
@@ -273,8 +272,14 @@ nve4_grctx_init_icmd[] = { | |||
273 | {} | 272 | {} |
274 | }; | 273 | }; |
275 | 274 | ||
276 | struct nvc0_graph_init | 275 | static const struct nvc0_graph_pack |
277 | nve4_grctx_init_a097[] = { | 276 | nve4_grctx_pack_icmd[] = { |
277 | { nve4_grctx_init_icmd_0 }, | ||
278 | {} | ||
279 | }; | ||
280 | |||
281 | static const struct nvc0_graph_init | ||
282 | nve4_grctx_init_a097_0[] = { | ||
278 | { 0x000800, 8, 0x40, 0x00000000 }, | 283 | { 0x000800, 8, 0x40, 0x00000000 }, |
279 | { 0x000804, 8, 0x40, 0x00000000 }, | 284 | { 0x000804, 8, 0x40, 0x00000000 }, |
280 | { 0x000808, 8, 0x40, 0x00000400 }, | 285 | { 0x000808, 8, 0x40, 0x00000400 }, |
@@ -517,8 +522,7 @@ nve4_grctx_init_a097[] = { | |||
517 | { 0x001350, 1, 0x04, 0x00000002 }, | 522 | { 0x001350, 1, 0x04, 0x00000002 }, |
518 | { 0x001358, 1, 0x04, 0x00000001 }, | 523 | { 0x001358, 1, 0x04, 0x00000001 }, |
519 | { 0x0012e4, 1, 0x04, 0x00000000 }, | 524 | { 0x0012e4, 1, 0x04, 0x00000000 }, |
520 | { 0x00131c, 1, 0x04, 0x00000000 }, | 525 | { 0x00131c, 4, 0x04, 0x00000000 }, |
521 | { 0x001320, 3, 0x04, 0x00000000 }, | ||
522 | { 0x0019c0, 1, 0x04, 0x00000000 }, | 526 | { 0x0019c0, 1, 0x04, 0x00000000 }, |
523 | { 0x001140, 1, 0x04, 0x00000000 }, | 527 | { 0x001140, 1, 0x04, 0x00000000 }, |
524 | { 0x0019c4, 1, 0x04, 0x00000000 }, | 528 | { 0x0019c4, 1, 0x04, 0x00000000 }, |
@@ -574,19 +578,24 @@ nve4_grctx_init_a097[] = { | |||
574 | {} | 578 | {} |
575 | }; | 579 | }; |
576 | 580 | ||
577 | static struct nvc0_graph_init | 581 | static const struct nvc0_graph_pack |
578 | nve4_grctx_init_unk40xx[] = { | 582 | nve4_grctx_pack_mthd[] = { |
583 | { nve4_grctx_init_a097_0, 0xa097 }, | ||
584 | { nvc0_grctx_init_902d_0, 0x902d }, | ||
585 | {} | ||
586 | }; | ||
587 | |||
588 | static const struct nvc0_graph_init | ||
589 | nve4_grctx_init_fe_0[] = { | ||
579 | { 0x404010, 5, 0x04, 0x00000000 }, | 590 | { 0x404010, 5, 0x04, 0x00000000 }, |
580 | { 0x404024, 1, 0x04, 0x0000e000 }, | 591 | { 0x404024, 1, 0x04, 0x0000e000 }, |
581 | { 0x404028, 1, 0x04, 0x00000000 }, | 592 | { 0x404028, 1, 0x04, 0x00000000 }, |
582 | { 0x4040a8, 1, 0x04, 0x00000000 }, | 593 | { 0x4040a8, 8, 0x04, 0x00000000 }, |
583 | { 0x4040ac, 7, 0x04, 0x00000000 }, | ||
584 | { 0x4040c8, 1, 0x04, 0xf800008f }, | 594 | { 0x4040c8, 1, 0x04, 0xf800008f }, |
585 | { 0x4040d0, 6, 0x04, 0x00000000 }, | 595 | { 0x4040d0, 6, 0x04, 0x00000000 }, |
586 | { 0x4040e8, 1, 0x04, 0x00001000 }, | 596 | { 0x4040e8, 1, 0x04, 0x00001000 }, |
587 | { 0x4040f8, 1, 0x04, 0x00000000 }, | 597 | { 0x4040f8, 1, 0x04, 0x00000000 }, |
588 | { 0x404130, 1, 0x04, 0x00000000 }, | 598 | { 0x404130, 2, 0x04, 0x00000000 }, |
589 | { 0x404134, 1, 0x04, 0x00000000 }, | ||
590 | { 0x404138, 1, 0x04, 0x20000040 }, | 599 | { 0x404138, 1, 0x04, 0x20000040 }, |
591 | { 0x404150, 1, 0x04, 0x0000002e }, | 600 | { 0x404150, 1, 0x04, 0x0000002e }, |
592 | { 0x404154, 1, 0x04, 0x00000400 }, | 601 | { 0x404154, 1, 0x04, 0x00000400 }, |
@@ -597,8 +606,8 @@ nve4_grctx_init_unk40xx[] = { | |||
597 | {} | 606 | {} |
598 | }; | 607 | }; |
599 | 608 | ||
600 | struct nvc0_graph_init | 609 | const struct nvc0_graph_init |
601 | nve4_grctx_init_unk46xx[] = { | 610 | nve4_grctx_init_memfmt_0[] = { |
602 | { 0x404604, 1, 0x04, 0x00000014 }, | 611 | { 0x404604, 1, 0x04, 0x00000014 }, |
603 | { 0x404608, 1, 0x04, 0x00000000 }, | 612 | { 0x404608, 1, 0x04, 0x00000000 }, |
604 | { 0x40460c, 1, 0x04, 0x00003fff }, | 613 | { 0x40460c, 1, 0x04, 0x00003fff }, |
@@ -614,11 +623,6 @@ nve4_grctx_init_unk46xx[] = { | |||
614 | { 0x4046a0, 1, 0x04, 0x007f0080 }, | 623 | { 0x4046a0, 1, 0x04, 0x007f0080 }, |
615 | { 0x4046a4, 8, 0x04, 0x00000000 }, | 624 | { 0x4046a4, 8, 0x04, 0x00000000 }, |
616 | { 0x4046c8, 3, 0x04, 0x00000000 }, | 625 | { 0x4046c8, 3, 0x04, 0x00000000 }, |
617 | {} | ||
618 | }; | ||
619 | |||
620 | struct nvc0_graph_init | ||
621 | nve4_grctx_init_unk47xx[] = { | ||
622 | { 0x404700, 3, 0x04, 0x00000000 }, | 626 | { 0x404700, 3, 0x04, 0x00000000 }, |
623 | { 0x404718, 7, 0x04, 0x00000000 }, | 627 | { 0x404718, 7, 0x04, 0x00000000 }, |
624 | { 0x404734, 1, 0x04, 0x00000100 }, | 628 | { 0x404734, 1, 0x04, 0x00000100 }, |
@@ -628,8 +632,8 @@ nve4_grctx_init_unk47xx[] = { | |||
628 | {} | 632 | {} |
629 | }; | 633 | }; |
630 | 634 | ||
631 | struct nvc0_graph_init | 635 | const struct nvc0_graph_init |
632 | nve4_grctx_init_unk58xx[] = { | 636 | nve4_grctx_init_ds_0[] = { |
633 | { 0x405800, 1, 0x04, 0x0f8000bf }, | 637 | { 0x405800, 1, 0x04, 0x0f8000bf }, |
634 | { 0x405830, 1, 0x04, 0x02180648 }, | 638 | { 0x405830, 1, 0x04, 0x02180648 }, |
635 | { 0x405834, 1, 0x04, 0x08000000 }, | 639 | { 0x405834, 1, 0x04, 0x08000000 }, |
@@ -641,22 +645,17 @@ nve4_grctx_init_unk58xx[] = { | |||
641 | {} | 645 | {} |
642 | }; | 646 | }; |
643 | 647 | ||
644 | static struct nvc0_graph_init | 648 | static const struct nvc0_graph_init |
645 | nve4_grctx_init_unk5bxx[] = { | 649 | nve4_grctx_init_cwd_0[] = { |
646 | { 0x405b00, 1, 0x04, 0x00000000 }, | 650 | { 0x405b00, 1, 0x04, 0x00000000 }, |
647 | { 0x405b10, 1, 0x04, 0x00001000 }, | 651 | { 0x405b10, 1, 0x04, 0x00001000 }, |
648 | {} | 652 | {} |
649 | }; | 653 | }; |
650 | 654 | ||
651 | static struct nvc0_graph_init | 655 | static const struct nvc0_graph_init |
652 | nve4_grctx_init_unk60xx[] = { | 656 | nve4_grctx_init_pd_0[] = { |
653 | { 0x406020, 1, 0x04, 0x004103c1 }, | 657 | { 0x406020, 1, 0x04, 0x004103c1 }, |
654 | { 0x406028, 4, 0x04, 0x00000001 }, | 658 | { 0x406028, 4, 0x04, 0x00000001 }, |
655 | {} | ||
656 | }; | ||
657 | |||
658 | static struct nvc0_graph_init | ||
659 | nve4_grctx_init_unk64xx[] = { | ||
660 | { 0x4064a8, 1, 0x04, 0x00000000 }, | 659 | { 0x4064a8, 1, 0x04, 0x00000000 }, |
661 | { 0x4064ac, 1, 0x04, 0x00003fff }, | 660 | { 0x4064ac, 1, 0x04, 0x00003fff }, |
662 | { 0x4064b4, 2, 0x04, 0x00000000 }, | 661 | { 0x4064b4, 2, 0x04, 0x00000000 }, |
@@ -668,14 +667,14 @@ nve4_grctx_init_unk64xx[] = { | |||
668 | {} | 667 | {} |
669 | }; | 668 | }; |
670 | 669 | ||
671 | static struct nvc0_graph_init | 670 | static const struct nvc0_graph_init |
672 | nve4_grctx_init_unk70xx[] = { | 671 | nve4_grctx_init_sked_0[] = { |
673 | { 0x407040, 1, 0x04, 0x00000000 }, | 672 | { 0x407040, 1, 0x04, 0x00000000 }, |
674 | {} | 673 | {} |
675 | }; | 674 | }; |
676 | 675 | ||
677 | struct nvc0_graph_init | 676 | const struct nvc0_graph_init |
678 | nve4_grctx_init_unk80xx[] = { | 677 | nve4_grctx_init_scc_0[] = { |
679 | { 0x408000, 2, 0x04, 0x00000000 }, | 678 | { 0x408000, 2, 0x04, 0x00000000 }, |
680 | { 0x408008, 1, 0x04, 0x00000030 }, | 679 | { 0x408008, 1, 0x04, 0x00000030 }, |
681 | { 0x40800c, 2, 0x04, 0x00000000 }, | 680 | { 0x40800c, 2, 0x04, 0x00000000 }, |
@@ -685,8 +684,8 @@ nve4_grctx_init_unk80xx[] = { | |||
685 | {} | 684 | {} |
686 | }; | 685 | }; |
687 | 686 | ||
688 | static struct nvc0_graph_init | 687 | static const struct nvc0_graph_init |
689 | nve4_grctx_init_rop[] = { | 688 | nve4_grctx_init_be_0[] = { |
690 | { 0x408800, 1, 0x04, 0x02802a3c }, | 689 | { 0x408800, 1, 0x04, 0x02802a3c }, |
691 | { 0x408804, 1, 0x04, 0x00000040 }, | 690 | { 0x408804, 1, 0x04, 0x00000040 }, |
692 | { 0x408808, 1, 0x04, 0x1043e005 }, | 691 | { 0x408808, 1, 0x04, 0x1043e005 }, |
@@ -698,7 +697,23 @@ nve4_grctx_init_rop[] = { | |||
698 | {} | 697 | {} |
699 | }; | 698 | }; |
700 | 699 | ||
701 | static struct nvc0_graph_init | 700 | static const struct nvc0_graph_pack |
701 | nve4_grctx_pack_hub[] = { | ||
702 | { nvc0_grctx_init_main_0 }, | ||
703 | { nve4_grctx_init_fe_0 }, | ||
704 | { nvc0_grctx_init_pri_0 }, | ||
705 | { nve4_grctx_init_memfmt_0 }, | ||
706 | { nve4_grctx_init_ds_0 }, | ||
707 | { nve4_grctx_init_cwd_0 }, | ||
708 | { nve4_grctx_init_pd_0 }, | ||
709 | { nve4_grctx_init_sked_0 }, | ||
710 | { nvc0_grctx_init_rstr2d_0 }, | ||
711 | { nve4_grctx_init_scc_0 }, | ||
712 | { nve4_grctx_init_be_0 }, | ||
713 | {} | ||
714 | }; | ||
715 | |||
716 | static const struct nvc0_graph_init | ||
702 | nve4_grctx_init_gpc_0[] = { | 717 | nve4_grctx_init_gpc_0[] = { |
703 | { 0x418380, 1, 0x04, 0x00000016 }, | 718 | { 0x418380, 1, 0x04, 0x00000016 }, |
704 | { 0x418400, 1, 0x04, 0x38004e00 }, | 719 | { 0x418400, 1, 0x04, 0x38004e00 }, |
@@ -746,8 +761,14 @@ nve4_grctx_init_gpc_0[] = { | |||
746 | {} | 761 | {} |
747 | }; | 762 | }; |
748 | 763 | ||
749 | static struct nvc0_graph_init | 764 | static const struct nvc0_graph_pack |
750 | nve4_grctx_init_tpc[] = { | 765 | nve4_grctx_pack_gpc[] = { |
766 | { nve4_grctx_init_gpc_0 }, | ||
767 | {} | ||
768 | }; | ||
769 | |||
770 | static const struct nvc0_graph_init | ||
771 | nve4_grctx_init_tpc_0[] = { | ||
751 | { 0x419848, 1, 0x04, 0x00000000 }, | 772 | { 0x419848, 1, 0x04, 0x00000000 }, |
752 | { 0x419864, 1, 0x04, 0x00000129 }, | 773 | { 0x419864, 1, 0x04, 0x00000129 }, |
753 | { 0x419888, 1, 0x04, 0x00000000 }, | 774 | { 0x419888, 1, 0x04, 0x00000000 }, |
@@ -786,8 +807,14 @@ nve4_grctx_init_tpc[] = { | |||
786 | {} | 807 | {} |
787 | }; | 808 | }; |
788 | 809 | ||
789 | static struct nvc0_graph_init | 810 | static const struct nvc0_graph_pack |
790 | nve4_grctx_init_unk[] = { | 811 | nve4_grctx_pack_tpc[] = { |
812 | { nve4_grctx_init_tpc_0 }, | ||
813 | {} | ||
814 | }; | ||
815 | |||
816 | static const struct nvc0_graph_init | ||
817 | nve4_grctx_init_ppc_0[] = { | ||
791 | { 0x41be24, 1, 0x04, 0x00000006 }, | 818 | { 0x41be24, 1, 0x04, 0x00000006 }, |
792 | { 0x41bec0, 1, 0x04, 0x12180000 }, | 819 | { 0x41bec0, 1, 0x04, 0x12180000 }, |
793 | { 0x41bec4, 1, 0x04, 0x00037f7f }, | 820 | { 0x41bec4, 1, 0x04, 0x00037f7f }, |
@@ -804,6 +831,16 @@ nve4_grctx_init_unk[] = { | |||
804 | {} | 831 | {} |
805 | }; | 832 | }; |
806 | 833 | ||
834 | static const struct nvc0_graph_pack | ||
835 | nve4_grctx_pack_ppc[] = { | ||
836 | { nve4_grctx_init_ppc_0 }, | ||
837 | {} | ||
838 | }; | ||
839 | |||
840 | /******************************************************************************* | ||
841 | * PGRAPH context implementation | ||
842 | ******************************************************************************/ | ||
843 | |||
807 | static void | 844 | static void |
808 | nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | 845 | nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) |
809 | { | 846 | { |
@@ -925,10 +962,11 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
925 | 962 | ||
926 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); | 963 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); |
927 | 964 | ||
928 | for (i = 0; oclass->hub[i]; i++) | 965 | nvc0_graph_mmio(priv, oclass->hub); |
929 | nvc0_graph_mmio(priv, oclass->hub[i]); | 966 | nvc0_graph_mmio(priv, oclass->gpc); |
930 | for (i = 0; oclass->gpc[i]; i++) | 967 | nvc0_graph_mmio(priv, oclass->zcull); |
931 | nvc0_graph_mmio(priv, oclass->gpc[i]); | 968 | nvc0_graph_mmio(priv, oclass->tpc); |
969 | nvc0_graph_mmio(priv, oclass->ppc); | ||
932 | 970 | ||
933 | nv_wr32(priv, 0x404154, 0x00000000); | 971 | nv_wr32(priv, 0x404154, 0x00000000); |
934 | 972 | ||
@@ -962,41 +1000,6 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
962 | nv_mask(priv, 0x41be10, 0x00800000, 0x00800000); | 1000 | nv_mask(priv, 0x41be10, 0x00800000, 0x00800000); |
963 | } | 1001 | } |
964 | 1002 | ||
965 | static struct nvc0_graph_init * | ||
966 | nve4_grctx_init_hub[] = { | ||
967 | nvc0_grctx_init_base, | ||
968 | nve4_grctx_init_unk40xx, | ||
969 | nvc0_grctx_init_unk44xx, | ||
970 | nve4_grctx_init_unk46xx, | ||
971 | nve4_grctx_init_unk47xx, | ||
972 | nve4_grctx_init_unk58xx, | ||
973 | nve4_grctx_init_unk5bxx, | ||
974 | nve4_grctx_init_unk60xx, | ||
975 | nve4_grctx_init_unk64xx, | ||
976 | nve4_grctx_init_unk70xx, | ||
977 | nvc0_grctx_init_unk78xx, | ||
978 | nve4_grctx_init_unk80xx, | ||
979 | nve4_grctx_init_rop, | ||
980 | NULL | ||
981 | }; | ||
982 | |||
983 | struct nvc0_graph_init * | ||
984 | nve4_grctx_init_gpc[] = { | ||
985 | nve4_grctx_init_gpc_0, | ||
986 | nvc0_grctx_init_gpc_1, | ||
987 | nve4_grctx_init_tpc, | ||
988 | nve4_grctx_init_unk, | ||
989 | NULL | ||
990 | }; | ||
991 | |||
992 | static struct nvc0_graph_mthd | ||
993 | nve4_grctx_init_mthd[] = { | ||
994 | { 0xa097, nve4_grctx_init_a097, }, | ||
995 | { 0x902d, nvc0_grctx_init_902d, }, | ||
996 | { 0x902d, nvc0_grctx_init_mthd_magic, }, | ||
997 | {} | ||
998 | }; | ||
999 | |||
1000 | struct nouveau_oclass * | 1003 | struct nouveau_oclass * |
1001 | nve4_grctx_oclass = &(struct nvc0_grctx_oclass) { | 1004 | nve4_grctx_oclass = &(struct nvc0_grctx_oclass) { |
1002 | .base.handle = NV_ENGCTX(GR, 0xe4), | 1005 | .base.handle = NV_ENGCTX(GR, 0xe4), |
@@ -1008,11 +1011,14 @@ nve4_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
1008 | .rd32 = _nouveau_graph_context_rd32, | 1011 | .rd32 = _nouveau_graph_context_rd32, |
1009 | .wr32 = _nouveau_graph_context_wr32, | 1012 | .wr32 = _nouveau_graph_context_wr32, |
1010 | }, | 1013 | }, |
1011 | .main = nve4_grctx_generate_main, | 1014 | .main = nve4_grctx_generate_main, |
1012 | .mods = nve4_grctx_generate_mods, | 1015 | .mods = nve4_grctx_generate_mods, |
1013 | .unkn = nve4_grctx_generate_unkn, | 1016 | .unkn = nve4_grctx_generate_unkn, |
1014 | .hub = nve4_grctx_init_hub, | 1017 | .hub = nve4_grctx_pack_hub, |
1015 | .gpc = nve4_grctx_init_gpc, | 1018 | .gpc = nve4_grctx_pack_gpc, |
1016 | .icmd = nve4_grctx_init_icmd, | 1019 | .zcull = nvc0_grctx_pack_zcull, |
1017 | .mthd = nve4_grctx_init_mthd, | 1020 | .tpc = nve4_grctx_pack_tpc, |
1021 | .ppc = nve4_grctx_pack_ppc, | ||
1022 | .icmd = nve4_grctx_pack_icmd, | ||
1023 | .mthd = nve4_grctx_pack_mthd, | ||
1018 | }.base; | 1024 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c index 9582677b90f2..5864b557081b 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c | |||
@@ -22,10 +22,580 @@ | |||
22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "ctxnvc0.h" |
26 | 26 | ||
27 | static struct nvc0_graph_init | 27 | /******************************************************************************* |
28 | nvf0_grctx_init_unk40xx[] = { | 28 | * PGRAPH context register lists |
29 | ******************************************************************************/ | ||
30 | |||
31 | static const struct nvc0_graph_init | ||
32 | nvf0_grctx_init_icmd_0[] = { | ||
33 | { 0x001000, 1, 0x01, 0x00000004 }, | ||
34 | { 0x000039, 3, 0x01, 0x00000000 }, | ||
35 | { 0x0000a9, 1, 0x01, 0x0000ffff }, | ||
36 | { 0x000038, 1, 0x01, 0x0fac6881 }, | ||
37 | { 0x00003d, 1, 0x01, 0x00000001 }, | ||
38 | { 0x0000e8, 8, 0x01, 0x00000400 }, | ||
39 | { 0x000078, 8, 0x01, 0x00000300 }, | ||
40 | { 0x000050, 1, 0x01, 0x00000011 }, | ||
41 | { 0x000058, 8, 0x01, 0x00000008 }, | ||
42 | { 0x000208, 8, 0x01, 0x00000001 }, | ||
43 | { 0x000081, 1, 0x01, 0x00000001 }, | ||
44 | { 0x000085, 1, 0x01, 0x00000004 }, | ||
45 | { 0x000088, 1, 0x01, 0x00000400 }, | ||
46 | { 0x000090, 1, 0x01, 0x00000300 }, | ||
47 | { 0x000098, 1, 0x01, 0x00001001 }, | ||
48 | { 0x0000e3, 1, 0x01, 0x00000001 }, | ||
49 | { 0x0000da, 1, 0x01, 0x00000001 }, | ||
50 | { 0x0000f8, 1, 0x01, 0x00000003 }, | ||
51 | { 0x0000fa, 1, 0x01, 0x00000001 }, | ||
52 | { 0x00009f, 4, 0x01, 0x0000ffff }, | ||
53 | { 0x0000b1, 1, 0x01, 0x00000001 }, | ||
54 | { 0x0000ad, 1, 0x01, 0x0000013e }, | ||
55 | { 0x0000e1, 1, 0x01, 0x00000010 }, | ||
56 | { 0x000290, 16, 0x01, 0x00000000 }, | ||
57 | { 0x0003b0, 16, 0x01, 0x00000000 }, | ||
58 | { 0x0002a0, 16, 0x01, 0x00000000 }, | ||
59 | { 0x000420, 16, 0x01, 0x00000000 }, | ||
60 | { 0x0002b0, 16, 0x01, 0x00000000 }, | ||
61 | { 0x000430, 16, 0x01, 0x00000000 }, | ||
62 | { 0x0002c0, 16, 0x01, 0x00000000 }, | ||
63 | { 0x0004d0, 16, 0x01, 0x00000000 }, | ||
64 | { 0x000720, 16, 0x01, 0x00000000 }, | ||
65 | { 0x0008c0, 16, 0x01, 0x00000000 }, | ||
66 | { 0x000890, 16, 0x01, 0x00000000 }, | ||
67 | { 0x0008e0, 16, 0x01, 0x00000000 }, | ||
68 | { 0x0008a0, 16, 0x01, 0x00000000 }, | ||
69 | { 0x0008f0, 16, 0x01, 0x00000000 }, | ||
70 | { 0x00094c, 1, 0x01, 0x000000ff }, | ||
71 | { 0x00094d, 1, 0x01, 0xffffffff }, | ||
72 | { 0x00094e, 1, 0x01, 0x00000002 }, | ||
73 | { 0x0002ec, 1, 0x01, 0x00000001 }, | ||
74 | { 0x0002f2, 2, 0x01, 0x00000001 }, | ||
75 | { 0x0002f5, 1, 0x01, 0x00000001 }, | ||
76 | { 0x0002f7, 1, 0x01, 0x00000001 }, | ||
77 | { 0x000303, 1, 0x01, 0x00000001 }, | ||
78 | { 0x0002e6, 1, 0x01, 0x00000001 }, | ||
79 | { 0x000466, 1, 0x01, 0x00000052 }, | ||
80 | { 0x000301, 1, 0x01, 0x3f800000 }, | ||
81 | { 0x000304, 1, 0x01, 0x30201000 }, | ||
82 | { 0x000305, 1, 0x01, 0x70605040 }, | ||
83 | { 0x000306, 1, 0x01, 0xb8a89888 }, | ||
84 | { 0x000307, 1, 0x01, 0xf8e8d8c8 }, | ||
85 | { 0x00030a, 1, 0x01, 0x00ffff00 }, | ||
86 | { 0x00030b, 1, 0x01, 0x0000001a }, | ||
87 | { 0x00030c, 1, 0x01, 0x00000001 }, | ||
88 | { 0x000318, 1, 0x01, 0x00000001 }, | ||
89 | { 0x000340, 1, 0x01, 0x00000000 }, | ||
90 | { 0x000375, 1, 0x01, 0x00000001 }, | ||
91 | { 0x00037d, 1, 0x01, 0x00000006 }, | ||
92 | { 0x0003a0, 1, 0x01, 0x00000002 }, | ||
93 | { 0x0003aa, 1, 0x01, 0x00000001 }, | ||
94 | { 0x0003a9, 1, 0x01, 0x00000001 }, | ||
95 | { 0x000380, 1, 0x01, 0x00000001 }, | ||
96 | { 0x000383, 1, 0x01, 0x00000011 }, | ||
97 | { 0x000360, 1, 0x01, 0x00000040 }, | ||
98 | { 0x000366, 2, 0x01, 0x00000000 }, | ||
99 | { 0x000368, 1, 0x01, 0x00000fff }, | ||
100 | { 0x000370, 2, 0x01, 0x00000000 }, | ||
101 | { 0x000372, 1, 0x01, 0x000fffff }, | ||
102 | { 0x00037a, 1, 0x01, 0x00000012 }, | ||
103 | { 0x000619, 1, 0x01, 0x00000003 }, | ||
104 | { 0x000811, 1, 0x01, 0x00000003 }, | ||
105 | { 0x000812, 1, 0x01, 0x00000004 }, | ||
106 | { 0x000813, 1, 0x01, 0x00000006 }, | ||
107 | { 0x000814, 1, 0x01, 0x00000008 }, | ||
108 | { 0x000815, 1, 0x01, 0x0000000b }, | ||
109 | { 0x000800, 6, 0x01, 0x00000001 }, | ||
110 | { 0x000632, 1, 0x01, 0x00000001 }, | ||
111 | { 0x000633, 1, 0x01, 0x00000002 }, | ||
112 | { 0x000634, 1, 0x01, 0x00000003 }, | ||
113 | { 0x000635, 1, 0x01, 0x00000004 }, | ||
114 | { 0x000654, 1, 0x01, 0x3f800000 }, | ||
115 | { 0x000657, 1, 0x01, 0x3f800000 }, | ||
116 | { 0x000655, 2, 0x01, 0x3f800000 }, | ||
117 | { 0x0006cd, 1, 0x01, 0x3f800000 }, | ||
118 | { 0x0007f5, 1, 0x01, 0x3f800000 }, | ||
119 | { 0x0007dc, 1, 0x01, 0x39291909 }, | ||
120 | { 0x0007dd, 1, 0x01, 0x79695949 }, | ||
121 | { 0x0007de, 1, 0x01, 0xb9a99989 }, | ||
122 | { 0x0007df, 1, 0x01, 0xf9e9d9c9 }, | ||
123 | { 0x0007e8, 1, 0x01, 0x00003210 }, | ||
124 | { 0x0007e9, 1, 0x01, 0x00007654 }, | ||
125 | { 0x0007ea, 1, 0x01, 0x00000098 }, | ||
126 | { 0x0007ec, 1, 0x01, 0x39291909 }, | ||
127 | { 0x0007ed, 1, 0x01, 0x79695949 }, | ||
128 | { 0x0007ee, 1, 0x01, 0xb9a99989 }, | ||
129 | { 0x0007ef, 1, 0x01, 0xf9e9d9c9 }, | ||
130 | { 0x0007f0, 1, 0x01, 0x00003210 }, | ||
131 | { 0x0007f1, 1, 0x01, 0x00007654 }, | ||
132 | { 0x0007f2, 1, 0x01, 0x00000098 }, | ||
133 | { 0x0005a5, 1, 0x01, 0x00000001 }, | ||
134 | { 0x000980, 128, 0x01, 0x00000000 }, | ||
135 | { 0x000468, 1, 0x01, 0x00000004 }, | ||
136 | { 0x00046c, 1, 0x01, 0x00000001 }, | ||
137 | { 0x000470, 96, 0x01, 0x00000000 }, | ||
138 | { 0x000510, 16, 0x01, 0x3f800000 }, | ||
139 | { 0x000520, 1, 0x01, 0x000002b6 }, | ||
140 | { 0x000529, 1, 0x01, 0x00000001 }, | ||
141 | { 0x000530, 16, 0x01, 0xffff0000 }, | ||
142 | { 0x000585, 1, 0x01, 0x0000003f }, | ||
143 | { 0x000576, 1, 0x01, 0x00000003 }, | ||
144 | { 0x00057b, 1, 0x01, 0x00000059 }, | ||
145 | { 0x000586, 1, 0x01, 0x00000040 }, | ||
146 | { 0x000582, 2, 0x01, 0x00000080 }, | ||
147 | { 0x0005c2, 1, 0x01, 0x00000001 }, | ||
148 | { 0x000638, 2, 0x01, 0x00000001 }, | ||
149 | { 0x00063a, 1, 0x01, 0x00000002 }, | ||
150 | { 0x00063b, 2, 0x01, 0x00000001 }, | ||
151 | { 0x00063d, 1, 0x01, 0x00000002 }, | ||
152 | { 0x00063e, 1, 0x01, 0x00000001 }, | ||
153 | { 0x0008b8, 8, 0x01, 0x00000001 }, | ||
154 | { 0x000900, 8, 0x01, 0x00000001 }, | ||
155 | { 0x000908, 8, 0x01, 0x00000002 }, | ||
156 | { 0x000910, 16, 0x01, 0x00000001 }, | ||
157 | { 0x000920, 8, 0x01, 0x00000002 }, | ||
158 | { 0x000928, 8, 0x01, 0x00000001 }, | ||
159 | { 0x000662, 1, 0x01, 0x00000001 }, | ||
160 | { 0x000648, 9, 0x01, 0x00000001 }, | ||
161 | { 0x000658, 1, 0x01, 0x0000000f }, | ||
162 | { 0x0007ff, 1, 0x01, 0x0000000a }, | ||
163 | { 0x00066a, 1, 0x01, 0x40000000 }, | ||
164 | { 0x00066b, 1, 0x01, 0x10000000 }, | ||
165 | { 0x00066c, 2, 0x01, 0xffff0000 }, | ||
166 | { 0x0007af, 2, 0x01, 0x00000008 }, | ||
167 | { 0x0007f6, 1, 0x01, 0x00000001 }, | ||
168 | { 0x00080b, 1, 0x01, 0x00000002 }, | ||
169 | { 0x0006b2, 1, 0x01, 0x00000055 }, | ||
170 | { 0x0007ad, 1, 0x01, 0x00000003 }, | ||
171 | { 0x000937, 1, 0x01, 0x00000001 }, | ||
172 | { 0x000971, 1, 0x01, 0x00000008 }, | ||
173 | { 0x000972, 1, 0x01, 0x00000040 }, | ||
174 | { 0x000973, 1, 0x01, 0x0000012c }, | ||
175 | { 0x00097c, 1, 0x01, 0x00000040 }, | ||
176 | { 0x000979, 1, 0x01, 0x00000003 }, | ||
177 | { 0x000975, 1, 0x01, 0x00000020 }, | ||
178 | { 0x000976, 1, 0x01, 0x00000001 }, | ||
179 | { 0x000977, 1, 0x01, 0x00000020 }, | ||
180 | { 0x000978, 1, 0x01, 0x00000001 }, | ||
181 | { 0x000957, 1, 0x01, 0x00000003 }, | ||
182 | { 0x00095e, 1, 0x01, 0x20164010 }, | ||
183 | { 0x00095f, 1, 0x01, 0x00000020 }, | ||
184 | { 0x000a0d, 1, 0x01, 0x00000006 }, | ||
185 | { 0x00097d, 1, 0x01, 0x00000020 }, | ||
186 | { 0x000683, 1, 0x01, 0x00000006 }, | ||
187 | { 0x000685, 1, 0x01, 0x003fffff }, | ||
188 | { 0x000687, 1, 0x01, 0x003fffff }, | ||
189 | { 0x0006a0, 1, 0x01, 0x00000005 }, | ||
190 | { 0x000840, 1, 0x01, 0x00400008 }, | ||
191 | { 0x000841, 1, 0x01, 0x08000080 }, | ||
192 | { 0x000842, 1, 0x01, 0x00400008 }, | ||
193 | { 0x000843, 1, 0x01, 0x08000080 }, | ||
194 | { 0x0006aa, 1, 0x01, 0x00000001 }, | ||
195 | { 0x0006ab, 1, 0x01, 0x00000002 }, | ||
196 | { 0x0006ac, 1, 0x01, 0x00000080 }, | ||
197 | { 0x0006ad, 2, 0x01, 0x00000100 }, | ||
198 | { 0x0006b1, 1, 0x01, 0x00000011 }, | ||
199 | { 0x0006bb, 1, 0x01, 0x000000cf }, | ||
200 | { 0x0006ce, 1, 0x01, 0x2a712488 }, | ||
201 | { 0x000739, 1, 0x01, 0x4085c000 }, | ||
202 | { 0x00073a, 1, 0x01, 0x00000080 }, | ||
203 | { 0x000786, 1, 0x01, 0x80000100 }, | ||
204 | { 0x00073c, 1, 0x01, 0x00010100 }, | ||
205 | { 0x00073d, 1, 0x01, 0x02800000 }, | ||
206 | { 0x000787, 1, 0x01, 0x000000cf }, | ||
207 | { 0x00078c, 1, 0x01, 0x00000008 }, | ||
208 | { 0x000792, 1, 0x01, 0x00000001 }, | ||
209 | { 0x000794, 3, 0x01, 0x00000001 }, | ||
210 | { 0x000797, 1, 0x01, 0x000000cf }, | ||
211 | { 0x000836, 1, 0x01, 0x00000001 }, | ||
212 | { 0x00079a, 1, 0x01, 0x00000002 }, | ||
213 | { 0x000833, 1, 0x01, 0x04444480 }, | ||
214 | { 0x0007a1, 1, 0x01, 0x00000001 }, | ||
215 | { 0x0007a3, 3, 0x01, 0x00000001 }, | ||
216 | { 0x000831, 1, 0x01, 0x00000004 }, | ||
217 | { 0x000b07, 1, 0x01, 0x00000002 }, | ||
218 | { 0x000b08, 2, 0x01, 0x00000100 }, | ||
219 | { 0x000b0a, 1, 0x01, 0x00000001 }, | ||
220 | { 0x000a04, 1, 0x01, 0x000000ff }, | ||
221 | { 0x000a0b, 1, 0x01, 0x00000040 }, | ||
222 | { 0x00097f, 1, 0x01, 0x00000100 }, | ||
223 | { 0x000a02, 1, 0x01, 0x00000001 }, | ||
224 | { 0x000809, 1, 0x01, 0x00000007 }, | ||
225 | { 0x00c221, 1, 0x01, 0x00000040 }, | ||
226 | { 0x00c1b0, 8, 0x01, 0x0000000f }, | ||
227 | { 0x00c1b8, 1, 0x01, 0x0fac6881 }, | ||
228 | { 0x00c1b9, 1, 0x01, 0x00fac688 }, | ||
229 | { 0x00c401, 1, 0x01, 0x00000001 }, | ||
230 | { 0x00c402, 1, 0x01, 0x00010001 }, | ||
231 | { 0x00c403, 2, 0x01, 0x00000001 }, | ||
232 | { 0x00c40e, 1, 0x01, 0x00000020 }, | ||
233 | { 0x00c500, 1, 0x01, 0x00000003 }, | ||
234 | { 0x01e100, 1, 0x01, 0x00000001 }, | ||
235 | { 0x001000, 1, 0x01, 0x00000002 }, | ||
236 | { 0x0006aa, 1, 0x01, 0x00000001 }, | ||
237 | { 0x0006ad, 2, 0x01, 0x00000100 }, | ||
238 | { 0x0006b1, 1, 0x01, 0x00000011 }, | ||
239 | { 0x00078c, 1, 0x01, 0x00000008 }, | ||
240 | { 0x000792, 1, 0x01, 0x00000001 }, | ||
241 | { 0x000794, 3, 0x01, 0x00000001 }, | ||
242 | { 0x000797, 1, 0x01, 0x000000cf }, | ||
243 | { 0x00079a, 1, 0x01, 0x00000002 }, | ||
244 | { 0x000833, 1, 0x01, 0x04444480 }, | ||
245 | { 0x0007a1, 1, 0x01, 0x00000001 }, | ||
246 | { 0x0007a3, 3, 0x01, 0x00000001 }, | ||
247 | { 0x000831, 1, 0x01, 0x00000004 }, | ||
248 | { 0x01e100, 1, 0x01, 0x00000001 }, | ||
249 | { 0x001000, 1, 0x01, 0x00000008 }, | ||
250 | { 0x000039, 3, 0x01, 0x00000000 }, | ||
251 | { 0x000380, 1, 0x01, 0x00000001 }, | ||
252 | { 0x000366, 2, 0x01, 0x00000000 }, | ||
253 | { 0x000368, 1, 0x01, 0x00000fff }, | ||
254 | { 0x000370, 2, 0x01, 0x00000000 }, | ||
255 | { 0x000372, 1, 0x01, 0x000fffff }, | ||
256 | { 0x000813, 1, 0x01, 0x00000006 }, | ||
257 | { 0x000814, 1, 0x01, 0x00000008 }, | ||
258 | { 0x000957, 1, 0x01, 0x00000003 }, | ||
259 | { 0x000b07, 1, 0x01, 0x00000002 }, | ||
260 | { 0x000b08, 2, 0x01, 0x00000100 }, | ||
261 | { 0x000b0a, 1, 0x01, 0x00000001 }, | ||
262 | { 0x000a04, 1, 0x01, 0x000000ff }, | ||
263 | { 0x000a0b, 1, 0x01, 0x00000040 }, | ||
264 | { 0x00097f, 1, 0x01, 0x00000100 }, | ||
265 | { 0x000a02, 1, 0x01, 0x00000001 }, | ||
266 | { 0x000809, 1, 0x01, 0x00000007 }, | ||
267 | { 0x00c221, 1, 0x01, 0x00000040 }, | ||
268 | { 0x00c401, 1, 0x01, 0x00000001 }, | ||
269 | { 0x00c402, 1, 0x01, 0x00010001 }, | ||
270 | { 0x00c403, 2, 0x01, 0x00000001 }, | ||
271 | { 0x00c40e, 1, 0x01, 0x00000020 }, | ||
272 | { 0x00c500, 1, 0x01, 0x00000003 }, | ||
273 | { 0x01e100, 1, 0x01, 0x00000001 }, | ||
274 | { 0x001000, 1, 0x01, 0x00000001 }, | ||
275 | { 0x000b07, 1, 0x01, 0x00000002 }, | ||
276 | { 0x000b08, 2, 0x01, 0x00000100 }, | ||
277 | { 0x000b0a, 1, 0x01, 0x00000001 }, | ||
278 | { 0x01e100, 1, 0x01, 0x00000001 }, | ||
279 | {} | ||
280 | }; | ||
281 | |||
282 | static const struct nvc0_graph_pack | ||
283 | nvf0_grctx_pack_icmd[] = { | ||
284 | { nvf0_grctx_init_icmd_0 }, | ||
285 | {} | ||
286 | }; | ||
287 | |||
288 | static const struct nvc0_graph_init | ||
289 | nvf0_grctx_init_a197_0[] = { | ||
290 | { 0x000800, 8, 0x40, 0x00000000 }, | ||
291 | { 0x000804, 8, 0x40, 0x00000000 }, | ||
292 | { 0x000808, 8, 0x40, 0x00000400 }, | ||
293 | { 0x00080c, 8, 0x40, 0x00000300 }, | ||
294 | { 0x000810, 1, 0x04, 0x000000cf }, | ||
295 | { 0x000850, 7, 0x40, 0x00000000 }, | ||
296 | { 0x000814, 8, 0x40, 0x00000040 }, | ||
297 | { 0x000818, 8, 0x40, 0x00000001 }, | ||
298 | { 0x00081c, 8, 0x40, 0x00000000 }, | ||
299 | { 0x000820, 8, 0x40, 0x00000000 }, | ||
300 | { 0x001c00, 16, 0x10, 0x00000000 }, | ||
301 | { 0x001c04, 16, 0x10, 0x00000000 }, | ||
302 | { 0x001c08, 16, 0x10, 0x00000000 }, | ||
303 | { 0x001c0c, 16, 0x10, 0x00000000 }, | ||
304 | { 0x001d00, 16, 0x10, 0x00000000 }, | ||
305 | { 0x001d04, 16, 0x10, 0x00000000 }, | ||
306 | { 0x001d08, 16, 0x10, 0x00000000 }, | ||
307 | { 0x001d0c, 16, 0x10, 0x00000000 }, | ||
308 | { 0x001f00, 16, 0x08, 0x00000000 }, | ||
309 | { 0x001f04, 16, 0x08, 0x00000000 }, | ||
310 | { 0x001f80, 16, 0x08, 0x00000000 }, | ||
311 | { 0x001f84, 16, 0x08, 0x00000000 }, | ||
312 | { 0x002000, 1, 0x04, 0x00000000 }, | ||
313 | { 0x002040, 1, 0x04, 0x00000011 }, | ||
314 | { 0x002080, 1, 0x04, 0x00000020 }, | ||
315 | { 0x0020c0, 1, 0x04, 0x00000030 }, | ||
316 | { 0x002100, 1, 0x04, 0x00000040 }, | ||
317 | { 0x002140, 1, 0x04, 0x00000051 }, | ||
318 | { 0x00200c, 6, 0x40, 0x00000001 }, | ||
319 | { 0x002010, 1, 0x04, 0x00000000 }, | ||
320 | { 0x002050, 1, 0x04, 0x00000000 }, | ||
321 | { 0x002090, 1, 0x04, 0x00000001 }, | ||
322 | { 0x0020d0, 1, 0x04, 0x00000002 }, | ||
323 | { 0x002110, 1, 0x04, 0x00000003 }, | ||
324 | { 0x002150, 1, 0x04, 0x00000004 }, | ||
325 | { 0x000380, 4, 0x20, 0x00000000 }, | ||
326 | { 0x000384, 4, 0x20, 0x00000000 }, | ||
327 | { 0x000388, 4, 0x20, 0x00000000 }, | ||
328 | { 0x00038c, 4, 0x20, 0x00000000 }, | ||
329 | { 0x000700, 4, 0x10, 0x00000000 }, | ||
330 | { 0x000704, 4, 0x10, 0x00000000 }, | ||
331 | { 0x000708, 4, 0x10, 0x00000000 }, | ||
332 | { 0x002800, 128, 0x04, 0x00000000 }, | ||
333 | { 0x000a00, 16, 0x20, 0x00000000 }, | ||
334 | { 0x000a04, 16, 0x20, 0x00000000 }, | ||
335 | { 0x000a08, 16, 0x20, 0x00000000 }, | ||
336 | { 0x000a0c, 16, 0x20, 0x00000000 }, | ||
337 | { 0x000a10, 16, 0x20, 0x00000000 }, | ||
338 | { 0x000a14, 16, 0x20, 0x00000000 }, | ||
339 | { 0x000c00, 16, 0x10, 0x00000000 }, | ||
340 | { 0x000c04, 16, 0x10, 0x00000000 }, | ||
341 | { 0x000c08, 16, 0x10, 0x00000000 }, | ||
342 | { 0x000c0c, 16, 0x10, 0x3f800000 }, | ||
343 | { 0x000d00, 8, 0x08, 0xffff0000 }, | ||
344 | { 0x000d04, 8, 0x08, 0xffff0000 }, | ||
345 | { 0x000e00, 16, 0x10, 0x00000000 }, | ||
346 | { 0x000e04, 16, 0x10, 0xffff0000 }, | ||
347 | { 0x000e08, 16, 0x10, 0xffff0000 }, | ||
348 | { 0x000d40, 4, 0x08, 0x00000000 }, | ||
349 | { 0x000d44, 4, 0x08, 0x00000000 }, | ||
350 | { 0x001e00, 8, 0x20, 0x00000001 }, | ||
351 | { 0x001e04, 8, 0x20, 0x00000001 }, | ||
352 | { 0x001e08, 8, 0x20, 0x00000002 }, | ||
353 | { 0x001e0c, 8, 0x20, 0x00000001 }, | ||
354 | { 0x001e10, 8, 0x20, 0x00000001 }, | ||
355 | { 0x001e14, 8, 0x20, 0x00000002 }, | ||
356 | { 0x001e18, 8, 0x20, 0x00000001 }, | ||
357 | { 0x003400, 128, 0x04, 0x00000000 }, | ||
358 | { 0x00030c, 1, 0x04, 0x00000001 }, | ||
359 | { 0x001944, 1, 0x04, 0x00000000 }, | ||
360 | { 0x001514, 1, 0x04, 0x00000000 }, | ||
361 | { 0x000d68, 1, 0x04, 0x0000ffff }, | ||
362 | { 0x00121c, 1, 0x04, 0x0fac6881 }, | ||
363 | { 0x000fac, 1, 0x04, 0x00000001 }, | ||
364 | { 0x001538, 1, 0x04, 0x00000001 }, | ||
365 | { 0x000fe0, 2, 0x04, 0x00000000 }, | ||
366 | { 0x000fe8, 1, 0x04, 0x00000014 }, | ||
367 | { 0x000fec, 1, 0x04, 0x00000040 }, | ||
368 | { 0x000ff0, 1, 0x04, 0x00000000 }, | ||
369 | { 0x00179c, 1, 0x04, 0x00000000 }, | ||
370 | { 0x001228, 1, 0x04, 0x00000400 }, | ||
371 | { 0x00122c, 1, 0x04, 0x00000300 }, | ||
372 | { 0x001230, 1, 0x04, 0x00010001 }, | ||
373 | { 0x0007f8, 1, 0x04, 0x00000000 }, | ||
374 | { 0x0015b4, 1, 0x04, 0x00000001 }, | ||
375 | { 0x0015cc, 1, 0x04, 0x00000000 }, | ||
376 | { 0x001534, 1, 0x04, 0x00000000 }, | ||
377 | { 0x000fb0, 1, 0x04, 0x00000000 }, | ||
378 | { 0x0015d0, 1, 0x04, 0x00000000 }, | ||
379 | { 0x00153c, 1, 0x04, 0x00000000 }, | ||
380 | { 0x0016b4, 1, 0x04, 0x00000003 }, | ||
381 | { 0x000fbc, 4, 0x04, 0x0000ffff }, | ||
382 | { 0x000df8, 2, 0x04, 0x00000000 }, | ||
383 | { 0x001948, 1, 0x04, 0x00000000 }, | ||
384 | { 0x001970, 1, 0x04, 0x00000001 }, | ||
385 | { 0x00161c, 1, 0x04, 0x000009f0 }, | ||
386 | { 0x000dcc, 1, 0x04, 0x00000010 }, | ||
387 | { 0x00163c, 1, 0x04, 0x00000000 }, | ||
388 | { 0x0015e4, 1, 0x04, 0x00000000 }, | ||
389 | { 0x001160, 32, 0x04, 0x25e00040 }, | ||
390 | { 0x001880, 32, 0x04, 0x00000000 }, | ||
391 | { 0x000f84, 2, 0x04, 0x00000000 }, | ||
392 | { 0x0017c8, 2, 0x04, 0x00000000 }, | ||
393 | { 0x0017d0, 1, 0x04, 0x000000ff }, | ||
394 | { 0x0017d4, 1, 0x04, 0xffffffff }, | ||
395 | { 0x0017d8, 1, 0x04, 0x00000002 }, | ||
396 | { 0x0017dc, 1, 0x04, 0x00000000 }, | ||
397 | { 0x0015f4, 2, 0x04, 0x00000000 }, | ||
398 | { 0x001434, 2, 0x04, 0x00000000 }, | ||
399 | { 0x000d74, 1, 0x04, 0x00000000 }, | ||
400 | { 0x000dec, 1, 0x04, 0x00000001 }, | ||
401 | { 0x0013a4, 1, 0x04, 0x00000000 }, | ||
402 | { 0x001318, 1, 0x04, 0x00000001 }, | ||
403 | { 0x001644, 1, 0x04, 0x00000000 }, | ||
404 | { 0x000748, 1, 0x04, 0x00000000 }, | ||
405 | { 0x000de8, 1, 0x04, 0x00000000 }, | ||
406 | { 0x001648, 1, 0x04, 0x00000000 }, | ||
407 | { 0x0012a4, 1, 0x04, 0x00000000 }, | ||
408 | { 0x001120, 4, 0x04, 0x00000000 }, | ||
409 | { 0x001118, 1, 0x04, 0x00000000 }, | ||
410 | { 0x00164c, 1, 0x04, 0x00000000 }, | ||
411 | { 0x001658, 1, 0x04, 0x00000000 }, | ||
412 | { 0x001910, 1, 0x04, 0x00000290 }, | ||
413 | { 0x001518, 1, 0x04, 0x00000000 }, | ||
414 | { 0x00165c, 1, 0x04, 0x00000001 }, | ||
415 | { 0x001520, 1, 0x04, 0x00000000 }, | ||
416 | { 0x001604, 1, 0x04, 0x00000000 }, | ||
417 | { 0x001570, 1, 0x04, 0x00000000 }, | ||
418 | { 0x0013b0, 2, 0x04, 0x3f800000 }, | ||
419 | { 0x00020c, 1, 0x04, 0x00000000 }, | ||
420 | { 0x001670, 1, 0x04, 0x30201000 }, | ||
421 | { 0x001674, 1, 0x04, 0x70605040 }, | ||
422 | { 0x001678, 1, 0x04, 0xb8a89888 }, | ||
423 | { 0x00167c, 1, 0x04, 0xf8e8d8c8 }, | ||
424 | { 0x00166c, 1, 0x04, 0x00000000 }, | ||
425 | { 0x001680, 1, 0x04, 0x00ffff00 }, | ||
426 | { 0x0012d0, 1, 0x04, 0x00000003 }, | ||
427 | { 0x0012d4, 1, 0x04, 0x00000002 }, | ||
428 | { 0x001684, 2, 0x04, 0x00000000 }, | ||
429 | { 0x000dac, 2, 0x04, 0x00001b02 }, | ||
430 | { 0x000db4, 1, 0x04, 0x00000000 }, | ||
431 | { 0x00168c, 1, 0x04, 0x00000000 }, | ||
432 | { 0x0015bc, 1, 0x04, 0x00000000 }, | ||
433 | { 0x00156c, 1, 0x04, 0x00000000 }, | ||
434 | { 0x00187c, 1, 0x04, 0x00000000 }, | ||
435 | { 0x001110, 1, 0x04, 0x00000001 }, | ||
436 | { 0x000dc0, 3, 0x04, 0x00000000 }, | ||
437 | { 0x001234, 1, 0x04, 0x00000000 }, | ||
438 | { 0x001690, 1, 0x04, 0x00000000 }, | ||
439 | { 0x0012ac, 1, 0x04, 0x00000001 }, | ||
440 | { 0x0002c4, 1, 0x04, 0x00000000 }, | ||
441 | { 0x000790, 5, 0x04, 0x00000000 }, | ||
442 | { 0x00077c, 1, 0x04, 0x00000000 }, | ||
443 | { 0x001000, 1, 0x04, 0x00000010 }, | ||
444 | { 0x0010fc, 1, 0x04, 0x00000000 }, | ||
445 | { 0x001290, 1, 0x04, 0x00000000 }, | ||
446 | { 0x000218, 1, 0x04, 0x00000010 }, | ||
447 | { 0x0012d8, 1, 0x04, 0x00000000 }, | ||
448 | { 0x0012dc, 1, 0x04, 0x00000010 }, | ||
449 | { 0x000d94, 1, 0x04, 0x00000001 }, | ||
450 | { 0x00155c, 2, 0x04, 0x00000000 }, | ||
451 | { 0x001564, 1, 0x04, 0x00000fff }, | ||
452 | { 0x001574, 2, 0x04, 0x00000000 }, | ||
453 | { 0x00157c, 1, 0x04, 0x000fffff }, | ||
454 | { 0x001354, 1, 0x04, 0x00000000 }, | ||
455 | { 0x001610, 1, 0x04, 0x00000012 }, | ||
456 | { 0x001608, 2, 0x04, 0x00000000 }, | ||
457 | { 0x00260c, 1, 0x04, 0x00000000 }, | ||
458 | { 0x0007ac, 1, 0x04, 0x00000000 }, | ||
459 | { 0x00162c, 1, 0x04, 0x00000003 }, | ||
460 | { 0x000210, 1, 0x04, 0x00000000 }, | ||
461 | { 0x000320, 1, 0x04, 0x00000000 }, | ||
462 | { 0x000324, 6, 0x04, 0x3f800000 }, | ||
463 | { 0x000750, 1, 0x04, 0x00000000 }, | ||
464 | { 0x000760, 1, 0x04, 0x39291909 }, | ||
465 | { 0x000764, 1, 0x04, 0x79695949 }, | ||
466 | { 0x000768, 1, 0x04, 0xb9a99989 }, | ||
467 | { 0x00076c, 1, 0x04, 0xf9e9d9c9 }, | ||
468 | { 0x000770, 1, 0x04, 0x30201000 }, | ||
469 | { 0x000774, 1, 0x04, 0x70605040 }, | ||
470 | { 0x000778, 1, 0x04, 0x00009080 }, | ||
471 | { 0x000780, 1, 0x04, 0x39291909 }, | ||
472 | { 0x000784, 1, 0x04, 0x79695949 }, | ||
473 | { 0x000788, 1, 0x04, 0xb9a99989 }, | ||
474 | { 0x00078c, 1, 0x04, 0xf9e9d9c9 }, | ||
475 | { 0x0007d0, 1, 0x04, 0x30201000 }, | ||
476 | { 0x0007d4, 1, 0x04, 0x70605040 }, | ||
477 | { 0x0007d8, 1, 0x04, 0x00009080 }, | ||
478 | { 0x00037c, 1, 0x04, 0x00000001 }, | ||
479 | { 0x000740, 2, 0x04, 0x00000000 }, | ||
480 | { 0x002600, 1, 0x04, 0x00000000 }, | ||
481 | { 0x001918, 1, 0x04, 0x00000000 }, | ||
482 | { 0x00191c, 1, 0x04, 0x00000900 }, | ||
483 | { 0x001920, 1, 0x04, 0x00000405 }, | ||
484 | { 0x001308, 1, 0x04, 0x00000001 }, | ||
485 | { 0x001924, 1, 0x04, 0x00000000 }, | ||
486 | { 0x0013ac, 1, 0x04, 0x00000000 }, | ||
487 | { 0x00192c, 1, 0x04, 0x00000001 }, | ||
488 | { 0x00193c, 1, 0x04, 0x00002c1c }, | ||
489 | { 0x000d7c, 1, 0x04, 0x00000000 }, | ||
490 | { 0x000f8c, 1, 0x04, 0x00000000 }, | ||
491 | { 0x0002c0, 1, 0x04, 0x00000001 }, | ||
492 | { 0x001510, 1, 0x04, 0x00000000 }, | ||
493 | { 0x001940, 1, 0x04, 0x00000000 }, | ||
494 | { 0x000ff4, 2, 0x04, 0x00000000 }, | ||
495 | { 0x00194c, 2, 0x04, 0x00000000 }, | ||
496 | { 0x001968, 1, 0x04, 0x00000000 }, | ||
497 | { 0x001590, 1, 0x04, 0x0000003f }, | ||
498 | { 0x0007e8, 4, 0x04, 0x00000000 }, | ||
499 | { 0x00196c, 1, 0x04, 0x00000011 }, | ||
500 | { 0x0002e4, 1, 0x04, 0x0000b001 }, | ||
501 | { 0x00036c, 2, 0x04, 0x00000000 }, | ||
502 | { 0x00197c, 1, 0x04, 0x00000000 }, | ||
503 | { 0x000fcc, 2, 0x04, 0x00000000 }, | ||
504 | { 0x0002d8, 1, 0x04, 0x00000040 }, | ||
505 | { 0x001980, 1, 0x04, 0x00000080 }, | ||
506 | { 0x001504, 1, 0x04, 0x00000080 }, | ||
507 | { 0x001984, 1, 0x04, 0x00000000 }, | ||
508 | { 0x000300, 1, 0x04, 0x00000001 }, | ||
509 | { 0x0013a8, 1, 0x04, 0x00000000 }, | ||
510 | { 0x0012ec, 1, 0x04, 0x00000000 }, | ||
511 | { 0x001310, 1, 0x04, 0x00000000 }, | ||
512 | { 0x001314, 1, 0x04, 0x00000001 }, | ||
513 | { 0x001380, 1, 0x04, 0x00000000 }, | ||
514 | { 0x001384, 4, 0x04, 0x00000001 }, | ||
515 | { 0x001394, 1, 0x04, 0x00000000 }, | ||
516 | { 0x00139c, 1, 0x04, 0x00000000 }, | ||
517 | { 0x001398, 1, 0x04, 0x00000000 }, | ||
518 | { 0x001594, 1, 0x04, 0x00000000 }, | ||
519 | { 0x001598, 4, 0x04, 0x00000001 }, | ||
520 | { 0x000f54, 3, 0x04, 0x00000000 }, | ||
521 | { 0x0019bc, 1, 0x04, 0x00000000 }, | ||
522 | { 0x000f9c, 2, 0x04, 0x00000000 }, | ||
523 | { 0x0012cc, 1, 0x04, 0x00000000 }, | ||
524 | { 0x0012e8, 1, 0x04, 0x00000000 }, | ||
525 | { 0x00130c, 1, 0x04, 0x00000001 }, | ||
526 | { 0x001360, 8, 0x04, 0x00000000 }, | ||
527 | { 0x00133c, 2, 0x04, 0x00000001 }, | ||
528 | { 0x001344, 1, 0x04, 0x00000002 }, | ||
529 | { 0x001348, 2, 0x04, 0x00000001 }, | ||
530 | { 0x001350, 1, 0x04, 0x00000002 }, | ||
531 | { 0x001358, 1, 0x04, 0x00000001 }, | ||
532 | { 0x0012e4, 1, 0x04, 0x00000000 }, | ||
533 | { 0x00131c, 4, 0x04, 0x00000000 }, | ||
534 | { 0x0019c0, 1, 0x04, 0x00000000 }, | ||
535 | { 0x001140, 1, 0x04, 0x00000000 }, | ||
536 | { 0x0019c4, 1, 0x04, 0x00000000 }, | ||
537 | { 0x0019c8, 1, 0x04, 0x00001500 }, | ||
538 | { 0x00135c, 1, 0x04, 0x00000000 }, | ||
539 | { 0x000f90, 1, 0x04, 0x00000000 }, | ||
540 | { 0x0019e0, 8, 0x04, 0x00000001 }, | ||
541 | { 0x0019cc, 1, 0x04, 0x00000001 }, | ||
542 | { 0x0015b8, 1, 0x04, 0x00000000 }, | ||
543 | { 0x001a00, 1, 0x04, 0x00001111 }, | ||
544 | { 0x001a04, 7, 0x04, 0x00000000 }, | ||
545 | { 0x000d6c, 2, 0x04, 0xffff0000 }, | ||
546 | { 0x0010f8, 1, 0x04, 0x00001010 }, | ||
547 | { 0x000d80, 5, 0x04, 0x00000000 }, | ||
548 | { 0x000da0, 1, 0x04, 0x00000000 }, | ||
549 | { 0x0007a4, 2, 0x04, 0x00000000 }, | ||
550 | { 0x001508, 1, 0x04, 0x80000000 }, | ||
551 | { 0x00150c, 1, 0x04, 0x40000000 }, | ||
552 | { 0x001668, 1, 0x04, 0x00000000 }, | ||
553 | { 0x000318, 2, 0x04, 0x00000008 }, | ||
554 | { 0x000d9c, 1, 0x04, 0x00000001 }, | ||
555 | { 0x000ddc, 1, 0x04, 0x00000002 }, | ||
556 | { 0x000374, 1, 0x04, 0x00000000 }, | ||
557 | { 0x000378, 1, 0x04, 0x00000020 }, | ||
558 | { 0x0007dc, 1, 0x04, 0x00000000 }, | ||
559 | { 0x00074c, 1, 0x04, 0x00000055 }, | ||
560 | { 0x001420, 1, 0x04, 0x00000003 }, | ||
561 | { 0x0017bc, 2, 0x04, 0x00000000 }, | ||
562 | { 0x0017c4, 1, 0x04, 0x00000001 }, | ||
563 | { 0x001008, 1, 0x04, 0x00000008 }, | ||
564 | { 0x00100c, 1, 0x04, 0x00000040 }, | ||
565 | { 0x001010, 1, 0x04, 0x0000012c }, | ||
566 | { 0x000d60, 1, 0x04, 0x00000040 }, | ||
567 | { 0x00075c, 1, 0x04, 0x00000003 }, | ||
568 | { 0x001018, 1, 0x04, 0x00000020 }, | ||
569 | { 0x00101c, 1, 0x04, 0x00000001 }, | ||
570 | { 0x001020, 1, 0x04, 0x00000020 }, | ||
571 | { 0x001024, 1, 0x04, 0x00000001 }, | ||
572 | { 0x001444, 3, 0x04, 0x00000000 }, | ||
573 | { 0x000360, 1, 0x04, 0x20164010 }, | ||
574 | { 0x000364, 1, 0x04, 0x00000020 }, | ||
575 | { 0x000368, 1, 0x04, 0x00000000 }, | ||
576 | { 0x000de4, 1, 0x04, 0x00000000 }, | ||
577 | { 0x000204, 1, 0x04, 0x00000006 }, | ||
578 | { 0x000208, 1, 0x04, 0x00000000 }, | ||
579 | { 0x0002cc, 2, 0x04, 0x003fffff }, | ||
580 | { 0x001220, 1, 0x04, 0x00000005 }, | ||
581 | { 0x000fdc, 1, 0x04, 0x00000000 }, | ||
582 | { 0x000f98, 1, 0x04, 0x00400008 }, | ||
583 | { 0x001284, 1, 0x04, 0x08000080 }, | ||
584 | { 0x001450, 1, 0x04, 0x00400008 }, | ||
585 | { 0x001454, 1, 0x04, 0x08000080 }, | ||
586 | { 0x000214, 1, 0x04, 0x00000000 }, | ||
587 | {} | ||
588 | }; | ||
589 | |||
590 | const struct nvc0_graph_pack | ||
591 | nvf0_grctx_pack_mthd[] = { | ||
592 | { nvf0_grctx_init_a197_0, 0xa197 }, | ||
593 | { nvc0_grctx_init_902d_0, 0x902d }, | ||
594 | {} | ||
595 | }; | ||
596 | |||
597 | static const struct nvc0_graph_init | ||
598 | nvf0_grctx_init_fe_0[] = { | ||
29 | { 0x404004, 8, 0x04, 0x00000000 }, | 599 | { 0x404004, 8, 0x04, 0x00000000 }, |
30 | { 0x404024, 1, 0x04, 0x0000e000 }, | 600 | { 0x404024, 1, 0x04, 0x0000e000 }, |
31 | { 0x404028, 8, 0x04, 0x00000000 }, | 601 | { 0x404028, 8, 0x04, 0x00000000 }, |
@@ -50,8 +620,8 @@ nvf0_grctx_init_unk40xx[] = { | |||
50 | {} | 620 | {} |
51 | }; | 621 | }; |
52 | 622 | ||
53 | struct nvc0_graph_init | 623 | const struct nvc0_graph_init |
54 | nvf0_grctx_init_unk44xx[] = { | 624 | nvf0_grctx_init_pri_0[] = { |
55 | { 0x404404, 12, 0x04, 0x00000000 }, | 625 | { 0x404404, 12, 0x04, 0x00000000 }, |
56 | { 0x404438, 1, 0x04, 0x00000000 }, | 626 | { 0x404438, 1, 0x04, 0x00000000 }, |
57 | { 0x404460, 2, 0x04, 0x00000000 }, | 627 | { 0x404460, 2, 0x04, 0x00000000 }, |
@@ -62,23 +632,18 @@ nvf0_grctx_init_unk44xx[] = { | |||
62 | {} | 632 | {} |
63 | }; | 633 | }; |
64 | 634 | ||
65 | struct nvc0_graph_init | 635 | const struct nvc0_graph_init |
66 | nvf0_grctx_init_unk5bxx[] = { | 636 | nvf0_grctx_init_cwd_0[] = { |
67 | { 0x405b00, 1, 0x04, 0x00000000 }, | 637 | { 0x405b00, 1, 0x04, 0x00000000 }, |
68 | { 0x405b10, 1, 0x04, 0x00001000 }, | 638 | { 0x405b10, 1, 0x04, 0x00001000 }, |
69 | { 0x405b20, 1, 0x04, 0x04000000 }, | 639 | { 0x405b20, 1, 0x04, 0x04000000 }, |
70 | {} | 640 | {} |
71 | }; | 641 | }; |
72 | 642 | ||
73 | struct nvc0_graph_init | 643 | static const struct nvc0_graph_init |
74 | nvf0_grctx_init_unk60xx[] = { | 644 | nvf0_grctx_init_pd_0[] = { |
75 | { 0x406020, 1, 0x04, 0x034103c1 }, | 645 | { 0x406020, 1, 0x04, 0x034103c1 }, |
76 | { 0x406028, 4, 0x04, 0x00000001 }, | 646 | { 0x406028, 4, 0x04, 0x00000001 }, |
77 | {} | ||
78 | }; | ||
79 | |||
80 | static struct nvc0_graph_init | ||
81 | nvf0_grctx_init_unk64xx[] = { | ||
82 | { 0x4064a8, 1, 0x04, 0x00000000 }, | 647 | { 0x4064a8, 1, 0x04, 0x00000000 }, |
83 | { 0x4064ac, 1, 0x04, 0x00003fff }, | 648 | { 0x4064ac, 1, 0x04, 0x00003fff }, |
84 | { 0x4064b0, 3, 0x04, 0x00000000 }, | 649 | { 0x4064b0, 3, 0x04, 0x00000000 }, |
@@ -90,8 +655,8 @@ nvf0_grctx_init_unk64xx[] = { | |||
90 | {} | 655 | {} |
91 | }; | 656 | }; |
92 | 657 | ||
93 | static struct nvc0_graph_init | 658 | static const struct nvc0_graph_init |
94 | nvf0_grctx_init_unk88xx[] = { | 659 | nvf0_grctx_init_be_0[] = { |
95 | { 0x408800, 1, 0x04, 0x12802a3c }, | 660 | { 0x408800, 1, 0x04, 0x12802a3c }, |
96 | { 0x408804, 1, 0x04, 0x00000040 }, | 661 | { 0x408804, 1, 0x04, 0x00000040 }, |
97 | { 0x408808, 1, 0x04, 0x1003e005 }, | 662 | { 0x408808, 1, 0x04, 0x1003e005 }, |
@@ -103,7 +668,22 @@ nvf0_grctx_init_unk88xx[] = { | |||
103 | {} | 668 | {} |
104 | }; | 669 | }; |
105 | 670 | ||
106 | static struct nvc0_graph_init | 671 | static const struct nvc0_graph_pack |
672 | nvf0_grctx_pack_hub[] = { | ||
673 | { nvc0_grctx_init_main_0 }, | ||
674 | { nvf0_grctx_init_fe_0 }, | ||
675 | { nvf0_grctx_init_pri_0 }, | ||
676 | { nve4_grctx_init_memfmt_0 }, | ||
677 | { nve4_grctx_init_ds_0 }, | ||
678 | { nvf0_grctx_init_cwd_0 }, | ||
679 | { nvf0_grctx_init_pd_0 }, | ||
680 | { nvc0_grctx_init_rstr2d_0 }, | ||
681 | { nve4_grctx_init_scc_0 }, | ||
682 | { nvf0_grctx_init_be_0 }, | ||
683 | {} | ||
684 | }; | ||
685 | |||
686 | static const struct nvc0_graph_init | ||
107 | nvf0_grctx_init_gpc_0[] = { | 687 | nvf0_grctx_init_gpc_0[] = { |
108 | { 0x418380, 1, 0x04, 0x00000016 }, | 688 | { 0x418380, 1, 0x04, 0x00000016 }, |
109 | { 0x418400, 1, 0x04, 0x38004e00 }, | 689 | { 0x418400, 1, 0x04, 0x38004e00 }, |
@@ -154,8 +734,14 @@ nvf0_grctx_init_gpc_0[] = { | |||
154 | {} | 734 | {} |
155 | }; | 735 | }; |
156 | 736 | ||
157 | static struct nvc0_graph_init | 737 | static const struct nvc0_graph_pack |
158 | nvf0_grctx_init_tpc[] = { | 738 | nvf0_grctx_pack_gpc[] = { |
739 | { nvf0_grctx_init_gpc_0 }, | ||
740 | {} | ||
741 | }; | ||
742 | |||
743 | static const struct nvc0_graph_init | ||
744 | nvf0_grctx_init_tpc_0[] = { | ||
159 | { 0x419848, 1, 0x04, 0x00000000 }, | 745 | { 0x419848, 1, 0x04, 0x00000000 }, |
160 | { 0x419864, 1, 0x04, 0x00000129 }, | 746 | { 0x419864, 1, 0x04, 0x00000129 }, |
161 | { 0x419888, 1, 0x04, 0x00000000 }, | 747 | { 0x419888, 1, 0x04, 0x00000000 }, |
@@ -203,8 +789,14 @@ nvf0_grctx_init_tpc[] = { | |||
203 | {} | 789 | {} |
204 | }; | 790 | }; |
205 | 791 | ||
206 | static struct nvc0_graph_init | 792 | static const struct nvc0_graph_pack |
207 | nvf0_grctx_init_unk[] = { | 793 | nvf0_grctx_pack_tpc[] = { |
794 | { nvf0_grctx_init_tpc_0 }, | ||
795 | {} | ||
796 | }; | ||
797 | |||
798 | static const struct nvc0_graph_init | ||
799 | nvf0_grctx_init_ppc_0[] = { | ||
208 | { 0x41be24, 1, 0x04, 0x00000006 }, | 800 | { 0x41be24, 1, 0x04, 0x00000006 }, |
209 | { 0x41bec0, 1, 0x04, 0x10000000 }, | 801 | { 0x41bec0, 1, 0x04, 0x10000000 }, |
210 | { 0x41bec4, 1, 0x04, 0x00037f7f }, | 802 | { 0x41bec4, 1, 0x04, 0x00037f7f }, |
@@ -221,6 +813,16 @@ nvf0_grctx_init_unk[] = { | |||
221 | {} | 813 | {} |
222 | }; | 814 | }; |
223 | 815 | ||
816 | static const struct nvc0_graph_pack | ||
817 | nvf0_grctx_pack_ppc[] = { | ||
818 | { nvf0_grctx_init_ppc_0 }, | ||
819 | {} | ||
820 | }; | ||
821 | |||
822 | /******************************************************************************* | ||
823 | * PGRAPH context implementation | ||
824 | ******************************************************************************/ | ||
825 | |||
224 | static void | 826 | static void |
225 | nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | 827 | nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) |
226 | { | 828 | { |
@@ -273,39 +875,6 @@ nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
273 | mmio_list(0x17e920, 0x00090a05, 0, 0); | 875 | mmio_list(0x17e920, 0x00090a05, 0, 0); |
274 | } | 876 | } |
275 | 877 | ||
276 | static struct nvc0_graph_init * | ||
277 | nvf0_grctx_init_hub[] = { | ||
278 | nvc0_grctx_init_base, | ||
279 | nvf0_grctx_init_unk40xx, | ||
280 | nvf0_grctx_init_unk44xx, | ||
281 | nve4_grctx_init_unk46xx, | ||
282 | nve4_grctx_init_unk47xx, | ||
283 | nve4_grctx_init_unk58xx, | ||
284 | nvf0_grctx_init_unk5bxx, | ||
285 | nvf0_grctx_init_unk60xx, | ||
286 | nvf0_grctx_init_unk64xx, | ||
287 | nve4_grctx_init_unk80xx, | ||
288 | nvf0_grctx_init_unk88xx, | ||
289 | NULL | ||
290 | }; | ||
291 | |||
292 | struct nvc0_graph_init * | ||
293 | nvf0_grctx_init_gpc[] = { | ||
294 | nvf0_grctx_init_gpc_0, | ||
295 | nvc0_grctx_init_gpc_1, | ||
296 | nvf0_grctx_init_tpc, | ||
297 | nvf0_grctx_init_unk, | ||
298 | NULL | ||
299 | }; | ||
300 | |||
301 | static struct nvc0_graph_mthd | ||
302 | nvf0_grctx_init_mthd[] = { | ||
303 | { 0xa197, nvc1_grctx_init_9097, }, | ||
304 | { 0x902d, nvc0_grctx_init_902d, }, | ||
305 | { 0x902d, nvc0_grctx_init_mthd_magic, }, | ||
306 | {} | ||
307 | }; | ||
308 | |||
309 | struct nouveau_oclass * | 878 | struct nouveau_oclass * |
310 | nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) { | 879 | nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) { |
311 | .base.handle = NV_ENGCTX(GR, 0xf0), | 880 | .base.handle = NV_ENGCTX(GR, 0xf0), |
@@ -317,11 +886,14 @@ nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
317 | .rd32 = _nouveau_graph_context_rd32, | 886 | .rd32 = _nouveau_graph_context_rd32, |
318 | .wr32 = _nouveau_graph_context_wr32, | 887 | .wr32 = _nouveau_graph_context_wr32, |
319 | }, | 888 | }, |
320 | .main = nve4_grctx_generate_main, | 889 | .main = nve4_grctx_generate_main, |
321 | .mods = nvf0_grctx_generate_mods, | 890 | .mods = nvf0_grctx_generate_mods, |
322 | .unkn = nve4_grctx_generate_unkn, | 891 | .unkn = nve4_grctx_generate_unkn, |
323 | .hub = nvf0_grctx_init_hub, | 892 | .hub = nvf0_grctx_pack_hub, |
324 | .gpc = nvf0_grctx_init_gpc, | 893 | .gpc = nvf0_grctx_pack_gpc, |
325 | .icmd = nvc0_grctx_init_icmd, | 894 | .zcull = nvc0_grctx_pack_zcull, |
326 | .mthd = nvf0_grctx_init_mthd, | 895 | .tpc = nvf0_grctx_pack_tpc, |
896 | .ppc = nvf0_grctx_pack_ppc, | ||
897 | .icmd = nvf0_grctx_pack_icmd, | ||
898 | .mthd = nvf0_grctx_pack_mthd, | ||
327 | }.base; | 899 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv108.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv108.c index e1af65ead379..e3ce11319115 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv108.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv108.c | |||
@@ -23,6 +23,7 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * Graphics object classes | 29 | * Graphics object classes |
@@ -38,11 +39,11 @@ nv108_graph_sclass[] = { | |||
38 | }; | 39 | }; |
39 | 40 | ||
40 | /******************************************************************************* | 41 | /******************************************************************************* |
41 | * PGRAPH engine/subdev functions | 42 | * PGRAPH register lists |
42 | ******************************************************************************/ | 43 | ******************************************************************************/ |
43 | 44 | ||
44 | static struct nvc0_graph_init | 45 | static const struct nvc0_graph_init |
45 | nv108_graph_init_regs[] = { | 46 | nv108_graph_init_main_0[] = { |
46 | { 0x400080, 1, 0x04, 0x003083c2 }, | 47 | { 0x400080, 1, 0x04, 0x003083c2 }, |
47 | { 0x400088, 1, 0x04, 0x0001bfe7 }, | 48 | { 0x400088, 1, 0x04, 0x0001bfe7 }, |
48 | { 0x40008c, 1, 0x04, 0x00000000 }, | 49 | { 0x40008c, 1, 0x04, 0x00000000 }, |
@@ -57,19 +58,18 @@ nv108_graph_init_regs[] = { | |||
57 | {} | 58 | {} |
58 | }; | 59 | }; |
59 | 60 | ||
60 | struct nvc0_graph_init | 61 | static const struct nvc0_graph_init |
61 | nv108_graph_init_unk58xx[] = { | 62 | nv108_graph_init_ds_0[] = { |
62 | { 0x405844, 1, 0x04, 0x00ffffff }, | 63 | { 0x405844, 1, 0x04, 0x00ffffff }, |
63 | { 0x405850, 1, 0x04, 0x00000000 }, | 64 | { 0x405850, 1, 0x04, 0x00000000 }, |
64 | { 0x405900, 1, 0x04, 0x00000000 }, | 65 | { 0x405900, 1, 0x04, 0x00000000 }, |
65 | { 0x405908, 1, 0x04, 0x00000000 }, | 66 | { 0x405908, 1, 0x04, 0x00000000 }, |
66 | { 0x405928, 1, 0x04, 0x00000000 }, | 67 | { 0x405928, 2, 0x04, 0x00000000 }, |
67 | { 0x40592c, 1, 0x04, 0x00000000 }, | ||
68 | {} | 68 | {} |
69 | }; | 69 | }; |
70 | 70 | ||
71 | static struct nvc0_graph_init | 71 | static const struct nvc0_graph_init |
72 | nv108_graph_init_gpc[] = { | 72 | nv108_graph_init_gpc_0[] = { |
73 | { 0x418408, 1, 0x04, 0x00000000 }, | 73 | { 0x418408, 1, 0x04, 0x00000000 }, |
74 | { 0x4184a0, 3, 0x04, 0x00000000 }, | 74 | { 0x4184a0, 3, 0x04, 0x00000000 }, |
75 | { 0x418604, 1, 0x04, 0x00000000 }, | 75 | { 0x418604, 1, 0x04, 0x00000000 }, |
@@ -103,8 +103,8 @@ nv108_graph_init_gpc[] = { | |||
103 | {} | 103 | {} |
104 | }; | 104 | }; |
105 | 105 | ||
106 | static struct nvc0_graph_init | 106 | static const struct nvc0_graph_init |
107 | nv108_graph_init_tpc[] = { | 107 | nv108_graph_init_tpc_0[] = { |
108 | { 0x419d0c, 1, 0x04, 0x00000000 }, | 108 | { 0x419d0c, 1, 0x04, 0x00000000 }, |
109 | { 0x419d10, 1, 0x04, 0x00000014 }, | 109 | { 0x419d10, 1, 0x04, 0x00000014 }, |
110 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 110 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -143,6 +143,29 @@ nv108_graph_init_tpc[] = { | |||
143 | {} | 143 | {} |
144 | }; | 144 | }; |
145 | 145 | ||
146 | static const struct nvc0_graph_pack | ||
147 | nv108_graph_pack_mmio[] = { | ||
148 | { nv108_graph_init_main_0 }, | ||
149 | { nvf0_graph_init_fe_0 }, | ||
150 | { nvc0_graph_init_pri_0 }, | ||
151 | { nvc0_graph_init_rstr2d_0 }, | ||
152 | { nvd9_graph_init_pd_0 }, | ||
153 | { nv108_graph_init_ds_0 }, | ||
154 | { nvc0_graph_init_scc_0 }, | ||
155 | { nvf0_graph_init_sked_0 }, | ||
156 | { nvf0_graph_init_cwd_0 }, | ||
157 | { nv108_graph_init_gpc_0 }, | ||
158 | { nv108_graph_init_tpc_0 }, | ||
159 | { nvd7_graph_init_ppc_0 }, | ||
160 | { nve4_graph_init_be_0 }, | ||
161 | { nvc0_graph_init_fe_1 }, | ||
162 | {} | ||
163 | }; | ||
164 | |||
165 | /******************************************************************************* | ||
166 | * PGRAPH engine/subdev functions | ||
167 | ******************************************************************************/ | ||
168 | |||
146 | static int | 169 | static int |
147 | nv108_graph_fini(struct nouveau_object *object, bool suspend) | 170 | nv108_graph_fini(struct nouveau_object *object, bool suspend) |
148 | { | 171 | { |
@@ -180,25 +203,6 @@ nv108_graph_fini(struct nouveau_object *object, bool suspend) | |||
180 | return nouveau_graph_fini(&priv->base, suspend); | 203 | return nouveau_graph_fini(&priv->base, suspend); |
181 | } | 204 | } |
182 | 205 | ||
183 | static struct nvc0_graph_init * | ||
184 | nv108_graph_init_mmio[] = { | ||
185 | nv108_graph_init_regs, | ||
186 | nvf0_graph_init_unk40xx, | ||
187 | nvc0_graph_init_unk44xx, | ||
188 | nvc0_graph_init_unk78xx, | ||
189 | nvc0_graph_init_unk60xx, | ||
190 | nvd9_graph_init_unk64xx, | ||
191 | nv108_graph_init_unk58xx, | ||
192 | nvc0_graph_init_unk80xx, | ||
193 | nvf0_graph_init_unk70xx, | ||
194 | nvf0_graph_init_unk5bxx, | ||
195 | nv108_graph_init_gpc, | ||
196 | nv108_graph_init_tpc, | ||
197 | nve4_graph_init_unk, | ||
198 | nve4_graph_init_unk88xx, | ||
199 | NULL | ||
200 | }; | ||
201 | |||
202 | #include "fuc/hubnv108.fuc5.h" | 206 | #include "fuc/hubnv108.fuc5.h" |
203 | 207 | ||
204 | static struct nvc0_graph_ucode | 208 | static struct nvc0_graph_ucode |
@@ -230,7 +234,7 @@ nv108_graph_oclass = &(struct nvc0_graph_oclass) { | |||
230 | }, | 234 | }, |
231 | .cclass = &nv108_grctx_oclass, | 235 | .cclass = &nv108_grctx_oclass, |
232 | .sclass = nv108_graph_sclass, | 236 | .sclass = nv108_graph_sclass, |
233 | .mmio = nv108_graph_init_mmio, | 237 | .mmio = nv108_graph_pack_mmio, |
234 | .fecs.ucode = &nv108_graph_fecs_ucode, | 238 | .fecs.ucode = &nv108_graph_fecs_ucode, |
235 | .gpccs.ucode = &nv108_graph_gpccs_ucode, | 239 | .gpccs.ucode = &nv108_graph_gpccs_ucode, |
236 | }.base; | 240 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c index 6ef8bf181b2d..2e21bec3ea40 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c | |||
@@ -23,6 +23,7 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * Graphics object classes | 29 | * Graphics object classes |
@@ -146,11 +147,11 @@ nvc0_graph_context_dtor(struct nouveau_object *object) | |||
146 | } | 147 | } |
147 | 148 | ||
148 | /******************************************************************************* | 149 | /******************************************************************************* |
149 | * PGRAPH engine/subdev functions | 150 | * PGRAPH register lists |
150 | ******************************************************************************/ | 151 | ******************************************************************************/ |
151 | 152 | ||
152 | struct nvc0_graph_init | 153 | const struct nvc0_graph_init |
153 | nvc0_graph_init_regs[] = { | 154 | nvc0_graph_init_main_0[] = { |
154 | { 0x400080, 1, 0x04, 0x003083c2 }, | 155 | { 0x400080, 1, 0x04, 0x003083c2 }, |
155 | { 0x400088, 1, 0x04, 0x00006fe7 }, | 156 | { 0x400088, 1, 0x04, 0x00006fe7 }, |
156 | { 0x40008c, 1, 0x04, 0x00000000 }, | 157 | { 0x40008c, 1, 0x04, 0x00000000 }, |
@@ -165,47 +166,47 @@ nvc0_graph_init_regs[] = { | |||
165 | {} | 166 | {} |
166 | }; | 167 | }; |
167 | 168 | ||
168 | struct nvc0_graph_init | 169 | const struct nvc0_graph_init |
169 | nvc0_graph_init_unk40xx[] = { | 170 | nvc0_graph_init_fe_0[] = { |
170 | { 0x40415c, 1, 0x04, 0x00000000 }, | 171 | { 0x40415c, 1, 0x04, 0x00000000 }, |
171 | { 0x404170, 1, 0x04, 0x00000000 }, | 172 | { 0x404170, 1, 0x04, 0x00000000 }, |
172 | {} | 173 | {} |
173 | }; | 174 | }; |
174 | 175 | ||
175 | struct nvc0_graph_init | 176 | const struct nvc0_graph_init |
176 | nvc0_graph_init_unk44xx[] = { | 177 | nvc0_graph_init_pri_0[] = { |
177 | { 0x404488, 2, 0x04, 0x00000000 }, | 178 | { 0x404488, 2, 0x04, 0x00000000 }, |
178 | {} | 179 | {} |
179 | }; | 180 | }; |
180 | 181 | ||
181 | struct nvc0_graph_init | 182 | const struct nvc0_graph_init |
182 | nvc0_graph_init_unk78xx[] = { | 183 | nvc0_graph_init_rstr2d_0[] = { |
183 | { 0x407808, 1, 0x04, 0x00000000 }, | 184 | { 0x407808, 1, 0x04, 0x00000000 }, |
184 | {} | 185 | {} |
185 | }; | 186 | }; |
186 | 187 | ||
187 | struct nvc0_graph_init | 188 | const struct nvc0_graph_init |
188 | nvc0_graph_init_unk60xx[] = { | 189 | nvc0_graph_init_pd_0[] = { |
189 | { 0x406024, 1, 0x04, 0x00000000 }, | 190 | { 0x406024, 1, 0x04, 0x00000000 }, |
190 | {} | 191 | {} |
191 | }; | 192 | }; |
192 | 193 | ||
193 | struct nvc0_graph_init | 194 | const struct nvc0_graph_init |
194 | nvc0_graph_init_unk58xx[] = { | 195 | nvc0_graph_init_ds_0[] = { |
195 | { 0x405844, 1, 0x04, 0x00ffffff }, | 196 | { 0x405844, 1, 0x04, 0x00ffffff }, |
196 | { 0x405850, 1, 0x04, 0x00000000 }, | 197 | { 0x405850, 1, 0x04, 0x00000000 }, |
197 | { 0x405908, 1, 0x04, 0x00000000 }, | 198 | { 0x405908, 1, 0x04, 0x00000000 }, |
198 | {} | 199 | {} |
199 | }; | 200 | }; |
200 | 201 | ||
201 | struct nvc0_graph_init | 202 | const struct nvc0_graph_init |
202 | nvc0_graph_init_unk80xx[] = { | 203 | nvc0_graph_init_scc_0[] = { |
203 | { 0x40803c, 1, 0x04, 0x00000000 }, | 204 | { 0x40803c, 1, 0x04, 0x00000000 }, |
204 | {} | 205 | {} |
205 | }; | 206 | }; |
206 | 207 | ||
207 | struct nvc0_graph_init | 208 | const struct nvc0_graph_init |
208 | nvc0_graph_init_gpc[] = { | 209 | nvc0_graph_init_gpc_0[] = { |
209 | { 0x4184a0, 1, 0x04, 0x00000000 }, | 210 | { 0x4184a0, 1, 0x04, 0x00000000 }, |
210 | { 0x418604, 1, 0x04, 0x00000000 }, | 211 | { 0x418604, 1, 0x04, 0x00000000 }, |
211 | { 0x418680, 1, 0x04, 0x00000000 }, | 212 | { 0x418680, 1, 0x04, 0x00000000 }, |
@@ -233,8 +234,8 @@ nvc0_graph_init_gpc[] = { | |||
233 | {} | 234 | {} |
234 | }; | 235 | }; |
235 | 236 | ||
236 | static struct nvc0_graph_init | 237 | static const struct nvc0_graph_init |
237 | nvc0_graph_init_tpc[] = { | 238 | nvc0_graph_init_tpc_0[] = { |
238 | { 0x419d08, 2, 0x04, 0x00000000 }, | 239 | { 0x419d08, 2, 0x04, 0x00000000 }, |
239 | { 0x419d10, 1, 0x04, 0x00000014 }, | 240 | { 0x419d10, 1, 0x04, 0x00000014 }, |
240 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 241 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -270,8 +271,8 @@ nvc0_graph_init_tpc[] = { | |||
270 | {} | 271 | {} |
271 | }; | 272 | }; |
272 | 273 | ||
273 | struct nvc0_graph_init | 274 | const struct nvc0_graph_init |
274 | nvc0_graph_init_unk88xx[] = { | 275 | nvc0_graph_init_be_0[] = { |
275 | { 0x40880c, 1, 0x04, 0x00000000 }, | 276 | { 0x40880c, 1, 0x04, 0x00000000 }, |
276 | { 0x408910, 9, 0x04, 0x00000000 }, | 277 | { 0x408910, 9, 0x04, 0x00000000 }, |
277 | { 0x408950, 1, 0x04, 0x00000000 }, | 278 | { 0x408950, 1, 0x04, 0x00000000 }, |
@@ -282,18 +283,49 @@ nvc0_graph_init_unk88xx[] = { | |||
282 | {} | 283 | {} |
283 | }; | 284 | }; |
284 | 285 | ||
285 | struct nvc0_graph_init | 286 | const struct nvc0_graph_init |
286 | nvc0_graph_tpc_0[] = { | 287 | nvc0_graph_init_fe_1[] = { |
287 | { 0x50405c, 1, 0x04, 0x00000001 }, | 288 | { 0x4040f0, 1, 0x04, 0x00000000 }, |
289 | {} | ||
290 | }; | ||
291 | |||
292 | const struct nvc0_graph_init | ||
293 | nvc0_graph_init_tpc_1[] = { | ||
294 | { 0x419880, 1, 0x04, 0x00000002 }, | ||
295 | {} | ||
296 | }; | ||
297 | |||
298 | static const struct nvc0_graph_pack | ||
299 | nvc0_graph_pack_mmio[] = { | ||
300 | { nvc0_graph_init_main_0 }, | ||
301 | { nvc0_graph_init_fe_0 }, | ||
302 | { nvc0_graph_init_pri_0 }, | ||
303 | { nvc0_graph_init_rstr2d_0 }, | ||
304 | { nvc0_graph_init_pd_0 }, | ||
305 | { nvc0_graph_init_ds_0 }, | ||
306 | { nvc0_graph_init_scc_0 }, | ||
307 | { nvc0_graph_init_gpc_0 }, | ||
308 | { nvc0_graph_init_tpc_0 }, | ||
309 | { nvc0_graph_init_be_0 }, | ||
310 | { nvc0_graph_init_fe_1 }, | ||
311 | { nvc0_graph_init_tpc_1 }, | ||
288 | {} | 312 | {} |
289 | }; | 313 | }; |
290 | 314 | ||
315 | /******************************************************************************* | ||
316 | * PGRAPH engine/subdev functions | ||
317 | ******************************************************************************/ | ||
318 | |||
291 | void | 319 | void |
292 | nvc0_graph_mmio(struct nvc0_graph_priv *priv, struct nvc0_graph_init *init) | 320 | nvc0_graph_mmio(struct nvc0_graph_priv *priv, const struct nvc0_graph_pack *p) |
293 | { | 321 | { |
294 | for (; init && init->count; init++) { | 322 | const struct nvc0_graph_pack *pack; |
295 | u32 addr = init->addr, i; | 323 | const struct nvc0_graph_init *init; |
296 | for (i = 0; i < init->count; i++) { | 324 | |
325 | pack_for_each_init(init, pack, p) { | ||
326 | u32 next = init->addr + init->count * init->pitch; | ||
327 | u32 addr = init->addr; | ||
328 | while (addr < next) { | ||
297 | nv_wr32(priv, addr, init->data); | 329 | nv_wr32(priv, addr, init->data); |
298 | addr += init->pitch; | 330 | addr += init->pitch; |
299 | } | 331 | } |
@@ -301,49 +333,53 @@ nvc0_graph_mmio(struct nvc0_graph_priv *priv, struct nvc0_graph_init *init) | |||
301 | } | 333 | } |
302 | 334 | ||
303 | void | 335 | void |
304 | nvc0_graph_icmd(struct nvc0_graph_priv *priv, struct nvc0_graph_init *init) | 336 | nvc0_graph_icmd(struct nvc0_graph_priv *priv, const struct nvc0_graph_pack *p) |
305 | { | 337 | { |
306 | u32 addr, data; | 338 | const struct nvc0_graph_pack *pack; |
307 | int i, j; | 339 | const struct nvc0_graph_init *init; |
340 | u32 data = 0; | ||
308 | 341 | ||
309 | nv_wr32(priv, 0x400208, 0x80000000); | 342 | nv_wr32(priv, 0x400208, 0x80000000); |
310 | for (i = 0; init->count; init++, i++) { | 343 | |
311 | if (!i || data != init->data) { | 344 | pack_for_each_init(init, pack, p) { |
345 | u32 next = init->addr + init->count * init->pitch; | ||
346 | u32 addr = init->addr; | ||
347 | |||
348 | if ((pack == p && init == p->init) || data != init->data) { | ||
312 | nv_wr32(priv, 0x400204, init->data); | 349 | nv_wr32(priv, 0x400204, init->data); |
313 | data = init->data; | 350 | data = init->data; |
314 | } | 351 | } |
315 | 352 | ||
316 | addr = init->addr; | 353 | while (addr < next) { |
317 | for (j = 0; j < init->count; j++) { | ||
318 | nv_wr32(priv, 0x400200, addr); | 354 | nv_wr32(priv, 0x400200, addr); |
355 | nv_wait(priv, 0x400700, 0x00000002, 0x00000000); | ||
319 | addr += init->pitch; | 356 | addr += init->pitch; |
320 | while (nv_rd32(priv, 0x400700) & 0x00000002) {} | ||
321 | } | 357 | } |
322 | } | 358 | } |
359 | |||
323 | nv_wr32(priv, 0x400208, 0x00000000); | 360 | nv_wr32(priv, 0x400208, 0x00000000); |
324 | } | 361 | } |
325 | 362 | ||
326 | void | 363 | void |
327 | nvc0_graph_mthd(struct nvc0_graph_priv *priv, struct nvc0_graph_mthd *mthds) | 364 | nvc0_graph_mthd(struct nvc0_graph_priv *priv, const struct nvc0_graph_pack *p) |
328 | { | 365 | { |
329 | struct nvc0_graph_mthd *mthd; | 366 | const struct nvc0_graph_pack *pack; |
330 | struct nvc0_graph_init *init; | 367 | const struct nvc0_graph_init *init; |
331 | int i = 0, j; | 368 | u32 data = 0; |
332 | u32 data; | ||
333 | |||
334 | while ((mthd = &mthds[i++]) && (init = mthd->init)) { | ||
335 | u32 addr = 0x80000000 | mthd->oclass; | ||
336 | for (data = 0; init->count; init++) { | ||
337 | if (init == mthd->init || data != init->data) { | ||
338 | nv_wr32(priv, 0x40448c, init->data); | ||
339 | data = init->data; | ||
340 | } | ||
341 | 369 | ||
342 | addr = (addr & 0x8000ffff) | (init->addr << 14); | 370 | pack_for_each_init(init, pack, p) { |
343 | for (j = 0; j < init->count; j++) { | 371 | u32 ctrl = 0x80000000 | pack->type; |
344 | nv_wr32(priv, 0x404488, addr); | 372 | u32 next = init->addr + init->count * init->pitch; |
345 | addr += init->pitch << 14; | 373 | u32 addr = init->addr; |
346 | } | 374 | |
375 | if ((pack == p && init == p->init) || data != init->data) { | ||
376 | nv_wr32(priv, 0x40448c, init->data); | ||
377 | data = init->data; | ||
378 | } | ||
379 | |||
380 | while (addr < next) { | ||
381 | nv_wr32(priv, 0x404488, ctrl | (addr << 14)); | ||
382 | addr += init->pitch; | ||
347 | } | 383 | } |
348 | } | 384 | } |
349 | } | 385 | } |
@@ -772,11 +808,12 @@ nvc0_graph_init_fw(struct nvc0_graph_priv *priv, u32 fuc_base, | |||
772 | 808 | ||
773 | static void | 809 | static void |
774 | nvc0_graph_init_csdata(struct nvc0_graph_priv *priv, | 810 | nvc0_graph_init_csdata(struct nvc0_graph_priv *priv, |
775 | struct nvc0_graph_init *init, | 811 | const struct nvc0_graph_pack *pack, |
776 | u32 falcon, u32 starstar, u32 base) | 812 | u32 falcon, u32 starstar, u32 base) |
777 | { | 813 | { |
778 | u32 addr = init->addr; | 814 | const struct nvc0_graph_pack *iter; |
779 | u32 next = addr; | 815 | const struct nvc0_graph_init *init; |
816 | u32 addr = ~0, prev = ~0, xfer = 0; | ||
780 | u32 star, temp; | 817 | u32 star, temp; |
781 | 818 | ||
782 | nv_wr32(priv, falcon + 0x01c0, 0x02000000 + starstar); | 819 | nv_wr32(priv, falcon + 0x01c0, 0x02000000 + starstar); |
@@ -786,22 +823,28 @@ nvc0_graph_init_csdata(struct nvc0_graph_priv *priv, | |||
786 | star = temp; | 823 | star = temp; |
787 | nv_wr32(priv, falcon + 0x01c0, 0x01000000 + star); | 824 | nv_wr32(priv, falcon + 0x01c0, 0x01000000 + star); |
788 | 825 | ||
789 | do { | 826 | pack_for_each_init(init, iter, pack) { |
790 | if (init->addr != next) { | 827 | u32 head = init->addr - base; |
791 | while (addr < next) { | 828 | u32 tail = head + init->count * init->pitch; |
792 | u32 nr = min((int)(next - addr) / 4, 32); | 829 | while (head < tail) { |
793 | nv_wr32(priv, falcon + 0x01c4, | 830 | if (head != prev + 4 || xfer >= 32) { |
794 | ((nr - 1) << 26) | (addr - base)); | 831 | if (xfer) { |
795 | addr += nr * 4; | 832 | u32 data = ((--xfer << 26) | addr); |
796 | star += 4; | 833 | nv_wr32(priv, falcon + 0x01c4, data); |
834 | star += 4; | ||
835 | } | ||
836 | addr = head; | ||
837 | xfer = 0; | ||
797 | } | 838 | } |
798 | addr = next = init->addr; | 839 | prev = head; |
840 | xfer = xfer + 1; | ||
841 | head = head + init->pitch; | ||
799 | } | 842 | } |
800 | next += init->count * 4; | 843 | } |
801 | } while ((init++)->count); | ||
802 | 844 | ||
845 | nv_wr32(priv, falcon + 0x01c4, (--xfer << 26) | addr); | ||
803 | nv_wr32(priv, falcon + 0x01c0, 0x01000004 + starstar); | 846 | nv_wr32(priv, falcon + 0x01c0, 0x01000004 + starstar); |
804 | nv_wr32(priv, falcon + 0x01c4, star); | 847 | nv_wr32(priv, falcon + 0x01c4, star + 4); |
805 | } | 848 | } |
806 | 849 | ||
807 | int | 850 | int |
@@ -809,7 +852,6 @@ nvc0_graph_init_ctxctl(struct nvc0_graph_priv *priv) | |||
809 | { | 852 | { |
810 | struct nvc0_graph_oclass *oclass = (void *)nv_object(priv)->oclass; | 853 | struct nvc0_graph_oclass *oclass = (void *)nv_object(priv)->oclass; |
811 | struct nvc0_grctx_oclass *cclass = (void *)nv_engine(priv)->cclass; | 854 | struct nvc0_grctx_oclass *cclass = (void *)nv_engine(priv)->cclass; |
812 | struct nvc0_graph_init *init; | ||
813 | u32 r000260; | 855 | u32 r000260; |
814 | int i; | 856 | int i; |
815 | 857 | ||
@@ -919,10 +961,6 @@ nvc0_graph_init_ctxctl(struct nvc0_graph_priv *priv) | |||
919 | nv_wr32(priv, 0x409184, oclass->fecs.ucode->code.data[i]); | 961 | nv_wr32(priv, 0x409184, oclass->fecs.ucode->code.data[i]); |
920 | } | 962 | } |
921 | 963 | ||
922 | for (i = 0; (init = cclass->hub[i]); i++) { | ||
923 | nvc0_graph_init_csdata(priv, init, 0x409000, 0x000, 0x000000); | ||
924 | } | ||
925 | |||
926 | /* load GPC microcode */ | 964 | /* load GPC microcode */ |
927 | nv_wr32(priv, 0x41a1c0, 0x01000000); | 965 | nv_wr32(priv, 0x41a1c0, 0x01000000); |
928 | for (i = 0; i < oclass->gpccs.ucode->data.size / 4; i++) | 966 | for (i = 0; i < oclass->gpccs.ucode->data.size / 4; i++) |
@@ -936,12 +974,11 @@ nvc0_graph_init_ctxctl(struct nvc0_graph_priv *priv) | |||
936 | } | 974 | } |
937 | nv_wr32(priv, 0x000260, r000260); | 975 | nv_wr32(priv, 0x000260, r000260); |
938 | 976 | ||
939 | if ((init = cclass->gpc[0])) | 977 | /* load register lists */ |
940 | nvc0_graph_init_csdata(priv, init, 0x41a000, 0x000, 0x418000); | 978 | nvc0_graph_init_csdata(priv, cclass->hub, 0x409000, 0x000, 0x000000); |
941 | if ((init = cclass->gpc[2])) | 979 | nvc0_graph_init_csdata(priv, cclass->gpc, 0x41a000, 0x000, 0x418000); |
942 | nvc0_graph_init_csdata(priv, init, 0x41a000, 0x004, 0x419800); | 980 | nvc0_graph_init_csdata(priv, cclass->tpc, 0x41a000, 0x004, 0x419800); |
943 | if ((init = cclass->gpc[3])) | 981 | nvc0_graph_init_csdata(priv, cclass->ppc, 0x41a000, 0x008, 0x41be00); |
944 | nvc0_graph_init_csdata(priv, init, 0x41a000, 0x008, 0x41be00); | ||
945 | 982 | ||
946 | /* start HUB ucode running, it'll init the GPCs */ | 983 | /* start HUB ucode running, it'll init the GPCs */ |
947 | nv_wr32(priv, 0x40910c, 0x00000000); | 984 | nv_wr32(priv, 0x40910c, 0x00000000); |
@@ -988,8 +1025,7 @@ nvc0_graph_init(struct nouveau_object *object) | |||
988 | nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8); | 1025 | nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8); |
989 | nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8); | 1026 | nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8); |
990 | 1027 | ||
991 | for (i = 0; oclass->mmio[i]; i++) | 1028 | nvc0_graph_mmio(priv, oclass->mmio); |
992 | nvc0_graph_mmio(priv, oclass->mmio[i]); | ||
993 | 1029 | ||
994 | memcpy(tpcnr, priv->tpc_nr, sizeof(priv->tpc_nr)); | 1030 | memcpy(tpcnr, priv->tpc_nr, sizeof(priv->tpc_nr)); |
995 | for (i = 0, gpc = -1; i < priv->tpc_total; i++) { | 1031 | for (i = 0, gpc = -1; i < priv->tpc_total; i++) { |
@@ -1220,22 +1256,6 @@ nvc0_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine, | |||
1220 | return 0; | 1256 | return 0; |
1221 | } | 1257 | } |
1222 | 1258 | ||
1223 | struct nvc0_graph_init * | ||
1224 | nvc0_graph_init_mmio[] = { | ||
1225 | nvc0_graph_init_regs, | ||
1226 | nvc0_graph_init_unk40xx, | ||
1227 | nvc0_graph_init_unk44xx, | ||
1228 | nvc0_graph_init_unk78xx, | ||
1229 | nvc0_graph_init_unk60xx, | ||
1230 | nvc0_graph_init_unk58xx, | ||
1231 | nvc0_graph_init_unk80xx, | ||
1232 | nvc0_graph_init_gpc, | ||
1233 | nvc0_graph_init_tpc, | ||
1234 | nvc0_graph_init_unk88xx, | ||
1235 | nvc0_graph_tpc_0, | ||
1236 | NULL | ||
1237 | }; | ||
1238 | |||
1239 | #include "fuc/hubnvc0.fuc.h" | 1259 | #include "fuc/hubnvc0.fuc.h" |
1240 | 1260 | ||
1241 | struct nvc0_graph_ucode | 1261 | struct nvc0_graph_ucode |
@@ -1267,7 +1287,7 @@ nvc0_graph_oclass = &(struct nvc0_graph_oclass) { | |||
1267 | }, | 1287 | }, |
1268 | .cclass = &nvc0_grctx_oclass, | 1288 | .cclass = &nvc0_grctx_oclass, |
1269 | .sclass = nvc0_graph_sclass, | 1289 | .sclass = nvc0_graph_sclass, |
1270 | .mmio = nvc0_graph_init_mmio, | 1290 | .mmio = nvc0_graph_pack_mmio, |
1271 | .fecs.ucode = &nvc0_graph_fecs_ucode, | 1291 | .fecs.ucode = &nvc0_graph_fecs_ucode, |
1272 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, | 1292 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, |
1273 | }.base; | 1293 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h index 1335967fbe74..a74c24c1ab09 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h | |||
@@ -102,8 +102,6 @@ struct nvc0_graph_chan { | |||
102 | } data[4]; | 102 | } data[4]; |
103 | }; | 103 | }; |
104 | 104 | ||
105 | int nvc0_grctx_generate(struct nvc0_graph_priv *); | ||
106 | |||
107 | int nvc0_graph_context_ctor(struct nouveau_object *, struct nouveau_object *, | 105 | int nvc0_graph_context_ctor(struct nouveau_object *, struct nouveau_object *, |
108 | struct nouveau_oclass *, void *, u32, | 106 | struct nouveau_oclass *, void *, u32, |
109 | struct nouveau_object **); | 107 | struct nouveau_object **); |
@@ -130,34 +128,14 @@ struct nvc0_graph_init { | |||
130 | u32 data; | 128 | u32 data; |
131 | }; | 129 | }; |
132 | 130 | ||
133 | struct nvc0_graph_mthd { | 131 | struct nvc0_graph_pack { |
134 | u16 oclass; | 132 | const struct nvc0_graph_init *init; |
135 | struct nvc0_graph_init *init; | 133 | u32 type; |
136 | }; | ||
137 | |||
138 | struct nvc0_grctx { | ||
139 | struct nvc0_graph_priv *priv; | ||
140 | struct nvc0_graph_data *data; | ||
141 | struct nvc0_graph_mmio *mmio; | ||
142 | int buffer_nr; | ||
143 | u64 buffer[4]; | ||
144 | u64 addr; | ||
145 | }; | 134 | }; |
146 | 135 | ||
147 | struct nvc0_grctx_oclass { | 136 | #define pack_for_each_init(init, pack, head) \ |
148 | struct nouveau_oclass base; | 137 | for (pack = head; pack && pack->init; pack++) \ |
149 | /* main context generation function */ | 138 | for (init = pack->init; init && init->count; init++) |
150 | void (*main)(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
151 | /* context-specific modify-on-first-load list generation function */ | ||
152 | void (*mods)(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
153 | void (*unkn)(struct nvc0_graph_priv *); | ||
154 | /* mmio context data */ | ||
155 | struct nvc0_graph_init **hub; | ||
156 | struct nvc0_graph_init **gpc; | ||
157 | /* indirect context data, generated with icmds/mthds */ | ||
158 | struct nvc0_graph_init *icmd; | ||
159 | struct nvc0_graph_mthd *mthd; | ||
160 | }; | ||
161 | 139 | ||
162 | struct nvc0_graph_ucode { | 140 | struct nvc0_graph_ucode { |
163 | struct nvc0_graph_fuc code; | 141 | struct nvc0_graph_fuc code; |
@@ -171,7 +149,7 @@ struct nvc0_graph_oclass { | |||
171 | struct nouveau_oclass base; | 149 | struct nouveau_oclass base; |
172 | struct nouveau_oclass **cclass; | 150 | struct nouveau_oclass **cclass; |
173 | struct nouveau_oclass *sclass; | 151 | struct nouveau_oclass *sclass; |
174 | struct nvc0_graph_init **mmio; | 152 | const struct nvc0_graph_pack *mmio; |
175 | struct { | 153 | struct { |
176 | struct nvc0_graph_ucode *ucode; | 154 | struct nvc0_graph_ucode *ucode; |
177 | } fecs; | 155 | } fecs; |
@@ -180,119 +158,40 @@ struct nvc0_graph_oclass { | |||
180 | } gpccs; | 158 | } gpccs; |
181 | }; | 159 | }; |
182 | 160 | ||
183 | void nvc0_graph_mmio(struct nvc0_graph_priv *, struct nvc0_graph_init *); | 161 | void nvc0_graph_mmio(struct nvc0_graph_priv *, const struct nvc0_graph_pack *); |
184 | void nvc0_graph_icmd(struct nvc0_graph_priv *, struct nvc0_graph_init *); | 162 | void nvc0_graph_icmd(struct nvc0_graph_priv *, const struct nvc0_graph_pack *); |
185 | void nvc0_graph_mthd(struct nvc0_graph_priv *, struct nvc0_graph_mthd *); | 163 | void nvc0_graph_mthd(struct nvc0_graph_priv *, const struct nvc0_graph_pack *); |
186 | int nvc0_graph_init_ctxctl(struct nvc0_graph_priv *); | 164 | int nvc0_graph_init_ctxctl(struct nvc0_graph_priv *); |
187 | 165 | ||
188 | extern struct nvc0_graph_init nvc0_graph_init_regs[]; | 166 | /* register init value lists */ |
189 | extern struct nvc0_graph_init nvc0_graph_init_unk40xx[]; | 167 | |
190 | extern struct nvc0_graph_init nvc0_graph_init_unk44xx[]; | 168 | extern const struct nvc0_graph_init nvc0_graph_init_main_0[]; |
191 | extern struct nvc0_graph_init nvc0_graph_init_unk78xx[]; | 169 | extern const struct nvc0_graph_init nvc0_graph_init_fe_0[]; |
192 | extern struct nvc0_graph_init nvc0_graph_init_unk60xx[]; | 170 | extern const struct nvc0_graph_init nvc0_graph_init_pri_0[]; |
193 | extern struct nvc0_graph_init nvc0_graph_init_unk58xx[]; | 171 | extern const struct nvc0_graph_init nvc0_graph_init_rstr2d_0[]; |
194 | extern struct nvc0_graph_init nvc0_graph_init_unk80xx[]; | 172 | extern const struct nvc0_graph_init nvc0_graph_init_pd_0[]; |
195 | extern struct nvc0_graph_init nvc0_graph_init_gpc[]; | 173 | extern const struct nvc0_graph_init nvc0_graph_init_ds_0[]; |
196 | extern struct nvc0_graph_init nvc0_graph_init_unk88xx[]; | 174 | extern const struct nvc0_graph_init nvc0_graph_init_scc_0[]; |
197 | extern struct nvc0_graph_init nvc0_graph_tpc_0[]; | 175 | extern const struct nvc0_graph_init nvc0_graph_init_gpc_0[]; |
198 | 176 | extern const struct nvc0_graph_init nvc0_graph_init_be_0[]; | |
199 | extern struct nvc0_graph_init nvc4_graph_init_unk58xx[]; | 177 | extern const struct nvc0_graph_init nvc0_graph_init_fe_1[]; |
200 | 178 | extern const struct nvc0_graph_init nvc0_graph_init_tpc_1[]; | |
201 | extern struct nvc0_graph_init nvd9_graph_init_unk58xx[]; | 179 | |
202 | extern struct nvc0_graph_init nvd9_graph_init_unk64xx[]; | 180 | extern const struct nvc0_graph_init nvc4_graph_init_ds_0[]; |
203 | 181 | ||
204 | extern struct nvc0_graph_init nve4_graph_init_regs[]; | 182 | extern const struct nvc0_graph_init nvd9_graph_init_pd_0[]; |
205 | extern struct nvc0_graph_init nve4_graph_init_unk[]; | 183 | extern const struct nvc0_graph_init nvd9_graph_init_ds_0[]; |
206 | extern struct nvc0_graph_init nve4_graph_init_unk88xx[]; | 184 | extern const struct nvc0_graph_init nvd9_graph_init_gpc_0[]; |
207 | 185 | extern const struct nvc0_graph_init nvd9_graph_init_fe_1[]; | |
208 | extern struct nvc0_graph_init nvf0_graph_init_unk40xx[]; | 186 | |
209 | extern struct nvc0_graph_init nvf0_graph_init_unk70xx[]; | 187 | extern const struct nvc0_graph_init nvd7_graph_init_ppc_0[]; |
210 | extern struct nvc0_graph_init nvf0_graph_init_unk5bxx[]; | 188 | |
211 | extern struct nvc0_graph_init nvf0_graph_init_tpc[]; | 189 | extern const struct nvc0_graph_init nve4_graph_init_main_0[]; |
212 | 190 | extern const struct nvc0_graph_init nve4_graph_init_be_0[]; | |
213 | int nvc0_grctx_generate(struct nvc0_graph_priv *); | 191 | |
214 | void nvc0_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *); | 192 | extern const struct nvc0_graph_init nvf0_graph_init_fe_0[]; |
215 | void nvc0_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *); | 193 | extern const struct nvc0_graph_init nvf0_graph_init_sked_0[]; |
216 | void nvc0_grctx_generate_unkn(struct nvc0_graph_priv *); | 194 | extern const struct nvc0_graph_init nvf0_graph_init_cwd_0[]; |
217 | void nvc0_grctx_generate_tpcid(struct nvc0_graph_priv *); | 195 | |
218 | void nvc0_grctx_generate_r406028(struct nvc0_graph_priv *); | ||
219 | void nvc0_grctx_generate_r4060a8(struct nvc0_graph_priv *); | ||
220 | void nvc0_grctx_generate_r418bb8(struct nvc0_graph_priv *); | ||
221 | void nve4_grctx_generate_r418bb8(struct nvc0_graph_priv *); | ||
222 | void nvc0_grctx_generate_r406800(struct nvc0_graph_priv *); | ||
223 | |||
224 | extern struct nouveau_oclass *nvc0_grctx_oclass; | ||
225 | extern struct nvc0_graph_init *nvc0_grctx_init_hub[]; | ||
226 | extern struct nvc0_graph_init nvc0_grctx_init_base[]; | ||
227 | extern struct nvc0_graph_init nvc0_grctx_init_unk40xx[]; | ||
228 | extern struct nvc0_graph_init nvc0_grctx_init_unk44xx[]; | ||
229 | extern struct nvc0_graph_init nvc0_grctx_init_unk46xx[]; | ||
230 | extern struct nvc0_graph_init nvc0_grctx_init_unk47xx[]; | ||
231 | extern struct nvc0_graph_init nvc0_grctx_init_unk60xx[]; | ||
232 | extern struct nvc0_graph_init nvc0_grctx_init_unk64xx[]; | ||
233 | extern struct nvc0_graph_init nvc0_grctx_init_unk78xx[]; | ||
234 | extern struct nvc0_graph_init nvc0_grctx_init_unk80xx[]; | ||
235 | extern struct nvc0_graph_init nvc0_grctx_init_gpc_0[]; | ||
236 | extern struct nvc0_graph_init nvc0_grctx_init_gpc_1[]; | ||
237 | extern struct nvc0_graph_init nvc0_grctx_init_tpc[]; | ||
238 | extern struct nvc0_graph_init nvc0_grctx_init_icmd[]; | ||
239 | extern struct nvc0_graph_init nvd9_grctx_init_icmd[]; // | ||
240 | |||
241 | extern struct nvc0_graph_mthd nvc0_grctx_init_mthd[]; | ||
242 | extern struct nvc0_graph_init nvc0_grctx_init_902d[]; | ||
243 | extern struct nvc0_graph_init nvc0_grctx_init_9039[]; | ||
244 | extern struct nvc0_graph_init nvc0_grctx_init_90c0[]; | ||
245 | extern struct nvc0_graph_init nvc0_grctx_init_mthd_magic[]; | ||
246 | |||
247 | void nvc1_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
248 | void nvc1_grctx_generate_unkn(struct nvc0_graph_priv *); | ||
249 | extern struct nouveau_oclass *nvc1_grctx_oclass; | ||
250 | extern struct nvc0_graph_init nvc1_grctx_init_9097[]; | ||
251 | |||
252 | extern struct nouveau_oclass *nvc4_grctx_oclass; | ||
253 | |||
254 | extern struct nouveau_oclass *nvc8_grctx_oclass; | ||
255 | extern struct nvc0_graph_init nvc8_grctx_init_9197[]; | ||
256 | extern struct nvc0_graph_init nvc8_grctx_init_9297[]; | ||
257 | |||
258 | extern struct nouveau_oclass *nvd7_grctx_oclass; | ||
259 | |||
260 | extern struct nouveau_oclass *nvd9_grctx_oclass; | ||
261 | extern struct nvc0_graph_init nvd9_grctx_init_rop[]; | ||
262 | extern struct nvc0_graph_mthd nvd9_grctx_init_mthd[]; | ||
263 | |||
264 | void nve4_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
265 | void nve4_grctx_generate_unkn(struct nvc0_graph_priv *); | ||
266 | extern struct nouveau_oclass *nve4_grctx_oclass; | ||
267 | extern struct nvc0_graph_init nve4_grctx_init_unk46xx[]; | ||
268 | extern struct nvc0_graph_init nve4_grctx_init_unk47xx[]; | ||
269 | extern struct nvc0_graph_init nve4_grctx_init_unk58xx[]; | ||
270 | extern struct nvc0_graph_init nve4_grctx_init_unk80xx[]; | ||
271 | extern struct nvc0_graph_init nve4_grctx_init_unk90xx[]; | ||
272 | |||
273 | extern struct nouveau_oclass *nvf0_grctx_oclass; | ||
274 | extern struct nvc0_graph_init nvf0_grctx_init_unk44xx[]; | ||
275 | extern struct nvc0_graph_init nvf0_grctx_init_unk5bxx[]; | ||
276 | extern struct nvc0_graph_init nvf0_grctx_init_unk60xx[]; | ||
277 | |||
278 | extern struct nouveau_oclass *nv108_grctx_oclass; | ||
279 | |||
280 | #define mmio_data(s,a,p) do { \ | ||
281 | info->buffer[info->buffer_nr] = round_up(info->addr, (a)); \ | ||
282 | info->addr = info->buffer[info->buffer_nr++] + (s); \ | ||
283 | info->data->size = (s); \ | ||
284 | info->data->align = (a); \ | ||
285 | info->data->access = (p); \ | ||
286 | info->data++; \ | ||
287 | } while(0) | ||
288 | |||
289 | #define mmio_list(r,d,s,b) do { \ | ||
290 | info->mmio->addr = (r); \ | ||
291 | info->mmio->data = (d); \ | ||
292 | info->mmio->shift = (s); \ | ||
293 | info->mmio->buffer = (b); \ | ||
294 | info->mmio++; \ | ||
295 | nv_wr32(priv, (r), (d) | ((s) ? (info->buffer[(b)] >> (s)) : 0)); \ | ||
296 | } while(0) | ||
297 | 196 | ||
298 | #endif | 197 | #endif |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c index 0215c2541c98..da220b7667f5 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c | |||
@@ -23,6 +23,7 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * Graphics object classes | 29 | * Graphics object classes |
@@ -39,11 +40,11 @@ nvc1_graph_sclass[] = { | |||
39 | }; | 40 | }; |
40 | 41 | ||
41 | /******************************************************************************* | 42 | /******************************************************************************* |
42 | * PGRAPH engine/subdev functions | 43 | * PGRAPH register lists |
43 | ******************************************************************************/ | 44 | ******************************************************************************/ |
44 | 45 | ||
45 | static struct nvc0_graph_init | 46 | static const struct nvc0_graph_init |
46 | nvc1_graph_init_gpc[] = { | 47 | nvc1_graph_init_gpc_0[] = { |
47 | { 0x4184a0, 1, 0x04, 0x00000000 }, | 48 | { 0x4184a0, 1, 0x04, 0x00000000 }, |
48 | { 0x418604, 1, 0x04, 0x00000000 }, | 49 | { 0x418604, 1, 0x04, 0x00000000 }, |
49 | { 0x418680, 1, 0x04, 0x00000000 }, | 50 | { 0x418680, 1, 0x04, 0x00000000 }, |
@@ -70,8 +71,8 @@ nvc1_graph_init_gpc[] = { | |||
70 | {} | 71 | {} |
71 | }; | 72 | }; |
72 | 73 | ||
73 | static struct nvc0_graph_init | 74 | static const struct nvc0_graph_init |
74 | nvc1_graph_init_tpc[] = { | 75 | nvc1_graph_init_tpc_0[] = { |
75 | { 0x419d08, 2, 0x04, 0x00000000 }, | 76 | { 0x419d08, 2, 0x04, 0x00000000 }, |
76 | { 0x419d10, 1, 0x04, 0x00000014 }, | 77 | { 0x419d10, 1, 0x04, 0x00000014 }, |
77 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 78 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -112,22 +113,26 @@ nvc1_graph_init_tpc[] = { | |||
112 | {} | 113 | {} |
113 | }; | 114 | }; |
114 | 115 | ||
115 | struct nvc0_graph_init * | 116 | static const struct nvc0_graph_pack |
116 | nvc1_graph_init_mmio[] = { | 117 | nvc1_graph_pack_mmio[] = { |
117 | nvc0_graph_init_regs, | 118 | { nvc0_graph_init_main_0 }, |
118 | nvc0_graph_init_unk40xx, | 119 | { nvc0_graph_init_fe_0 }, |
119 | nvc0_graph_init_unk44xx, | 120 | { nvc0_graph_init_pri_0 }, |
120 | nvc0_graph_init_unk78xx, | 121 | { nvc0_graph_init_rstr2d_0 }, |
121 | nvc0_graph_init_unk60xx, | 122 | { nvc0_graph_init_pd_0 }, |
122 | nvc4_graph_init_unk58xx, | 123 | { nvc4_graph_init_ds_0 }, |
123 | nvc0_graph_init_unk80xx, | 124 | { nvc0_graph_init_scc_0 }, |
124 | nvc1_graph_init_gpc, | 125 | { nvc1_graph_init_gpc_0 }, |
125 | nvc1_graph_init_tpc, | 126 | { nvc1_graph_init_tpc_0 }, |
126 | nvc0_graph_init_unk88xx, | 127 | { nvc0_graph_init_be_0 }, |
127 | nvc0_graph_tpc_0, | 128 | { nvc0_graph_init_fe_1 }, |
128 | NULL | 129 | {} |
129 | }; | 130 | }; |
130 | 131 | ||
132 | /******************************************************************************* | ||
133 | * PGRAPH engine/subdev functions | ||
134 | ******************************************************************************/ | ||
135 | |||
131 | struct nouveau_oclass * | 136 | struct nouveau_oclass * |
132 | nvc1_graph_oclass = &(struct nvc0_graph_oclass) { | 137 | nvc1_graph_oclass = &(struct nvc0_graph_oclass) { |
133 | .base.handle = NV_ENGINE(GR, 0xc1), | 138 | .base.handle = NV_ENGINE(GR, 0xc1), |
@@ -139,7 +144,7 @@ nvc1_graph_oclass = &(struct nvc0_graph_oclass) { | |||
139 | }, | 144 | }, |
140 | .cclass = &nvc1_grctx_oclass, | 145 | .cclass = &nvc1_grctx_oclass, |
141 | .sclass = nvc1_graph_sclass, | 146 | .sclass = nvc1_graph_sclass, |
142 | .mmio = nvc1_graph_init_mmio, | 147 | .mmio = nvc1_graph_pack_mmio, |
143 | .fecs.ucode = &nvc0_graph_fecs_ucode, | 148 | .fecs.ucode = &nvc0_graph_fecs_ucode, |
144 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, | 149 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, |
145 | }.base; | 150 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c index 1c74d8e5d7ee..76fcf51eb401 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c | |||
@@ -23,13 +23,14 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * PGRAPH engine/subdev functions | 29 | * PGRAPH register lists |
29 | ******************************************************************************/ | 30 | ******************************************************************************/ |
30 | 31 | ||
31 | struct nvc0_graph_init | 32 | const struct nvc0_graph_init |
32 | nvc4_graph_init_unk58xx[] = { | 33 | nvc4_graph_init_ds_0[] = { |
33 | { 0x405844, 1, 0x04, 0x00ffffff }, | 34 | { 0x405844, 1, 0x04, 0x00ffffff }, |
34 | { 0x405850, 1, 0x04, 0x00000000 }, | 35 | { 0x405850, 1, 0x04, 0x00000000 }, |
35 | { 0x405900, 1, 0x04, 0x00002834 }, | 36 | { 0x405900, 1, 0x04, 0x00002834 }, |
@@ -37,8 +38,8 @@ nvc4_graph_init_unk58xx[] = { | |||
37 | {} | 38 | {} |
38 | }; | 39 | }; |
39 | 40 | ||
40 | static struct nvc0_graph_init | 41 | static const struct nvc0_graph_init |
41 | nvc4_graph_init_tpc[] = { | 42 | nvc4_graph_init_tpc_0[] = { |
42 | { 0x419d08, 2, 0x04, 0x00000000 }, | 43 | { 0x419d08, 2, 0x04, 0x00000000 }, |
43 | { 0x419d10, 1, 0x04, 0x00000014 }, | 44 | { 0x419d10, 1, 0x04, 0x00000014 }, |
44 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 45 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -77,22 +78,26 @@ nvc4_graph_init_tpc[] = { | |||
77 | {} | 78 | {} |
78 | }; | 79 | }; |
79 | 80 | ||
80 | static struct nvc0_graph_init * | 81 | static const struct nvc0_graph_pack |
81 | nvc4_graph_init_mmio[] = { | 82 | nvc4_graph_pack_mmio[] = { |
82 | nvc0_graph_init_regs, | 83 | { nvc0_graph_init_main_0 }, |
83 | nvc0_graph_init_unk40xx, | 84 | { nvc0_graph_init_fe_0 }, |
84 | nvc0_graph_init_unk44xx, | 85 | { nvc0_graph_init_pri_0 }, |
85 | nvc0_graph_init_unk78xx, | 86 | { nvc0_graph_init_rstr2d_0 }, |
86 | nvc0_graph_init_unk60xx, | 87 | { nvc0_graph_init_pd_0 }, |
87 | nvc4_graph_init_unk58xx, | 88 | { nvc4_graph_init_ds_0 }, |
88 | nvc0_graph_init_unk80xx, | 89 | { nvc0_graph_init_scc_0 }, |
89 | nvc0_graph_init_gpc, | 90 | { nvc0_graph_init_gpc_0 }, |
90 | nvc4_graph_init_tpc, | 91 | { nvc4_graph_init_tpc_0 }, |
91 | nvc0_graph_init_unk88xx, | 92 | { nvc0_graph_init_be_0 }, |
92 | nvc0_graph_tpc_0, | 93 | { nvc0_graph_init_fe_1 }, |
93 | NULL | 94 | {} |
94 | }; | 95 | }; |
95 | 96 | ||
97 | /******************************************************************************* | ||
98 | * PGRAPH engine/subdev functions | ||
99 | ******************************************************************************/ | ||
100 | |||
96 | struct nouveau_oclass * | 101 | struct nouveau_oclass * |
97 | nvc4_graph_oclass = &(struct nvc0_graph_oclass) { | 102 | nvc4_graph_oclass = &(struct nvc0_graph_oclass) { |
98 | .base.handle = NV_ENGINE(GR, 0xc3), | 103 | .base.handle = NV_ENGINE(GR, 0xc3), |
@@ -104,7 +109,7 @@ nvc4_graph_oclass = &(struct nvc0_graph_oclass) { | |||
104 | }, | 109 | }, |
105 | .cclass = &nvc4_grctx_oclass, | 110 | .cclass = &nvc4_grctx_oclass, |
106 | .sclass = nvc0_graph_sclass, | 111 | .sclass = nvc0_graph_sclass, |
107 | .mmio = nvc4_graph_init_mmio, | 112 | .mmio = nvc4_graph_pack_mmio, |
108 | .fecs.ucode = &nvc0_graph_fecs_ucode, | 113 | .fecs.ucode = &nvc0_graph_fecs_ucode, |
109 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, | 114 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, |
110 | }.base; | 115 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c index 02845e567314..b4dccd6429b3 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c | |||
@@ -23,6 +23,7 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * Graphics object classes | 29 | * Graphics object classes |
@@ -40,11 +41,11 @@ nvc8_graph_sclass[] = { | |||
40 | }; | 41 | }; |
41 | 42 | ||
42 | /******************************************************************************* | 43 | /******************************************************************************* |
43 | * PGRAPH engine/subdev functions | 44 | * PGRAPH register lists |
44 | ******************************************************************************/ | 45 | ******************************************************************************/ |
45 | 46 | ||
46 | static struct nvc0_graph_init | 47 | static const struct nvc0_graph_init |
47 | nvc8_graph_init_gpc[] = { | 48 | nvc8_graph_init_gpc_0[] = { |
48 | { 0x4184a0, 1, 0x04, 0x00000000 }, | 49 | { 0x4184a0, 1, 0x04, 0x00000000 }, |
49 | { 0x418604, 1, 0x04, 0x00000000 }, | 50 | { 0x418604, 1, 0x04, 0x00000000 }, |
50 | { 0x418680, 1, 0x04, 0x00000000 }, | 51 | { 0x418680, 1, 0x04, 0x00000000 }, |
@@ -71,8 +72,8 @@ nvc8_graph_init_gpc[] = { | |||
71 | {} | 72 | {} |
72 | }; | 73 | }; |
73 | 74 | ||
74 | static struct nvc0_graph_init | 75 | static const struct nvc0_graph_init |
75 | nvc8_graph_init_tpc[] = { | 76 | nvc8_graph_init_tpc_0[] = { |
76 | { 0x419d08, 2, 0x04, 0x00000000 }, | 77 | { 0x419d08, 2, 0x04, 0x00000000 }, |
77 | { 0x419d10, 1, 0x04, 0x00000014 }, | 78 | { 0x419d10, 1, 0x04, 0x00000014 }, |
78 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 79 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -108,22 +109,27 @@ nvc8_graph_init_tpc[] = { | |||
108 | {} | 109 | {} |
109 | }; | 110 | }; |
110 | 111 | ||
111 | static struct nvc0_graph_init * | 112 | static const struct nvc0_graph_pack |
112 | nvc8_graph_init_mmio[] = { | 113 | nvc8_graph_pack_mmio[] = { |
113 | nvc0_graph_init_regs, | 114 | { nvc0_graph_init_main_0 }, |
114 | nvc0_graph_init_unk40xx, | 115 | { nvc0_graph_init_fe_0 }, |
115 | nvc0_graph_init_unk44xx, | 116 | { nvc0_graph_init_pri_0 }, |
116 | nvc0_graph_init_unk78xx, | 117 | { nvc0_graph_init_rstr2d_0 }, |
117 | nvc0_graph_init_unk60xx, | 118 | { nvc0_graph_init_pd_0 }, |
118 | nvc0_graph_init_unk58xx, | 119 | { nvc0_graph_init_ds_0 }, |
119 | nvc0_graph_init_unk80xx, | 120 | { nvc0_graph_init_scc_0 }, |
120 | nvc8_graph_init_gpc, | 121 | { nvc8_graph_init_gpc_0 }, |
121 | nvc8_graph_init_tpc, | 122 | { nvc8_graph_init_tpc_0 }, |
122 | nvc0_graph_init_unk88xx, | 123 | { nvc0_graph_init_be_0 }, |
123 | nvc0_graph_tpc_0, | 124 | { nvc0_graph_init_fe_1 }, |
124 | NULL | 125 | { nvc0_graph_init_tpc_1 }, |
126 | {} | ||
125 | }; | 127 | }; |
126 | 128 | ||
129 | /******************************************************************************* | ||
130 | * PGRAPH engine/subdev functions | ||
131 | ******************************************************************************/ | ||
132 | |||
127 | struct nouveau_oclass * | 133 | struct nouveau_oclass * |
128 | nvc8_graph_oclass = &(struct nvc0_graph_oclass) { | 134 | nvc8_graph_oclass = &(struct nvc0_graph_oclass) { |
129 | .base.handle = NV_ENGINE(GR, 0xc8), | 135 | .base.handle = NV_ENGINE(GR, 0xc8), |
@@ -135,7 +141,7 @@ nvc8_graph_oclass = &(struct nvc0_graph_oclass) { | |||
135 | }, | 141 | }, |
136 | .cclass = &nvc8_grctx_oclass, | 142 | .cclass = &nvc8_grctx_oclass, |
137 | .sclass = nvc8_graph_sclass, | 143 | .sclass = nvc8_graph_sclass, |
138 | .mmio = nvc8_graph_init_mmio, | 144 | .mmio = nvc8_graph_pack_mmio, |
139 | .fecs.ucode = &nvc0_graph_fecs_ucode, | 145 | .fecs.ucode = &nvc0_graph_fecs_ucode, |
140 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, | 146 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, |
141 | }.base; | 147 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c index 5052d7ab4d72..b2a66eb90418 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c | |||
@@ -23,71 +23,14 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * PGRAPH engine/subdev functions | 29 | * PGRAPH register lists |
29 | ******************************************************************************/ | 30 | ******************************************************************************/ |
30 | 31 | ||
31 | #include "fuc/hubnvd7.fuc.h" | 32 | static const struct nvc0_graph_init |
32 | 33 | nvd7_graph_init_tpc_0[] = { | |
33 | struct nvc0_graph_ucode | ||
34 | nvd7_graph_fecs_ucode = { | ||
35 | .code.data = nvd7_grhub_code, | ||
36 | .code.size = sizeof(nvd7_grhub_code), | ||
37 | .data.data = nvd7_grhub_data, | ||
38 | .data.size = sizeof(nvd7_grhub_data), | ||
39 | }; | ||
40 | |||
41 | #include "fuc/gpcnvd7.fuc.h" | ||
42 | |||
43 | struct nvc0_graph_ucode | ||
44 | nvd7_graph_gpccs_ucode = { | ||
45 | .code.data = nvd7_grgpc_code, | ||
46 | .code.size = sizeof(nvd7_grgpc_code), | ||
47 | .data.data = nvd7_grgpc_data, | ||
48 | .data.size = sizeof(nvd7_grgpc_data), | ||
49 | }; | ||
50 | |||
51 | static struct nvc0_graph_init | ||
52 | nvd7_graph_init_gpc[] = { | ||
53 | { 0x418408, 1, 0x04, 0x00000000 }, | ||
54 | { 0x4184a0, 1, 0x04, 0x00000000 }, | ||
55 | { 0x4184a4, 2, 0x04, 0x00000000 }, | ||
56 | { 0x418604, 1, 0x04, 0x00000000 }, | ||
57 | { 0x418680, 1, 0x04, 0x00000000 }, | ||
58 | { 0x418714, 1, 0x04, 0x00000000 }, | ||
59 | { 0x418384, 1, 0x04, 0x00000000 }, | ||
60 | { 0x418814, 3, 0x04, 0x00000000 }, | ||
61 | { 0x418b04, 1, 0x04, 0x00000000 }, | ||
62 | { 0x4188c8, 2, 0x04, 0x00000000 }, | ||
63 | { 0x4188d0, 1, 0x04, 0x00010000 }, | ||
64 | { 0x4188d4, 1, 0x04, 0x00000001 }, | ||
65 | { 0x418910, 1, 0x04, 0x00010001 }, | ||
66 | { 0x418914, 1, 0x04, 0x00000301 }, | ||
67 | { 0x418918, 1, 0x04, 0x00800000 }, | ||
68 | { 0x418980, 1, 0x04, 0x77777770 }, | ||
69 | { 0x418984, 3, 0x04, 0x77777777 }, | ||
70 | { 0x418c04, 1, 0x04, 0x00000000 }, | ||
71 | { 0x418c64, 1, 0x04, 0x00000000 }, | ||
72 | { 0x418c68, 1, 0x04, 0x00000000 }, | ||
73 | { 0x418c88, 1, 0x04, 0x00000000 }, | ||
74 | { 0x418cb4, 2, 0x04, 0x00000000 }, | ||
75 | { 0x418d00, 1, 0x04, 0x00000000 }, | ||
76 | { 0x418d28, 1, 0x04, 0x00000000 }, | ||
77 | { 0x418f00, 1, 0x04, 0x00000000 }, | ||
78 | { 0x418f08, 1, 0x04, 0x00000000 }, | ||
79 | { 0x418f20, 2, 0x04, 0x00000000 }, | ||
80 | { 0x418e00, 1, 0x04, 0x00000003 }, | ||
81 | { 0x418e08, 1, 0x04, 0x00000000 }, | ||
82 | { 0x418e1c, 1, 0x04, 0x00000000 }, | ||
83 | { 0x418e20, 1, 0x04, 0x00000000 }, | ||
84 | { 0x41900c, 1, 0x04, 0x00000000 }, | ||
85 | { 0x419018, 1, 0x04, 0x00000000 }, | ||
86 | {} | ||
87 | }; | ||
88 | |||
89 | static struct nvc0_graph_init | ||
90 | nvd7_graph_init_tpc[] = { | ||
91 | { 0x419d08, 2, 0x04, 0x00000000 }, | 34 | { 0x419d08, 2, 0x04, 0x00000000 }, |
92 | { 0x419d10, 1, 0x04, 0x00000014 }, | 35 | { 0x419d10, 1, 0x04, 0x00000014 }, |
93 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 36 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -98,7 +41,7 @@ nvd7_graph_init_tpc[] = { | |||
98 | { 0x41980c, 1, 0x04, 0x00000010 }, | 41 | { 0x41980c, 1, 0x04, 0x00000010 }, |
99 | { 0x419844, 1, 0x04, 0x00000000 }, | 42 | { 0x419844, 1, 0x04, 0x00000000 }, |
100 | { 0x41984c, 1, 0x04, 0x00005bc8 }, | 43 | { 0x41984c, 1, 0x04, 0x00005bc8 }, |
101 | { 0x419850, 2, 0x04, 0x00000000 }, | 44 | { 0x419850, 3, 0x04, 0x00000000 }, |
102 | { 0x419c98, 1, 0x04, 0x00000000 }, | 45 | { 0x419c98, 1, 0x04, 0x00000000 }, |
103 | { 0x419ca8, 1, 0x04, 0x80000000 }, | 46 | { 0x419ca8, 1, 0x04, 0x80000000 }, |
104 | { 0x419cb4, 1, 0x04, 0x00000000 }, | 47 | { 0x419cb4, 1, 0x04, 0x00000000 }, |
@@ -123,31 +66,60 @@ nvd7_graph_init_tpc[] = { | |||
123 | {} | 66 | {} |
124 | }; | 67 | }; |
125 | 68 | ||
126 | static struct nvc0_graph_init | 69 | const struct nvc0_graph_init |
127 | nvd7_graph_init_tpc_0[] = { | 70 | nvd7_graph_init_ppc_0[] = { |
128 | { 0x40402c, 1, 0x04, 0x00000000 }, | 71 | { 0x41be04, 1, 0x04, 0x00000000 }, |
129 | { 0x4040f0, 1, 0x04, 0x00000000 }, | 72 | { 0x41be08, 1, 0x04, 0x00000004 }, |
130 | { 0x404174, 1, 0x04, 0x00000000 }, | 73 | { 0x41be0c, 1, 0x04, 0x00000000 }, |
131 | { 0x503018, 1, 0x04, 0x00000001 }, | 74 | { 0x41be10, 1, 0x04, 0x003b8bc7 }, |
75 | { 0x41be14, 2, 0x04, 0x00000000 }, | ||
76 | { 0x41bfd4, 1, 0x04, 0x00800000 }, | ||
77 | { 0x41bfdc, 1, 0x04, 0x00000000 }, | ||
78 | { 0x41bff8, 2, 0x04, 0x00000000 }, | ||
79 | { 0x41becc, 1, 0x04, 0x00000000 }, | ||
80 | { 0x41bee8, 2, 0x04, 0x00000000 }, | ||
132 | {} | 81 | {} |
133 | }; | 82 | }; |
134 | 83 | ||
135 | static struct nvc0_graph_init * | 84 | static const struct nvc0_graph_pack |
136 | nvd7_graph_init_mmio[] = { | 85 | nvd7_graph_pack_mmio[] = { |
137 | nvc0_graph_init_regs, | 86 | { nvc0_graph_init_main_0 }, |
138 | nvc0_graph_init_unk40xx, | 87 | { nvc0_graph_init_fe_0 }, |
139 | nvc0_graph_init_unk44xx, | 88 | { nvc0_graph_init_pri_0 }, |
140 | nvc0_graph_init_unk78xx, | 89 | { nvc0_graph_init_rstr2d_0 }, |
141 | nvc0_graph_init_unk60xx, | 90 | { nvd9_graph_init_pd_0 }, |
142 | nvd9_graph_init_unk64xx, | 91 | { nvd9_graph_init_ds_0 }, |
143 | nvd9_graph_init_unk58xx, | 92 | { nvc0_graph_init_scc_0 }, |
144 | nvc0_graph_init_unk80xx, | 93 | { nvd9_graph_init_gpc_0 }, |
145 | nvd7_graph_init_gpc, | 94 | { nvd7_graph_init_tpc_0 }, |
146 | nvd7_graph_init_tpc, | 95 | { nvd7_graph_init_ppc_0 }, |
147 | nve4_graph_init_unk, | 96 | { nvc0_graph_init_be_0 }, |
148 | nvc0_graph_init_unk88xx, | 97 | { nvd9_graph_init_fe_1 }, |
149 | nvd7_graph_init_tpc_0, | 98 | {} |
150 | NULL | 99 | }; |
100 | |||
101 | /******************************************************************************* | ||
102 | * PGRAPH engine/subdev functions | ||
103 | ******************************************************************************/ | ||
104 | |||
105 | #include "fuc/hubnvd7.fuc.h" | ||
106 | |||
107 | struct nvc0_graph_ucode | ||
108 | nvd7_graph_fecs_ucode = { | ||
109 | .code.data = nvd7_grhub_code, | ||
110 | .code.size = sizeof(nvd7_grhub_code), | ||
111 | .data.data = nvd7_grhub_data, | ||
112 | .data.size = sizeof(nvd7_grhub_data), | ||
113 | }; | ||
114 | |||
115 | #include "fuc/gpcnvd7.fuc.h" | ||
116 | |||
117 | struct nvc0_graph_ucode | ||
118 | nvd7_graph_gpccs_ucode = { | ||
119 | .code.data = nvd7_grgpc_code, | ||
120 | .code.size = sizeof(nvd7_grgpc_code), | ||
121 | .data.data = nvd7_grgpc_data, | ||
122 | .data.size = sizeof(nvd7_grgpc_data), | ||
151 | }; | 123 | }; |
152 | 124 | ||
153 | struct nouveau_oclass * | 125 | struct nouveau_oclass * |
@@ -161,7 +133,7 @@ nvd7_graph_oclass = &(struct nvc0_graph_oclass) { | |||
161 | }, | 133 | }, |
162 | .cclass = &nvd7_grctx_oclass, | 134 | .cclass = &nvd7_grctx_oclass, |
163 | .sclass = nvc8_graph_sclass, | 135 | .sclass = nvc8_graph_sclass, |
164 | .mmio = nvd7_graph_init_mmio, | 136 | .mmio = nvd7_graph_pack_mmio, |
165 | .fecs.ucode = &nvd7_graph_fecs_ucode, | 137 | .fecs.ucode = &nvd7_graph_fecs_ucode, |
166 | .gpccs.ucode = &nvd7_graph_gpccs_ucode, | 138 | .gpccs.ucode = &nvd7_graph_gpccs_ucode, |
167 | }.base; | 139 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c index 652098e0df3f..84f7492994c7 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c | |||
@@ -23,33 +23,33 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * PGRAPH engine/subdev functions | 29 | * PGRAPH register lists |
29 | ******************************************************************************/ | 30 | ******************************************************************************/ |
30 | 31 | ||
31 | struct nvc0_graph_init | 32 | const struct nvc0_graph_init |
32 | nvd9_graph_init_unk64xx[] = { | 33 | nvd9_graph_init_pd_0[] = { |
34 | { 0x406024, 1, 0x04, 0x00000000 }, | ||
33 | { 0x4064f0, 3, 0x04, 0x00000000 }, | 35 | { 0x4064f0, 3, 0x04, 0x00000000 }, |
34 | {} | 36 | {} |
35 | }; | 37 | }; |
36 | 38 | ||
37 | struct nvc0_graph_init | 39 | const struct nvc0_graph_init |
38 | nvd9_graph_init_unk58xx[] = { | 40 | nvd9_graph_init_ds_0[] = { |
39 | { 0x405844, 1, 0x04, 0x00ffffff }, | 41 | { 0x405844, 1, 0x04, 0x00ffffff }, |
40 | { 0x405850, 1, 0x04, 0x00000000 }, | 42 | { 0x405850, 1, 0x04, 0x00000000 }, |
41 | { 0x405900, 1, 0x04, 0x00002834 }, | 43 | { 0x405900, 1, 0x04, 0x00002834 }, |
42 | { 0x405908, 1, 0x04, 0x00000000 }, | 44 | { 0x405908, 1, 0x04, 0x00000000 }, |
43 | { 0x405928, 1, 0x04, 0x00000000 }, | 45 | { 0x405928, 2, 0x04, 0x00000000 }, |
44 | { 0x40592c, 1, 0x04, 0x00000000 }, | ||
45 | {} | 46 | {} |
46 | }; | 47 | }; |
47 | 48 | ||
48 | static struct nvc0_graph_init | 49 | const struct nvc0_graph_init |
49 | nvd9_graph_init_gpc[] = { | 50 | nvd9_graph_init_gpc_0[] = { |
50 | { 0x418408, 1, 0x04, 0x00000000 }, | 51 | { 0x418408, 1, 0x04, 0x00000000 }, |
51 | { 0x4184a0, 1, 0x04, 0x00000000 }, | 52 | { 0x4184a0, 3, 0x04, 0x00000000 }, |
52 | { 0x4184a4, 2, 0x04, 0x00000000 }, | ||
53 | { 0x418604, 1, 0x04, 0x00000000 }, | 53 | { 0x418604, 1, 0x04, 0x00000000 }, |
54 | { 0x418680, 1, 0x04, 0x00000000 }, | 54 | { 0x418680, 1, 0x04, 0x00000000 }, |
55 | { 0x418714, 1, 0x04, 0x00000000 }, | 55 | { 0x418714, 1, 0x04, 0x00000000 }, |
@@ -65,27 +65,24 @@ nvd9_graph_init_gpc[] = { | |||
65 | { 0x418980, 1, 0x04, 0x77777770 }, | 65 | { 0x418980, 1, 0x04, 0x77777770 }, |
66 | { 0x418984, 3, 0x04, 0x77777777 }, | 66 | { 0x418984, 3, 0x04, 0x77777777 }, |
67 | { 0x418c04, 1, 0x04, 0x00000000 }, | 67 | { 0x418c04, 1, 0x04, 0x00000000 }, |
68 | { 0x418c64, 1, 0x04, 0x00000000 }, | 68 | { 0x418c64, 2, 0x04, 0x00000000 }, |
69 | { 0x418c68, 1, 0x04, 0x00000000 }, | ||
70 | { 0x418c88, 1, 0x04, 0x00000000 }, | 69 | { 0x418c88, 1, 0x04, 0x00000000 }, |
71 | { 0x418cb4, 2, 0x04, 0x00000000 }, | 70 | { 0x418cb4, 2, 0x04, 0x00000000 }, |
72 | { 0x418d00, 1, 0x04, 0x00000000 }, | 71 | { 0x418d00, 1, 0x04, 0x00000000 }, |
73 | { 0x418d28, 1, 0x04, 0x00000000 }, | 72 | { 0x418d28, 2, 0x04, 0x00000000 }, |
74 | { 0x418d2c, 1, 0x04, 0x00000000 }, | ||
75 | { 0x418f00, 1, 0x04, 0x00000000 }, | 73 | { 0x418f00, 1, 0x04, 0x00000000 }, |
76 | { 0x418f08, 1, 0x04, 0x00000000 }, | 74 | { 0x418f08, 1, 0x04, 0x00000000 }, |
77 | { 0x418f20, 2, 0x04, 0x00000000 }, | 75 | { 0x418f20, 2, 0x04, 0x00000000 }, |
78 | { 0x418e00, 1, 0x04, 0x00000003 }, | 76 | { 0x418e00, 1, 0x04, 0x00000003 }, |
79 | { 0x418e08, 1, 0x04, 0x00000000 }, | 77 | { 0x418e08, 1, 0x04, 0x00000000 }, |
80 | { 0x418e1c, 1, 0x04, 0x00000000 }, | 78 | { 0x418e1c, 2, 0x04, 0x00000000 }, |
81 | { 0x418e20, 1, 0x04, 0x00000000 }, | ||
82 | { 0x41900c, 1, 0x04, 0x00000000 }, | 79 | { 0x41900c, 1, 0x04, 0x00000000 }, |
83 | { 0x419018, 1, 0x04, 0x00000000 }, | 80 | { 0x419018, 1, 0x04, 0x00000000 }, |
84 | {} | 81 | {} |
85 | }; | 82 | }; |
86 | 83 | ||
87 | static struct nvc0_graph_init | 84 | static const struct nvc0_graph_init |
88 | nvd9_graph_init_tpc[] = { | 85 | nvd9_graph_init_tpc_0[] = { |
89 | { 0x419d08, 2, 0x04, 0x00000000 }, | 86 | { 0x419d08, 2, 0x04, 0x00000000 }, |
90 | { 0x419d10, 1, 0x04, 0x00000014 }, | 87 | { 0x419d10, 1, 0x04, 0x00000014 }, |
91 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 88 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -108,11 +105,9 @@ nvd9_graph_init_tpc[] = { | |||
108 | { 0x419cc0, 2, 0x04, 0x00000000 }, | 105 | { 0x419cc0, 2, 0x04, 0x00000000 }, |
109 | { 0x419bd4, 1, 0x04, 0x00800000 }, | 106 | { 0x419bd4, 1, 0x04, 0x00800000 }, |
110 | { 0x419bdc, 1, 0x04, 0x00000000 }, | 107 | { 0x419bdc, 1, 0x04, 0x00000000 }, |
111 | { 0x419bf8, 1, 0x04, 0x00000000 }, | 108 | { 0x419bf8, 2, 0x04, 0x00000000 }, |
112 | { 0x419bfc, 1, 0x04, 0x00000000 }, | ||
113 | { 0x419d2c, 1, 0x04, 0x00000000 }, | 109 | { 0x419d2c, 1, 0x04, 0x00000000 }, |
114 | { 0x419d48, 1, 0x04, 0x00000000 }, | 110 | { 0x419d48, 2, 0x04, 0x00000000 }, |
115 | { 0x419d4c, 1, 0x04, 0x00000000 }, | ||
116 | { 0x419c0c, 1, 0x04, 0x00000000 }, | 111 | { 0x419c0c, 1, 0x04, 0x00000000 }, |
117 | { 0x419e00, 1, 0x04, 0x00000000 }, | 112 | { 0x419e00, 1, 0x04, 0x00000000 }, |
118 | { 0x419ea0, 1, 0x04, 0x00000000 }, | 113 | { 0x419ea0, 1, 0x04, 0x00000000 }, |
@@ -131,23 +126,34 @@ nvd9_graph_init_tpc[] = { | |||
131 | {} | 126 | {} |
132 | }; | 127 | }; |
133 | 128 | ||
134 | static struct nvc0_graph_init * | 129 | const struct nvc0_graph_init |
135 | nvd9_graph_init_mmio[] = { | 130 | nvd9_graph_init_fe_1[] = { |
136 | nvc0_graph_init_regs, | 131 | { 0x40402c, 1, 0x04, 0x00000000 }, |
137 | nvc0_graph_init_unk40xx, | 132 | { 0x4040f0, 1, 0x04, 0x00000000 }, |
138 | nvc0_graph_init_unk44xx, | 133 | { 0x404174, 1, 0x04, 0x00000000 }, |
139 | nvc0_graph_init_unk78xx, | 134 | {} |
140 | nvc0_graph_init_unk60xx, | 135 | }; |
141 | nvd9_graph_init_unk64xx, | 136 | |
142 | nvd9_graph_init_unk58xx, | 137 | static const struct nvc0_graph_pack |
143 | nvc0_graph_init_unk80xx, | 138 | nvd9_graph_pack_mmio[] = { |
144 | nvd9_graph_init_gpc, | 139 | { nvc0_graph_init_main_0 }, |
145 | nvd9_graph_init_tpc, | 140 | { nvc0_graph_init_fe_0 }, |
146 | nvc0_graph_init_unk88xx, | 141 | { nvc0_graph_init_pri_0 }, |
147 | nvc0_graph_tpc_0, | 142 | { nvc0_graph_init_rstr2d_0 }, |
148 | NULL | 143 | { nvd9_graph_init_pd_0 }, |
144 | { nvd9_graph_init_ds_0 }, | ||
145 | { nvc0_graph_init_scc_0 }, | ||
146 | { nvd9_graph_init_gpc_0 }, | ||
147 | { nvd9_graph_init_tpc_0 }, | ||
148 | { nvc0_graph_init_be_0 }, | ||
149 | { nvd9_graph_init_fe_1 }, | ||
150 | {} | ||
149 | }; | 151 | }; |
150 | 152 | ||
153 | /******************************************************************************* | ||
154 | * PGRAPH engine/subdev functions | ||
155 | ******************************************************************************/ | ||
156 | |||
151 | struct nouveau_oclass * | 157 | struct nouveau_oclass * |
152 | nvd9_graph_oclass = &(struct nvc0_graph_oclass) { | 158 | nvd9_graph_oclass = &(struct nvc0_graph_oclass) { |
153 | .base.handle = NV_ENGINE(GR, 0xd9), | 159 | .base.handle = NV_ENGINE(GR, 0xd9), |
@@ -159,7 +165,7 @@ nvd9_graph_oclass = &(struct nvc0_graph_oclass) { | |||
159 | }, | 165 | }, |
160 | .cclass = &nvd9_grctx_oclass, | 166 | .cclass = &nvd9_grctx_oclass, |
161 | .sclass = nvc8_graph_sclass, | 167 | .sclass = nvc8_graph_sclass, |
162 | .mmio = nvd9_graph_init_mmio, | 168 | .mmio = nvd9_graph_pack_mmio, |
163 | .fecs.ucode = &nvc0_graph_fecs_ucode, | 169 | .fecs.ucode = &nvc0_graph_fecs_ucode, |
164 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, | 170 | .gpccs.ucode = &nvc0_graph_gpccs_ucode, |
165 | }.base; | 171 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/nve4.c index 05ec09c88517..cdd474c39dbc 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nve4.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nve4.c | |||
@@ -23,6 +23,7 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * Graphics object classes | 29 | * Graphics object classes |
@@ -38,11 +39,11 @@ nve4_graph_sclass[] = { | |||
38 | }; | 39 | }; |
39 | 40 | ||
40 | /******************************************************************************* | 41 | /******************************************************************************* |
41 | * PGRAPH engine/subdev functions | 42 | * PGRAPH register lists |
42 | ******************************************************************************/ | 43 | ******************************************************************************/ |
43 | 44 | ||
44 | struct nvc0_graph_init | 45 | const struct nvc0_graph_init |
45 | nve4_graph_init_regs[] = { | 46 | nve4_graph_init_main_0[] = { |
46 | { 0x400080, 1, 0x04, 0x003083c2 }, | 47 | { 0x400080, 1, 0x04, 0x003083c2 }, |
47 | { 0x400088, 1, 0x04, 0x0001ffe7 }, | 48 | { 0x400088, 1, 0x04, 0x0001ffe7 }, |
48 | { 0x40008c, 1, 0x04, 0x00000000 }, | 49 | { 0x40008c, 1, 0x04, 0x00000000 }, |
@@ -57,34 +58,32 @@ nve4_graph_init_regs[] = { | |||
57 | {} | 58 | {} |
58 | }; | 59 | }; |
59 | 60 | ||
60 | static struct nvc0_graph_init | 61 | static const struct nvc0_graph_init |
61 | nve4_graph_init_unk58xx[] = { | 62 | nve4_graph_init_ds_0[] = { |
62 | { 0x405844, 1, 0x04, 0x00ffffff }, | 63 | { 0x405844, 1, 0x04, 0x00ffffff }, |
63 | { 0x405850, 1, 0x04, 0x00000000 }, | 64 | { 0x405850, 1, 0x04, 0x00000000 }, |
64 | { 0x405900, 1, 0x04, 0x0000ff34 }, | 65 | { 0x405900, 1, 0x04, 0x0000ff34 }, |
65 | { 0x405908, 1, 0x04, 0x00000000 }, | 66 | { 0x405908, 1, 0x04, 0x00000000 }, |
66 | { 0x405928, 1, 0x04, 0x00000000 }, | 67 | { 0x405928, 2, 0x04, 0x00000000 }, |
67 | { 0x40592c, 1, 0x04, 0x00000000 }, | ||
68 | {} | 68 | {} |
69 | }; | 69 | }; |
70 | 70 | ||
71 | static struct nvc0_graph_init | 71 | static const struct nvc0_graph_init |
72 | nve4_graph_init_unk70xx[] = { | 72 | nve4_graph_init_sked_0[] = { |
73 | { 0x407010, 1, 0x04, 0x00000000 }, | 73 | { 0x407010, 1, 0x04, 0x00000000 }, |
74 | {} | 74 | {} |
75 | }; | 75 | }; |
76 | 76 | ||
77 | struct nvc0_graph_init | 77 | static const struct nvc0_graph_init |
78 | nve4_graph_init_unk5bxx[] = { | 78 | nve4_graph_init_cwd_0[] = { |
79 | { 0x405b50, 1, 0x04, 0x00000000 }, | 79 | { 0x405b50, 1, 0x04, 0x00000000 }, |
80 | {} | 80 | {} |
81 | }; | 81 | }; |
82 | 82 | ||
83 | static struct nvc0_graph_init | 83 | static const struct nvc0_graph_init |
84 | nve4_graph_init_gpc[] = { | 84 | nve4_graph_init_gpc_0[] = { |
85 | { 0x418408, 1, 0x04, 0x00000000 }, | 85 | { 0x418408, 1, 0x04, 0x00000000 }, |
86 | { 0x4184a0, 1, 0x04, 0x00000000 }, | 86 | { 0x4184a0, 3, 0x04, 0x00000000 }, |
87 | { 0x4184a4, 2, 0x04, 0x00000000 }, | ||
88 | { 0x418604, 1, 0x04, 0x00000000 }, | 87 | { 0x418604, 1, 0x04, 0x00000000 }, |
89 | { 0x418680, 1, 0x04, 0x00000000 }, | 88 | { 0x418680, 1, 0x04, 0x00000000 }, |
90 | { 0x418714, 1, 0x04, 0x00000000 }, | 89 | { 0x418714, 1, 0x04, 0x00000000 }, |
@@ -100,27 +99,24 @@ nve4_graph_init_gpc[] = { | |||
100 | { 0x418980, 1, 0x04, 0x77777770 }, | 99 | { 0x418980, 1, 0x04, 0x77777770 }, |
101 | { 0x418984, 3, 0x04, 0x77777777 }, | 100 | { 0x418984, 3, 0x04, 0x77777777 }, |
102 | { 0x418c04, 1, 0x04, 0x00000000 }, | 101 | { 0x418c04, 1, 0x04, 0x00000000 }, |
103 | { 0x418c64, 1, 0x04, 0x00000000 }, | 102 | { 0x418c64, 2, 0x04, 0x00000000 }, |
104 | { 0x418c68, 1, 0x04, 0x00000000 }, | ||
105 | { 0x418c88, 1, 0x04, 0x00000000 }, | 103 | { 0x418c88, 1, 0x04, 0x00000000 }, |
106 | { 0x418cb4, 2, 0x04, 0x00000000 }, | 104 | { 0x418cb4, 2, 0x04, 0x00000000 }, |
107 | { 0x418d00, 1, 0x04, 0x00000000 }, | 105 | { 0x418d00, 1, 0x04, 0x00000000 }, |
108 | { 0x418d28, 1, 0x04, 0x00000000 }, | 106 | { 0x418d28, 2, 0x04, 0x00000000 }, |
109 | { 0x418d2c, 1, 0x04, 0x00000000 }, | ||
110 | { 0x418f00, 1, 0x04, 0x00000000 }, | 107 | { 0x418f00, 1, 0x04, 0x00000000 }, |
111 | { 0x418f08, 1, 0x04, 0x00000000 }, | 108 | { 0x418f08, 1, 0x04, 0x00000000 }, |
112 | { 0x418f20, 2, 0x04, 0x00000000 }, | 109 | { 0x418f20, 2, 0x04, 0x00000000 }, |
113 | { 0x418e00, 1, 0x04, 0x00000060 }, | 110 | { 0x418e00, 1, 0x04, 0x00000060 }, |
114 | { 0x418e08, 1, 0x04, 0x00000000 }, | 111 | { 0x418e08, 1, 0x04, 0x00000000 }, |
115 | { 0x418e1c, 1, 0x04, 0x00000000 }, | 112 | { 0x418e1c, 2, 0x04, 0x00000000 }, |
116 | { 0x418e20, 1, 0x04, 0x00000000 }, | ||
117 | { 0x41900c, 1, 0x04, 0x00000000 }, | 113 | { 0x41900c, 1, 0x04, 0x00000000 }, |
118 | { 0x419018, 1, 0x04, 0x00000000 }, | 114 | { 0x419018, 1, 0x04, 0x00000000 }, |
119 | {} | 115 | {} |
120 | }; | 116 | }; |
121 | 117 | ||
122 | static struct nvc0_graph_init | 118 | static const struct nvc0_graph_init |
123 | nve4_graph_init_tpc[] = { | 119 | nve4_graph_init_tpc_0[] = { |
124 | { 0x419d0c, 1, 0x04, 0x00000000 }, | 120 | { 0x419d0c, 1, 0x04, 0x00000000 }, |
125 | { 0x419d10, 1, 0x04, 0x00000014 }, | 121 | { 0x419d10, 1, 0x04, 0x00000014 }, |
126 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 122 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -147,33 +143,15 @@ nve4_graph_init_tpc[] = { | |||
147 | { 0x419ee4, 1, 0x04, 0x00000000 }, | 143 | { 0x419ee4, 1, 0x04, 0x00000000 }, |
148 | { 0x419ea4, 1, 0x04, 0x00000100 }, | 144 | { 0x419ea4, 1, 0x04, 0x00000100 }, |
149 | { 0x419ea8, 1, 0x04, 0x00000000 }, | 145 | { 0x419ea8, 1, 0x04, 0x00000000 }, |
150 | { 0x419eb4, 1, 0x04, 0x00000000 }, | 146 | { 0x419eb4, 4, 0x04, 0x00000000 }, |
151 | { 0x419eb8, 3, 0x04, 0x00000000 }, | ||
152 | { 0x419edc, 1, 0x04, 0x00000000 }, | 147 | { 0x419edc, 1, 0x04, 0x00000000 }, |
153 | { 0x419f00, 1, 0x04, 0x00000000 }, | 148 | { 0x419f00, 1, 0x04, 0x00000000 }, |
154 | { 0x419f74, 1, 0x04, 0x00000555 }, | 149 | { 0x419f74, 1, 0x04, 0x00000555 }, |
155 | {} | 150 | {} |
156 | }; | 151 | }; |
157 | 152 | ||
158 | struct nvc0_graph_init | 153 | const struct nvc0_graph_init |
159 | nve4_graph_init_unk[] = { | 154 | nve4_graph_init_be_0[] = { |
160 | { 0x41be04, 1, 0x04, 0x00000000 }, | ||
161 | { 0x41be08, 1, 0x04, 0x00000004 }, | ||
162 | { 0x41be0c, 1, 0x04, 0x00000000 }, | ||
163 | { 0x41be10, 1, 0x04, 0x003b8bc7 }, | ||
164 | { 0x41be14, 2, 0x04, 0x00000000 }, | ||
165 | { 0x41bfd4, 1, 0x04, 0x00800000 }, | ||
166 | { 0x41bfdc, 1, 0x04, 0x00000000 }, | ||
167 | { 0x41bff8, 1, 0x04, 0x00000000 }, | ||
168 | { 0x41bffc, 1, 0x04, 0x00000000 }, | ||
169 | { 0x41becc, 1, 0x04, 0x00000000 }, | ||
170 | { 0x41bee8, 1, 0x04, 0x00000000 }, | ||
171 | { 0x41beec, 1, 0x04, 0x00000000 }, | ||
172 | {} | ||
173 | }; | ||
174 | |||
175 | struct nvc0_graph_init | ||
176 | nve4_graph_init_unk88xx[] = { | ||
177 | { 0x40880c, 1, 0x04, 0x00000000 }, | 155 | { 0x40880c, 1, 0x04, 0x00000000 }, |
178 | { 0x408850, 1, 0x04, 0x00000004 }, | 156 | { 0x408850, 1, 0x04, 0x00000004 }, |
179 | { 0x408910, 9, 0x04, 0x00000000 }, | 157 | { 0x408910, 9, 0x04, 0x00000000 }, |
@@ -186,6 +164,29 @@ nve4_graph_init_unk88xx[] = { | |||
186 | {} | 164 | {} |
187 | }; | 165 | }; |
188 | 166 | ||
167 | static const struct nvc0_graph_pack | ||
168 | nve4_graph_pack_mmio[] = { | ||
169 | { nve4_graph_init_main_0 }, | ||
170 | { nvc0_graph_init_fe_0 }, | ||
171 | { nvc0_graph_init_pri_0 }, | ||
172 | { nvc0_graph_init_rstr2d_0 }, | ||
173 | { nvd9_graph_init_pd_0 }, | ||
174 | { nve4_graph_init_ds_0 }, | ||
175 | { nvc0_graph_init_scc_0 }, | ||
176 | { nve4_graph_init_sked_0 }, | ||
177 | { nve4_graph_init_cwd_0 }, | ||
178 | { nve4_graph_init_gpc_0 }, | ||
179 | { nve4_graph_init_tpc_0 }, | ||
180 | { nvd7_graph_init_ppc_0 }, | ||
181 | { nve4_graph_init_be_0 }, | ||
182 | { nvc0_graph_init_fe_1 }, | ||
183 | {} | ||
184 | }; | ||
185 | |||
186 | /******************************************************************************* | ||
187 | * PGRAPH engine/subdev functions | ||
188 | ******************************************************************************/ | ||
189 | |||
189 | int | 190 | int |
190 | nve4_graph_init(struct nouveau_object *object) | 191 | nve4_graph_init(struct nouveau_object *object) |
191 | { | 192 | { |
@@ -210,8 +211,7 @@ nve4_graph_init(struct nouveau_object *object) | |||
210 | nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8); | 211 | nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8); |
211 | nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8); | 212 | nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8); |
212 | 213 | ||
213 | for (i = 0; oclass->mmio[i]; i++) | 214 | nvc0_graph_mmio(priv, oclass->mmio); |
214 | nvc0_graph_mmio(priv, oclass->mmio[i]); | ||
215 | 215 | ||
216 | nv_wr32(priv, GPC_UNIT(0, 0x3018), 0x00000001); | 216 | nv_wr32(priv, GPC_UNIT(0, 0x3018), 0x00000001); |
217 | 217 | ||
@@ -298,25 +298,6 @@ nve4_graph_init(struct nouveau_object *object) | |||
298 | return nvc0_graph_init_ctxctl(priv); | 298 | return nvc0_graph_init_ctxctl(priv); |
299 | } | 299 | } |
300 | 300 | ||
301 | static struct nvc0_graph_init * | ||
302 | nve4_graph_init_mmio[] = { | ||
303 | nve4_graph_init_regs, | ||
304 | nvc0_graph_init_unk40xx, | ||
305 | nvc0_graph_init_unk44xx, | ||
306 | nvc0_graph_init_unk78xx, | ||
307 | nvc0_graph_init_unk60xx, | ||
308 | nvd9_graph_init_unk64xx, | ||
309 | nve4_graph_init_unk58xx, | ||
310 | nvc0_graph_init_unk80xx, | ||
311 | nve4_graph_init_unk70xx, | ||
312 | nve4_graph_init_unk5bxx, | ||
313 | nve4_graph_init_gpc, | ||
314 | nve4_graph_init_tpc, | ||
315 | nve4_graph_init_unk, | ||
316 | nve4_graph_init_unk88xx, | ||
317 | NULL | ||
318 | }; | ||
319 | |||
320 | #include "fuc/hubnve0.fuc.h" | 301 | #include "fuc/hubnve0.fuc.h" |
321 | 302 | ||
322 | static struct nvc0_graph_ucode | 303 | static struct nvc0_graph_ucode |
@@ -348,7 +329,7 @@ nve4_graph_oclass = &(struct nvc0_graph_oclass) { | |||
348 | }, | 329 | }, |
349 | .cclass = &nve4_grctx_oclass, | 330 | .cclass = &nve4_grctx_oclass, |
350 | .sclass = nve4_graph_sclass, | 331 | .sclass = nve4_graph_sclass, |
351 | .mmio = nve4_graph_init_mmio, | 332 | .mmio = nve4_graph_pack_mmio, |
352 | .fecs.ucode = &nve4_graph_fecs_ucode, | 333 | .fecs.ucode = &nve4_graph_fecs_ucode, |
353 | .gpccs.ucode = &nve4_graph_gpccs_ucode, | 334 | .gpccs.ucode = &nve4_graph_gpccs_ucode, |
354 | }.base; | 335 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c index b1acb9939d95..eeff5a2a31c4 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c | |||
@@ -23,6 +23,7 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "nvc0.h" | 25 | #include "nvc0.h" |
26 | #include "ctxnvc0.h" | ||
26 | 27 | ||
27 | /******************************************************************************* | 28 | /******************************************************************************* |
28 | * Graphics object classes | 29 | * Graphics object classes |
@@ -38,48 +39,46 @@ nvf0_graph_sclass[] = { | |||
38 | }; | 39 | }; |
39 | 40 | ||
40 | /******************************************************************************* | 41 | /******************************************************************************* |
41 | * PGRAPH engine/subdev functions | 42 | * PGRAPH register lists |
42 | ******************************************************************************/ | 43 | ******************************************************************************/ |
43 | 44 | ||
44 | struct nvc0_graph_init | 45 | const struct nvc0_graph_init |
45 | nvf0_graph_init_unk40xx[] = { | 46 | nvf0_graph_init_fe_0[] = { |
46 | { 0x40415c, 1, 0x04, 0x00000000 }, | 47 | { 0x40415c, 1, 0x04, 0x00000000 }, |
47 | { 0x404170, 1, 0x04, 0x00000000 }, | 48 | { 0x404170, 1, 0x04, 0x00000000 }, |
48 | { 0x4041b4, 1, 0x04, 0x00000000 }, | 49 | { 0x4041b4, 1, 0x04, 0x00000000 }, |
49 | {} | 50 | {} |
50 | }; | 51 | }; |
51 | 52 | ||
52 | static struct nvc0_graph_init | 53 | static const struct nvc0_graph_init |
53 | nvf0_graph_init_unk58xx[] = { | 54 | nvf0_graph_init_ds_0[] = { |
54 | { 0x405844, 1, 0x04, 0x00ffffff }, | 55 | { 0x405844, 1, 0x04, 0x00ffffff }, |
55 | { 0x405850, 1, 0x04, 0x00000000 }, | 56 | { 0x405850, 1, 0x04, 0x00000000 }, |
56 | { 0x405900, 1, 0x04, 0x0000ff00 }, | 57 | { 0x405900, 1, 0x04, 0x0000ff00 }, |
57 | { 0x405908, 1, 0x04, 0x00000000 }, | 58 | { 0x405908, 1, 0x04, 0x00000000 }, |
58 | { 0x405928, 1, 0x04, 0x00000000 }, | 59 | { 0x405928, 2, 0x04, 0x00000000 }, |
59 | { 0x40592c, 1, 0x04, 0x00000000 }, | ||
60 | {} | 60 | {} |
61 | }; | 61 | }; |
62 | 62 | ||
63 | struct nvc0_graph_init | 63 | const struct nvc0_graph_init |
64 | nvf0_graph_init_unk70xx[] = { | 64 | nvf0_graph_init_sked_0[] = { |
65 | { 0x407010, 1, 0x04, 0x00000000 }, | 65 | { 0x407010, 1, 0x04, 0x00000000 }, |
66 | { 0x407040, 1, 0x04, 0x80440424 }, | 66 | { 0x407040, 1, 0x04, 0x80440424 }, |
67 | { 0x407048, 1, 0x04, 0x0000000a }, | 67 | { 0x407048, 1, 0x04, 0x0000000a }, |
68 | {} | 68 | {} |
69 | }; | 69 | }; |
70 | 70 | ||
71 | struct nvc0_graph_init | 71 | const struct nvc0_graph_init |
72 | nvf0_graph_init_unk5bxx[] = { | 72 | nvf0_graph_init_cwd_0[] = { |
73 | { 0x405b44, 1, 0x04, 0x00000000 }, | 73 | { 0x405b44, 1, 0x04, 0x00000000 }, |
74 | { 0x405b50, 1, 0x04, 0x00000000 }, | 74 | { 0x405b50, 1, 0x04, 0x00000000 }, |
75 | {} | 75 | {} |
76 | }; | 76 | }; |
77 | 77 | ||
78 | static struct nvc0_graph_init | 78 | static const struct nvc0_graph_init |
79 | nvf0_graph_init_gpc[] = { | 79 | nvf0_graph_init_gpc_0[] = { |
80 | { 0x418408, 1, 0x04, 0x00000000 }, | 80 | { 0x418408, 1, 0x04, 0x00000000 }, |
81 | { 0x4184a0, 1, 0x04, 0x00000000 }, | 81 | { 0x4184a0, 3, 0x04, 0x00000000 }, |
82 | { 0x4184a4, 2, 0x04, 0x00000000 }, | ||
83 | { 0x418604, 1, 0x04, 0x00000000 }, | 82 | { 0x418604, 1, 0x04, 0x00000000 }, |
84 | { 0x418680, 1, 0x04, 0x00000000 }, | 83 | { 0x418680, 1, 0x04, 0x00000000 }, |
85 | { 0x418714, 1, 0x04, 0x00000000 }, | 84 | { 0x418714, 1, 0x04, 0x00000000 }, |
@@ -95,17 +94,14 @@ nvf0_graph_init_gpc[] = { | |||
95 | { 0x418980, 1, 0x04, 0x77777770 }, | 94 | { 0x418980, 1, 0x04, 0x77777770 }, |
96 | { 0x418984, 3, 0x04, 0x77777777 }, | 95 | { 0x418984, 3, 0x04, 0x77777777 }, |
97 | { 0x418c04, 1, 0x04, 0x00000000 }, | 96 | { 0x418c04, 1, 0x04, 0x00000000 }, |
98 | { 0x418c64, 1, 0x04, 0x00000000 }, | 97 | { 0x418c64, 2, 0x04, 0x00000000 }, |
99 | { 0x418c68, 1, 0x04, 0x00000000 }, | ||
100 | { 0x418c88, 1, 0x04, 0x00000000 }, | 98 | { 0x418c88, 1, 0x04, 0x00000000 }, |
101 | { 0x418cb4, 2, 0x04, 0x00000000 }, | 99 | { 0x418cb4, 2, 0x04, 0x00000000 }, |
102 | { 0x418d00, 1, 0x04, 0x00000000 }, | 100 | { 0x418d00, 1, 0x04, 0x00000000 }, |
103 | { 0x418d28, 1, 0x04, 0x00000000 }, | 101 | { 0x418d28, 2, 0x04, 0x00000000 }, |
104 | { 0x418d2c, 1, 0x04, 0x00000000 }, | ||
105 | { 0x418f00, 1, 0x04, 0x00000400 }, | 102 | { 0x418f00, 1, 0x04, 0x00000400 }, |
106 | { 0x418f08, 1, 0x04, 0x00000000 }, | 103 | { 0x418f08, 1, 0x04, 0x00000000 }, |
107 | { 0x418f20, 1, 0x04, 0x00000000 }, | 104 | { 0x418f20, 2, 0x04, 0x00000000 }, |
108 | { 0x418f24, 1, 0x04, 0x00000000 }, | ||
109 | { 0x418e00, 1, 0x04, 0x00000000 }, | 105 | { 0x418e00, 1, 0x04, 0x00000000 }, |
110 | { 0x418e08, 1, 0x04, 0x00000000 }, | 106 | { 0x418e08, 1, 0x04, 0x00000000 }, |
111 | { 0x418e1c, 2, 0x04, 0x00000000 }, | 107 | { 0x418e1c, 2, 0x04, 0x00000000 }, |
@@ -114,8 +110,8 @@ nvf0_graph_init_gpc[] = { | |||
114 | {} | 110 | {} |
115 | }; | 111 | }; |
116 | 112 | ||
117 | struct nvc0_graph_init | 113 | static const struct nvc0_graph_init |
118 | nvf0_graph_init_tpc[] = { | 114 | nvf0_graph_init_tpc_0[] = { |
119 | { 0x419d0c, 1, 0x04, 0x00000000 }, | 115 | { 0x419d0c, 1, 0x04, 0x00000000 }, |
120 | { 0x419d10, 1, 0x04, 0x00000014 }, | 116 | { 0x419d10, 1, 0x04, 0x00000014 }, |
121 | { 0x419ab0, 1, 0x04, 0x00000000 }, | 117 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
@@ -155,6 +151,29 @@ nvf0_graph_init_tpc[] = { | |||
155 | {} | 151 | {} |
156 | }; | 152 | }; |
157 | 153 | ||
154 | static const struct nvc0_graph_pack | ||
155 | nvf0_graph_pack_mmio[] = { | ||
156 | { nve4_graph_init_main_0 }, | ||
157 | { nvf0_graph_init_fe_0 }, | ||
158 | { nvc0_graph_init_pri_0 }, | ||
159 | { nvc0_graph_init_rstr2d_0 }, | ||
160 | { nvd9_graph_init_pd_0 }, | ||
161 | { nvf0_graph_init_ds_0 }, | ||
162 | { nvc0_graph_init_scc_0 }, | ||
163 | { nvf0_graph_init_sked_0 }, | ||
164 | { nvf0_graph_init_cwd_0 }, | ||
165 | { nvf0_graph_init_gpc_0 }, | ||
166 | { nvf0_graph_init_tpc_0 }, | ||
167 | { nvd7_graph_init_ppc_0 }, | ||
168 | { nve4_graph_init_be_0 }, | ||
169 | { nvc0_graph_init_fe_1 }, | ||
170 | {} | ||
171 | }; | ||
172 | |||
173 | /******************************************************************************* | ||
174 | * PGRAPH engine/subdev functions | ||
175 | ******************************************************************************/ | ||
176 | |||
158 | static int | 177 | static int |
159 | nvf0_graph_fini(struct nouveau_object *object, bool suspend) | 178 | nvf0_graph_fini(struct nouveau_object *object, bool suspend) |
160 | { | 179 | { |
@@ -192,25 +211,6 @@ nvf0_graph_fini(struct nouveau_object *object, bool suspend) | |||
192 | return nouveau_graph_fini(&priv->base, suspend); | 211 | return nouveau_graph_fini(&priv->base, suspend); |
193 | } | 212 | } |
194 | 213 | ||
195 | static struct nvc0_graph_init * | ||
196 | nvf0_graph_init_mmio[] = { | ||
197 | nve4_graph_init_regs, | ||
198 | nvf0_graph_init_unk40xx, | ||
199 | nvc0_graph_init_unk44xx, | ||
200 | nvc0_graph_init_unk78xx, | ||
201 | nvc0_graph_init_unk60xx, | ||
202 | nvd9_graph_init_unk64xx, | ||
203 | nvf0_graph_init_unk58xx, | ||
204 | nvc0_graph_init_unk80xx, | ||
205 | nvf0_graph_init_unk70xx, | ||
206 | nvf0_graph_init_unk5bxx, | ||
207 | nvf0_graph_init_gpc, | ||
208 | nvf0_graph_init_tpc, | ||
209 | nve4_graph_init_unk, | ||
210 | nve4_graph_init_unk88xx, | ||
211 | NULL | ||
212 | }; | ||
213 | |||
214 | #include "fuc/hubnvf0.fuc.h" | 214 | #include "fuc/hubnvf0.fuc.h" |
215 | 215 | ||
216 | static struct nvc0_graph_ucode | 216 | static struct nvc0_graph_ucode |
@@ -242,7 +242,7 @@ nvf0_graph_oclass = &(struct nvc0_graph_oclass) { | |||
242 | }, | 242 | }, |
243 | .cclass = &nvf0_grctx_oclass, | 243 | .cclass = &nvf0_grctx_oclass, |
244 | .sclass = nvf0_graph_sclass, | 244 | .sclass = nvf0_graph_sclass, |
245 | .mmio = nvf0_graph_init_mmio, | 245 | .mmio = nvf0_graph_pack_mmio, |
246 | .fecs.ucode = &nvf0_graph_fecs_ucode, | 246 | .fecs.ucode = &nvf0_graph_fecs_ucode, |
247 | .gpccs.ucode = &nvf0_graph_gpccs_ucode, | 247 | .gpccs.ucode = &nvf0_graph_gpccs_ucode, |
248 | }.base; | 248 | }.base; |