aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSoren Brinkmann <soren.brinkmann@xilinx.com>2013-11-26 20:04:50 -0500
committerDaniel Lezcano <daniel.lezcano@linaro.org>2013-12-30 05:32:24 -0500
commitc1dcc927dae01dfd4904ee82ce2c00b50eab6dc3 (patch)
treea48598475900901e31c1c397a2bdb8d085092ea1
parentb0031f227e47919797dc0e1c1990f3ef151ff0cc (diff)
clocksource: cadence_ttc: Fix mutex taken inside interrupt context
When the kernel is compiled with: CONFIG_HIGH_RES_TIMERS=no CONFIG_HZ_PERIODIC=yes CONFIG_DEBUG_ATOMIC_SLEEP=yes The following WARN appears: WARNING: CPU: 1 PID: 0 at linux/kernel/mutex.c:856 mutex_trylock+0x70/0x1fc() DEBUG_LOCKS_WARN_ON(in_interrupt()) Modules linked in: CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.12.0-xilinx-dirty #93 [<c0014a78>] (unwind_backtrace+0x0/0x11c) from [<c0011b6c>] (show_stack+0x10/0x14) [<c0011b6c>] (show_stack+0x10/0x14) from [<c039120c>] (dump_stack+0x7c/0xc0) [<c039120c>] (dump_stack+0x7c/0xc0) from [<c001fda4>] (warn_slowpath_common+0x60/0x84) [<c001fda4>] (warn_slowpath_common+0x60/0x84) from [<c001fe48>] (warn_slowpath_fmt+0x2c/0x3c) [<c001fe48>] (warn_slowpath_fmt+0x2c/0x3c) from [<c0392658>] (mutex_trylock+0x70/0x1fc) [<c0392658>] (mutex_trylock+0x70/0x1fc) from [<c02dfc08>] (clk_prepare_lock+0xc/0xe4) [<c02dfc08>] (clk_prepare_lock+0xc/0xe4) from [<c02e099c>] (clk_get_rate+0xc/0x44) [<c02e099c>] (clk_get_rate+0xc/0x44) from [<c02d0394>] (ttc_set_mode+0x34/0x78) [<c02d0394>] (ttc_set_mode+0x34/0x78) from [<c005f794>] (clockevents_set_mode+0x28/0x5c) [<c005f794>] (clockevents_set_mode+0x28/0x5c) from [<c00607fc>] (tick_broadcast_on_off+0x190/0x1c0) [<c00607fc>] (tick_broadcast_on_off+0x190/0x1c0) from [<c005f168>] (clockevents_notify+0x58/0x1ac) [<c005f168>] (clockevents_notify+0x58/0x1ac) from [<c02b99dc>] (cpuidle_setup_broadcast_timer+0x20/0x24) [<c02b99dc>] (cpuidle_setup_broadcast_timer+0x20/0x24) from [<c006cd04>] (generic_smp_call_function_single_interrupt+0) [<c006cd04>] (generic_smp_call_function_single_interrupt+0xe0/0x130) from [<c00138c8>] (handle_IPI+0x88/0x118) [<c00138c8>] (handle_IPI+0x88/0x118) from [<c0008504>] (gic_handle_irq+0x58/0x60) [<c0008504>] (gic_handle_irq+0x58/0x60) from [<c0012644>] (__irq_svc+0x44/0x78) Exception stack(0xef099fa0 to 0xef099fe8) 9fa0: 00000001 ef092100 00000000 ef092100 ef098000 00000015 c0399f2c c0579d74 9fc0: 0000406a 413fc090 00000000 00000000 00000000 ef099fe8 c00666ec c000f46c 9fe0: 20000113 ffffffff [<c0012644>] (__irq_svc+0x44/0x78) from [<c000f46c>] (arch_cpu_idle+0x34/0x3c) [<c000f46c>] (arch_cpu_idle+0x34/0x3c) from [<c0053980>] (cpu_startup_entry+0xa8/0x10c) [<c0053980>] (cpu_startup_entry+0xa8/0x10c) from [<000085a4>] (0x85a4) We are in an interrupt context (IPI) and we are calling clk_get_rate in the set_mode function which in turn ends up by getting a mutex... Even if that does not hang, it is a potential kernel deadlock. It is not allowed to call clk_get_rate() from interrupt context. To avoid such calls the timer input frequency is stored in the driver's data struct which makes it accessible to the driver in any context. [dlezcano] completed the changelog with the WARN trace and added a more detailed description. Tested on zync zc702. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-rw-r--r--drivers/clocksource/cadence_ttc_timer.c21
1 files changed, 13 insertions, 8 deletions
diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c
index b2bb3a4bc205..a92350b55d32 100644
--- a/drivers/clocksource/cadence_ttc_timer.c
+++ b/drivers/clocksource/cadence_ttc_timer.c
@@ -67,11 +67,13 @@
67 * struct ttc_timer - This definition defines local timer structure 67 * struct ttc_timer - This definition defines local timer structure
68 * 68 *
69 * @base_addr: Base address of timer 69 * @base_addr: Base address of timer
70 * @freq: Timer input clock frequency
70 * @clk: Associated clock source 71 * @clk: Associated clock source
71 * @clk_rate_change_nb Notifier block for clock rate changes 72 * @clk_rate_change_nb Notifier block for clock rate changes
72 */ 73 */
73struct ttc_timer { 74struct ttc_timer {
74 void __iomem *base_addr; 75 void __iomem *base_addr;
76 unsigned long freq;
75 struct clk *clk; 77 struct clk *clk;
76 struct notifier_block clk_rate_change_nb; 78 struct notifier_block clk_rate_change_nb;
77}; 79};
@@ -196,9 +198,8 @@ static void ttc_set_mode(enum clock_event_mode mode,
196 198
197 switch (mode) { 199 switch (mode) {
198 case CLOCK_EVT_MODE_PERIODIC: 200 case CLOCK_EVT_MODE_PERIODIC:
199 ttc_set_interval(timer, 201 ttc_set_interval(timer, DIV_ROUND_CLOSEST(ttce->ttc.freq,
200 DIV_ROUND_CLOSEST(clk_get_rate(ttce->ttc.clk), 202 PRESCALE * HZ));
201 PRESCALE * HZ));
202 break; 203 break;
203 case CLOCK_EVT_MODE_ONESHOT: 204 case CLOCK_EVT_MODE_ONESHOT:
204 case CLOCK_EVT_MODE_UNUSED: 205 case CLOCK_EVT_MODE_UNUSED:
@@ -273,6 +274,8 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
273 return; 274 return;
274 } 275 }
275 276
277 ttccs->ttc.freq = clk_get_rate(ttccs->ttc.clk);
278
276 ttccs->ttc.clk_rate_change_nb.notifier_call = 279 ttccs->ttc.clk_rate_change_nb.notifier_call =
277 ttc_rate_change_clocksource_cb; 280 ttc_rate_change_clocksource_cb;
278 ttccs->ttc.clk_rate_change_nb.next = NULL; 281 ttccs->ttc.clk_rate_change_nb.next = NULL;
@@ -298,16 +301,14 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
298 __raw_writel(CNT_CNTRL_RESET, 301 __raw_writel(CNT_CNTRL_RESET,
299 ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET); 302 ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET);
300 303
301 err = clocksource_register_hz(&ttccs->cs, 304 err = clocksource_register_hz(&ttccs->cs, ttccs->ttc.freq / PRESCALE);
302 clk_get_rate(ttccs->ttc.clk) / PRESCALE);
303 if (WARN_ON(err)) { 305 if (WARN_ON(err)) {
304 kfree(ttccs); 306 kfree(ttccs);
305 return; 307 return;
306 } 308 }
307 309
308 ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET; 310 ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET;
309 setup_sched_clock(ttc_sched_clock_read, 16, 311 setup_sched_clock(ttc_sched_clock_read, 16, ttccs->ttc.freq / PRESCALE);
310 clk_get_rate(ttccs->ttc.clk) / PRESCALE);
311} 312}
312 313
313static int ttc_rate_change_clockevent_cb(struct notifier_block *nb, 314static int ttc_rate_change_clockevent_cb(struct notifier_block *nb,
@@ -334,6 +335,9 @@ static int ttc_rate_change_clockevent_cb(struct notifier_block *nb,
334 ndata->new_rate / PRESCALE); 335 ndata->new_rate / PRESCALE);
335 local_irq_restore(flags); 336 local_irq_restore(flags);
336 337
338 /* update cached frequency */
339 ttc->freq = ndata->new_rate;
340
337 /* fall through */ 341 /* fall through */
338 } 342 }
339 case PRE_RATE_CHANGE: 343 case PRE_RATE_CHANGE:
@@ -367,6 +371,7 @@ static void __init ttc_setup_clockevent(struct clk *clk,
367 if (clk_notifier_register(ttcce->ttc.clk, 371 if (clk_notifier_register(ttcce->ttc.clk,
368 &ttcce->ttc.clk_rate_change_nb)) 372 &ttcce->ttc.clk_rate_change_nb))
369 pr_warn("Unable to register clock notifier.\n"); 373 pr_warn("Unable to register clock notifier.\n");
374 ttcce->ttc.freq = clk_get_rate(ttcce->ttc.clk);
370 375
371 ttcce->ttc.base_addr = base; 376 ttcce->ttc.base_addr = base;
372 ttcce->ce.name = "ttc_clockevent"; 377 ttcce->ce.name = "ttc_clockevent";
@@ -396,7 +401,7 @@ static void __init ttc_setup_clockevent(struct clk *clk,
396 } 401 }
397 402
398 clockevents_config_and_register(&ttcce->ce, 403 clockevents_config_and_register(&ttcce->ce,
399 clk_get_rate(ttcce->ttc.clk) / PRESCALE, 1, 0xfffe); 404 ttcce->ttc.freq / PRESCALE, 1, 0xfffe);
400} 405}
401 406
402/** 407/**