diff options
author | Paul Mackerras <paulus@samba.org> | 2013-09-05 23:18:32 -0400 |
---|---|---|
committer | Alexander Graf <agraf@suse.de> | 2013-10-17 08:44:59 -0400 |
commit | c0867fd50943d71d9f0bc5078393ce4ec76b3923 (patch) | |
tree | e8ff5805ef9e9ad775467fe3912361c48e1c84cd | |
parent | 93b0f4dc29c5f077a1c97bd1d484147230c3779a (diff) |
KVM: PPC: Book3S: Add GET/SET_ONE_REG interface for VRSAVE
The VRSAVE register value for a vcpu is accessible through the
GET/SET_SREGS interface for Book E processors, but not for Book 3S
processors. In order to make this accessible for Book 3S processors,
this adds a new register identifier for GET/SET_ONE_REG, and adds
the code to implement it.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
-rw-r--r-- | Documentation/virtual/kvm/api.txt | 1 | ||||
-rw-r--r-- | arch/powerpc/include/uapi/asm/kvm.h | 2 | ||||
-rw-r--r-- | arch/powerpc/kvm/book3s.c | 10 |
3 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index e43c6f14c225..26fc37355dcb 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt | |||
@@ -1834,6 +1834,7 @@ registers, find a list below: | |||
1834 | PPC | KVM_REG_PPC_TCSCR | 64 | 1834 | PPC | KVM_REG_PPC_TCSCR | 64 |
1835 | PPC | KVM_REG_PPC_PID | 64 | 1835 | PPC | KVM_REG_PPC_PID | 64 |
1836 | PPC | KVM_REG_PPC_ACOP | 64 | 1836 | PPC | KVM_REG_PPC_ACOP | 64 |
1837 | PPC | KVM_REG_PPC_VRSAVE | 32 | ||
1837 | PPC | KVM_REG_PPC_TM_GPR0 | 64 | 1838 | PPC | KVM_REG_PPC_TM_GPR0 | 64 |
1838 | ... | 1839 | ... |
1839 | PPC | KVM_REG_PPC_TM_GPR31 | 64 | 1840 | PPC | KVM_REG_PPC_TM_GPR31 | 64 |
diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h index a8124fe93fb9..b98bf3f50527 100644 --- a/arch/powerpc/include/uapi/asm/kvm.h +++ b/arch/powerpc/include/uapi/asm/kvm.h | |||
@@ -532,6 +532,8 @@ struct kvm_get_htab_header { | |||
532 | #define KVM_REG_PPC_PID (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2) | 532 | #define KVM_REG_PPC_PID (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2) |
533 | #define KVM_REG_PPC_ACOP (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3) | 533 | #define KVM_REG_PPC_ACOP (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3) |
534 | 534 | ||
535 | #define KVM_REG_PPC_VRSAVE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb4) | ||
536 | |||
535 | /* Transactional Memory checkpointed state: | 537 | /* Transactional Memory checkpointed state: |
536 | * This is all GPRs, all VSX regs and a subset of SPRs | 538 | * This is all GPRs, all VSX regs and a subset of SPRs |
537 | */ | 539 | */ |
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c index 700df6f1d32c..f97369dc457c 100644 --- a/arch/powerpc/kvm/book3s.c +++ b/arch/powerpc/kvm/book3s.c | |||
@@ -528,6 +528,9 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) | |||
528 | } | 528 | } |
529 | val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]); | 529 | val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]); |
530 | break; | 530 | break; |
531 | case KVM_REG_PPC_VRSAVE: | ||
532 | val = get_reg_val(reg->id, vcpu->arch.vrsave); | ||
533 | break; | ||
531 | #endif /* CONFIG_ALTIVEC */ | 534 | #endif /* CONFIG_ALTIVEC */ |
532 | case KVM_REG_PPC_DEBUG_INST: { | 535 | case KVM_REG_PPC_DEBUG_INST: { |
533 | u32 opcode = INS_TW; | 536 | u32 opcode = INS_TW; |
@@ -605,6 +608,13 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) | |||
605 | } | 608 | } |
606 | vcpu->arch.vscr.u[3] = set_reg_val(reg->id, val); | 609 | vcpu->arch.vscr.u[3] = set_reg_val(reg->id, val); |
607 | break; | 610 | break; |
611 | case KVM_REG_PPC_VRSAVE: | ||
612 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | ||
613 | r = -ENXIO; | ||
614 | break; | ||
615 | } | ||
616 | vcpu->arch.vrsave = set_reg_val(reg->id, val); | ||
617 | break; | ||
608 | #endif /* CONFIG_ALTIVEC */ | 618 | #endif /* CONFIG_ALTIVEC */ |
609 | #ifdef CONFIG_KVM_XICS | 619 | #ifdef CONFIG_KVM_XICS |
610 | case KVM_REG_PPC_ICP_STATE: | 620 | case KVM_REG_PPC_ICP_STATE: |