aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJiri Benc <jbenc@redhat.com>2014-12-18 03:04:35 -0500
committerDavid S. Miller <davem@davemloft.net>2014-12-18 12:50:36 -0500
commitbf27c3537c17dab1639330c5f7a69f9162600229 (patch)
tree5e88282b0e3711ea3744bef4d41e7393509dd6b7
parent26c0e102585d5a4d311f5d6eb7f524d288e7f6b7 (diff)
bnx2x: fix typos in "configure"
Noticed when debugging ptp. Signed-off-by: Jiri Benc <jbenc@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c4
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h4
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 691f0bf09ee1..9f5e38769a29 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -13256,7 +13256,7 @@ static int bnx2x_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
13256 return -EFAULT; 13256 return -EFAULT;
13257 } 13257 }
13258 13258
13259 DP(BNX2X_MSG_PTP, "Configrued val = %d, period = %d\n", best_val, 13259 DP(BNX2X_MSG_PTP, "Configured val = %d, period = %d\n", best_val,
13260 best_period); 13260 best_period);
13261 13261
13262 return 0; 13262 return 0;
@@ -14784,7 +14784,7 @@ static int bnx2x_hwtstamp_ioctl(struct bnx2x *bp, struct ifreq *ifr)
14784 -EFAULT : 0; 14784 -EFAULT : 0;
14785} 14785}
14786 14786
14787/* Configrues HW for PTP */ 14787/* Configures HW for PTP */
14788static int bnx2x_configure_ptp(struct bnx2x *bp) 14788static int bnx2x_configure_ptp(struct bnx2x *bp)
14789{ 14789{
14790 int rc, port = BP_PORT(bp); 14790 int rc, port = BP_PORT(bp);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
index b0779d773343..6fe547c93e74 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
@@ -7549,7 +7549,7 @@ Theotherbitsarereservedandshouldbezero*/
7549#define IGU_REG_SISR_MDPC_WOMASK_UPPER 0x05a6 7549#define IGU_REG_SISR_MDPC_WOMASK_UPPER 0x05a6
7550 7550
7551#define IGU_REG_RESERVED_UPPER 0x05ff 7551#define IGU_REG_RESERVED_UPPER 0x05ff
7552/* Fields of IGU PF CONFIGRATION REGISTER */ 7552/* Fields of IGU PF CONFIGURATION REGISTER */
7553#define IGU_PF_CONF_FUNC_EN (0x1<<0) /* function enable */ 7553#define IGU_PF_CONF_FUNC_EN (0x1<<0) /* function enable */
7554#define IGU_PF_CONF_MSI_MSIX_EN (0x1<<1) /* MSI/MSIX enable */ 7554#define IGU_PF_CONF_MSI_MSIX_EN (0x1<<1) /* MSI/MSIX enable */
7555#define IGU_PF_CONF_INT_LINE_EN (0x1<<2) /* INT enable */ 7555#define IGU_PF_CONF_INT_LINE_EN (0x1<<2) /* INT enable */
@@ -7557,7 +7557,7 @@ Theotherbitsarereservedandshouldbezero*/
7557#define IGU_PF_CONF_SINGLE_ISR_EN (0x1<<4) /* single ISR mode enable */ 7557#define IGU_PF_CONF_SINGLE_ISR_EN (0x1<<4) /* single ISR mode enable */
7558#define IGU_PF_CONF_SIMD_MODE (0x1<<5) /* simd all ones mode */ 7558#define IGU_PF_CONF_SIMD_MODE (0x1<<5) /* simd all ones mode */
7559 7559
7560/* Fields of IGU VF CONFIGRATION REGISTER */ 7560/* Fields of IGU VF CONFIGURATION REGISTER */
7561#define IGU_VF_CONF_FUNC_EN (0x1<<0) /* function enable */ 7561#define IGU_VF_CONF_FUNC_EN (0x1<<0) /* function enable */
7562#define IGU_VF_CONF_MSI_MSIX_EN (0x1<<1) /* MSI/MSIX enable */ 7562#define IGU_VF_CONF_MSI_MSIX_EN (0x1<<1) /* MSI/MSIX enable */
7563#define IGU_VF_CONF_PARENT_MASK (0x3<<2) /* Parent PF */ 7563#define IGU_VF_CONF_PARENT_MASK (0x3<<2) /* Parent PF */