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authorArnd Bergmann <arnd@arndb.de>2012-09-28 16:07:14 -0400
committerArnd Bergmann <arnd@arndb.de>2012-09-28 16:07:14 -0400
commitb98138e00d96abc85b100c9b6886f105d9868ab5 (patch)
tree407c24077573368925ede8ff8309d67ea84e9981
parent0b40b4b44378f18b3c76384fa1380c24b5cd0f52 (diff)
parentac3524b7f5a6b9a744fb7ea19991355354c09afb (diff)
Merge branch 'cleanup/__iomem' into next/cleanup2
* cleanup/__iomem: ARM: Orion5x: ts78xx: Add IOMEM for virtual addresses. ARM: ux500: use __iomem pointers for MMIO Two new cleanup patches that were not already part of the first cleanup branch. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat
-rw-r--r--arch/arm/mach-at91/at91x40.c2
-rw-r--r--arch/arm/mach-at91/at91x40_time.c4
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h4
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h6
-rw-r--r--arch/arm/mach-at91/setup.c4
-rw-r--r--arch/arm/mach-ebsa110/core.c8
-rw-r--r--arch/arm/mach-ebsa110/core.h12
-rw-r--r--arch/arm/mach-imx/mach-kzm_arm11_01.c4
-rw-r--r--arch/arm/mach-imx/mach-mx31ads.c2
-rw-r--r--arch/arm/mach-imx/mach-mx31lite.c2
-rw-r--r--arch/arm/mach-integrator/core.c4
-rw-r--r--arch/arm/mach-integrator/cpu.c8
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c12
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c6
-rw-r--r--arch/arm/mach-integrator/pci_v3.c12
-rw-r--r--arch/arm/mach-iop13xx/include/mach/iop13xx.h20
-rw-r--r--arch/arm/mach-iop13xx/include/mach/memory.h14
-rw-r--r--arch/arm/mach-iop13xx/io.c12
-rw-r--r--arch/arm/mach-iop13xx/pci.c16
-rw-r--r--arch/arm/mach-iop13xx/pci.h4
-rw-r--r--arch/arm/mach-iop13xx/setup.c10
-rw-r--r--arch/arm/mach-iop32x/glantank.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c8
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/cpu.h5
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h10
-rw-r--r--arch/arm/mach-ks8695/cpu.c2
-rw-r--r--arch/arm/mach-ks8695/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-ks8695/include/mach/uncompress.h6
-rw-r--r--arch/arm/mach-lpc32xx/common.c8
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-msm/smd.c19
-rw-r--r--arch/arm/mach-nomadik/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-nomadik/include/mach/uncompress.h8
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c12
-rw-r--r--arch/arm/mach-prima2/include/mach/uncompress.h4
-rw-r--r--arch/arm/mach-sa1100/include/mach/simpad.h2
-rw-r--r--arch/arm/mach-sa1100/simpad.c2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c12
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c6
-rw-r--r--arch/arm/mach-shmobile/board-bonito.c8
-rw-r--r--arch/arm/mach-shmobile/board-g3evm.c12
-rw-r--r--arch/arm/mach-shmobile/board-g4evm.c30
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c8
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c22
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7740.c46
-rw-r--r--arch/arm/mach-shmobile/clock-sh7367.c44
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c60
-rw-r--r--arch/arm/mach-shmobile/clock-sh7377.c50
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c70
-rw-r--r--arch/arm/mach-shmobile/include/mach/gpio.h6
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c14
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c27
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c20
-rw-r--r--arch/arm/mach-shmobile/pm-rmobile.c6
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c57
-rw-r--r--arch/arm/mach-shmobile/setup-sh7367.c2
-rw-r--r--arch/arm/mach-shmobile/setup-sh7377.c2
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/spear.h14
-rw-r--r--arch/arm/mach-spear13xx/spear13xx.c6
-rw-r--r--arch/arm/mach-ux500/include/mach/uncompress.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h6
-rw-r--r--arch/arm/plat-samsung/s5p-irq-gpioint.c4
-rw-r--r--drivers/input/mouse/rpcmouse.c2
-rw-r--r--drivers/net/ethernet/seeq/ether3.c4
-rw-r--r--drivers/scsi/arm/eesox.c2
-rw-r--r--drivers/tty/serial/serial_ks8695.c4
-rw-r--r--drivers/video/da8xx-fb.c8
68 files changed, 411 insertions, 407 deletions
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 46090e642d8e..6bd7300a2bc5 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -47,7 +47,7 @@ static void at91x40_idle(void)
47 * Disable the processor clock. The processor will be automatically 47 * Disable the processor clock. The processor will be automatically
48 * re-enabled by an interrupt or by a reset. 48 * re-enabled by an interrupt or by a reset.
49 */ 49 */
50 __raw_writel(AT91_PS_CR_CPU, AT91_PS_CR); 50 __raw_writel(AT91_PS_CR_CPU, AT91_IO_P2V(AT91_PS_CR));
51 cpu_do_idle(); 51 cpu_do_idle();
52} 52}
53 53
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
index 6ca680a1d5d1..ee06d7bcdf76 100644
--- a/arch/arm/mach-at91/at91x40_time.c
+++ b/arch/arm/mach-at91/at91x40_time.c
@@ -29,10 +29,10 @@
29#include <mach/at91_tc.h> 29#include <mach/at91_tc.h>
30 30
31#define at91_tc_read(field) \ 31#define at91_tc_read(field) \
32 __raw_readl(AT91_TC + field) 32 __raw_readl(AT91_IO_P2V(AT91_TC) + field)
33 33
34#define at91_tc_write(field, value) \ 34#define at91_tc_write(field, value) \
35 __raw_writel(value, AT91_TC + field); 35 __raw_writel(value, AT91_IO_P2V(AT91_TC) + field);
36 36
37/* 37/*
38 * 3 counter/timer units present. 38 * 3 counter/timer units present.
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 09242b67d277..711a7892d331 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -67,13 +67,13 @@
67 * to 0xFEF78000 .. 0xFF000000. (544Kb) 67 * to 0xFEF78000 .. 0xFF000000. (544Kb)
68 */ 68 */
69#define AT91_IO_PHYS_BASE 0xFFF78000 69#define AT91_IO_PHYS_BASE 0xFFF78000
70#define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE) 70#define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE)
71#else 71#else
72/* 72/*
73 * Identity mapping for the non MMU case. 73 * Identity mapping for the non MMU case.
74 */ 74 */
75#define AT91_IO_PHYS_BASE AT91_BASE_SYS 75#define AT91_IO_PHYS_BASE AT91_BASE_SYS
76#define AT91_IO_VIRT_BASE AT91_IO_PHYS_BASE 76#define AT91_IO_VIRT_BASE IOMEM(AT91_IO_PHYS_BASE)
77#endif 77#endif
78 78
79#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) 79#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 6f6118d1576a..97ad68a826f8 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -94,7 +94,7 @@ static const u32 uarts_sam9x5[] = {
94 0, 94 0,
95}; 95};
96 96
97static inline const u32* decomp_soc_detect(u32 dbgu_base) 97static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
98{ 98{
99 u32 cidr, socid; 99 u32 cidr, socid;
100 100
@@ -142,10 +142,10 @@ static inline void arch_decomp_setup(void)
142 int i = 0; 142 int i = 0;
143 const u32* usarts; 143 const u32* usarts;
144 144
145 usarts = decomp_soc_detect(AT91_BASE_DBGU0); 145 usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0);
146 146
147 if (!usarts) 147 if (!usarts)
148 usarts = decomp_soc_detect(AT91_BASE_DBGU1); 148 usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1);
149 if (!usarts) { 149 if (!usarts) {
150 at91_uart = NULL; 150 at91_uart = NULL;
151 return; 151 return;
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 944bffb08991..e6f52de1062f 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -73,7 +73,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
73{ 73{
74 struct map_desc *desc = &sram_desc[bank]; 74 struct map_desc *desc = &sram_desc[bank];
75 75
76 desc->virtual = AT91_IO_VIRT_BASE - length; 76 desc->virtual = (unsigned long)AT91_IO_VIRT_BASE - length;
77 if (bank > 0) 77 if (bank > 0)
78 desc->virtual -= sram_desc[bank - 1].length; 78 desc->virtual -= sram_desc[bank - 1].length;
79 79
@@ -88,7 +88,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
88} 88}
89 89
90static struct map_desc at91_io_desc __initdata = { 90static struct map_desc at91_io_desc __initdata = {
91 .virtual = AT91_VA_BASE_SYS, 91 .virtual = (unsigned long)AT91_VA_BASE_SYS,
92 .pfn = __phys_to_pfn(AT91_BASE_SYS), 92 .pfn = __phys_to_pfn(AT91_BASE_SYS),
93 .length = SZ_16K, 93 .length = SZ_16K,
94 .type = MT_DEVICE, 94 .type = MT_DEVICE,
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 6f8068692edf..f0fe6b5350e2 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -74,22 +74,22 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
74 * sparse external-decode ISAIO space 74 * sparse external-decode ISAIO space
75 */ 75 */
76 { /* IRQ_STAT/IRQ_MCLR */ 76 { /* IRQ_STAT/IRQ_MCLR */
77 .virtual = IRQ_STAT, 77 .virtual = (unsigned long)IRQ_STAT,
78 .pfn = __phys_to_pfn(TRICK4_PHYS), 78 .pfn = __phys_to_pfn(TRICK4_PHYS),
79 .length = TRICK4_SIZE, 79 .length = TRICK4_SIZE,
80 .type = MT_DEVICE 80 .type = MT_DEVICE
81 }, { /* IRQ_MASK/IRQ_MSET */ 81 }, { /* IRQ_MASK/IRQ_MSET */
82 .virtual = IRQ_MASK, 82 .virtual = (unsigned long)IRQ_MASK,
83 .pfn = __phys_to_pfn(TRICK3_PHYS), 83 .pfn = __phys_to_pfn(TRICK3_PHYS),
84 .length = TRICK3_SIZE, 84 .length = TRICK3_SIZE,
85 .type = MT_DEVICE 85 .type = MT_DEVICE
86 }, { /* SOFT_BASE */ 86 }, { /* SOFT_BASE */
87 .virtual = SOFT_BASE, 87 .virtual = (unsigned long)SOFT_BASE,
88 .pfn = __phys_to_pfn(TRICK1_PHYS), 88 .pfn = __phys_to_pfn(TRICK1_PHYS),
89 .length = TRICK1_SIZE, 89 .length = TRICK1_SIZE,
90 .type = MT_DEVICE 90 .type = MT_DEVICE
91 }, { /* PIT_BASE */ 91 }, { /* PIT_BASE */
92 .virtual = PIT_BASE, 92 .virtual = (unsigned long)PIT_BASE,
93 .pfn = __phys_to_pfn(TRICK0_PHYS), 93 .pfn = __phys_to_pfn(TRICK0_PHYS),
94 .length = TRICK0_SIZE, 94 .length = TRICK0_SIZE,
95 .type = MT_DEVICE 95 .type = MT_DEVICE
diff --git a/arch/arm/mach-ebsa110/core.h b/arch/arm/mach-ebsa110/core.h
index c93c9e43012d..afe137ee172e 100644
--- a/arch/arm/mach-ebsa110/core.h
+++ b/arch/arm/mach-ebsa110/core.h
@@ -31,11 +31,11 @@
31#define TRICK7_PHYS 0xf3c00000 31#define TRICK7_PHYS 0xf3c00000
32 32
33/* Virtual addresses */ 33/* Virtual addresses */
34#define PIT_BASE 0xfc000000 /* trick 0 */ 34#define PIT_BASE IOMEM(0xfc000000) /* trick 0 */
35#define SOFT_BASE 0xfd000000 /* trick 1 */ 35#define SOFT_BASE IOMEM(0xfd000000) /* trick 1 */
36#define IRQ_MASK 0xfe000000 /* trick 3 - read */ 36#define IRQ_MASK IOMEM(0xfe000000) /* trick 3 - read */
37#define IRQ_MSET 0xfe000000 /* trick 3 - write */ 37#define IRQ_MSET IOMEM(0xfe000000) /* trick 3 - write */
38#define IRQ_STAT 0xff000000 /* trick 4 - read */ 38#define IRQ_STAT IOMEM(0xff000000) /* trick 4 - read */
39#define IRQ_MCLR 0xff000000 /* trick 4 - write */ 39#define IRQ_MCLR IOMEM(0xff000000) /* trick 4 - write */
40 40
41#endif 41#endif
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 5d08533ab2c7..4b9b7aae7a9b 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -259,13 +259,13 @@ static void __init kzm_board_init(void)
259 */ 259 */
260static struct map_desc kzm_io_desc[] __initdata = { 260static struct map_desc kzm_io_desc[] __initdata = {
261 { 261 {
262 .virtual = MX31_CS4_BASE_ADDR_VIRT, 262 .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
263 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), 263 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
264 .length = MX31_CS4_SIZE, 264 .length = MX31_CS4_SIZE,
265 .type = MT_DEVICE 265 .type = MT_DEVICE
266 }, 266 },
267 { 267 {
268 .virtual = MX31_CS5_BASE_ADDR_VIRT, 268 .virtual = (unsigned long)MX31_CS5_BASE_ADDR_VIRT,
269 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR), 269 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
270 .length = MX31_CS5_SIZE, 270 .length = MX31_CS5_SIZE,
271 .type = MT_DEVICE 271 .type = MT_DEVICE
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index d37f4809c556..e774b07f48d3 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -540,7 +540,7 @@ static void __init mxc_init_audio(void)
540 */ 540 */
541static struct map_desc mx31ads_io_desc[] __initdata = { 541static struct map_desc mx31ads_io_desc[] __initdata = {
542 { 542 {
543 .virtual = MX31_CS4_BASE_ADDR_VIRT, 543 .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
544 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), 544 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
545 .length = CS4_CS8900_MMIO_START, 545 .length = CS4_CS8900_MMIO_START,
546 .type = MT_DEVICE 546 .type = MT_DEVICE
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index c8785b39eaed..ef57cff5abfb 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -207,7 +207,7 @@ static struct platform_device physmap_flash_device = {
207 */ 207 */
208static struct map_desc mx31lite_io_desc[] __initdata = { 208static struct map_desc mx31lite_io_desc[] __initdata = {
209 { 209 {
210 .virtual = MX31_CS4_BASE_ADDR_VIRT, 210 .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
211 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), 211 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
212 .length = MX31_CS4_SIZE, 212 .length = MX31_CS4_SIZE,
213 .type = MT_DEVICE 213 .type = MT_DEVICE
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 3fa6c51390da..a432d4325f89 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -95,8 +95,8 @@ arch_initcall(integrator_init);
95 * UART0 7 6 95 * UART0 7 6
96 * UART1 5 4 96 * UART1 5 4
97 */ 97 */
98#define SC_CTRLC IO_ADDRESS(INTEGRATOR_SC_CTRLC) 98#define SC_CTRLC __io_address(INTEGRATOR_SC_CTRLC)
99#define SC_CTRLS IO_ADDRESS(INTEGRATOR_SC_CTRLS) 99#define SC_CTRLS __io_address(INTEGRATOR_SC_CTRLS)
100 100
101static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl) 101static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
102{ 102{
diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c
index fbb457779895..590c192cdf4d 100644
--- a/arch/arm/mach-integrator/cpu.c
+++ b/arch/arm/mach-integrator/cpu.c
@@ -25,10 +25,10 @@
25 25
26static struct cpufreq_driver integrator_driver; 26static struct cpufreq_driver integrator_driver;
27 27
28#define CM_ID IO_ADDRESS(INTEGRATOR_HDR_ID) 28#define CM_ID __io_address(INTEGRATOR_HDR_ID)
29#define CM_OSC IO_ADDRESS(INTEGRATOR_HDR_OSC) 29#define CM_OSC __io_address(INTEGRATOR_HDR_OSC)
30#define CM_STAT IO_ADDRESS(INTEGRATOR_HDR_STAT) 30#define CM_STAT __io_address(INTEGRATOR_HDR_STAT)
31#define CM_LOCK IO_ADDRESS(INTEGRATOR_HDR_LOCK) 31#define CM_LOCK __io_address(INTEGRATOR_HDR_LOCK)
32 32
33static const struct icst_params lclk_params = { 33static const struct icst_params lclk_params = {
34 .ref = 24000000, 34 .ref = 24000000,
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 3b2267529f5e..c8e448ecacd2 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -133,17 +133,17 @@ static struct map_desc ap_io_desc[] __initdata = {
133 .length = SZ_4K, 133 .length = SZ_4K,
134 .type = MT_DEVICE 134 .type = MT_DEVICE
135 }, { 135 }, {
136 .virtual = PCI_MEMORY_VADDR, 136 .virtual = (unsigned long)PCI_MEMORY_VADDR,
137 .pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE), 137 .pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE),
138 .length = SZ_16M, 138 .length = SZ_16M,
139 .type = MT_DEVICE 139 .type = MT_DEVICE
140 }, { 140 }, {
141 .virtual = PCI_CONFIG_VADDR, 141 .virtual = (unsigned long)PCI_CONFIG_VADDR,
142 .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE), 142 .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
143 .length = SZ_16M, 143 .length = SZ_16M,
144 .type = MT_DEVICE 144 .type = MT_DEVICE
145 }, { 145 }, {
146 .virtual = PCI_V3_VADDR, 146 .virtual = (unsigned long)PCI_V3_VADDR,
147 .pfn = __phys_to_pfn(PHYS_PCI_V3_BASE), 147 .pfn = __phys_to_pfn(PHYS_PCI_V3_BASE),
148 .length = SZ_64K, 148 .length = SZ_64K,
149 .type = MT_DEVICE 149 .type = MT_DEVICE
@@ -317,9 +317,9 @@ static void __init ap_init(void)
317/* 317/*
318 * Where is the timer (VA)? 318 * Where is the timer (VA)?
319 */ 319 */
320#define TIMER0_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER0_BASE) 320#define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
321#define TIMER1_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER1_BASE) 321#define TIMER1_VA_BASE __io_address(INTEGRATOR_TIMER1_BASE)
322#define TIMER2_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER2_BASE) 322#define TIMER2_VA_BASE __io_address(INTEGRATOR_TIMER2_BASE)
323 323
324static unsigned long timer_reload; 324static unsigned long timer_reload;
325 325
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 82d5c837cc74..3df5fc369361 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -59,7 +59,7 @@
59 59
60#define INTCP_ETH_SIZE 0x10 60#define INTCP_ETH_SIZE 0x10
61 61
62#define INTCP_VA_CTRL_BASE IO_ADDRESS(INTEGRATOR_CP_CTL_BASE) 62#define INTCP_VA_CTRL_BASE __io_address(INTEGRATOR_CP_CTL_BASE)
63#define INTCP_FLASHPROG 0x04 63#define INTCP_FLASHPROG 0x04
64#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) 64#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0)
65#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) 65#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1)
@@ -265,8 +265,8 @@ static struct platform_device *intcp_devs[] __initdata = {
265 */ 265 */
266static unsigned int mmc_status(struct device *dev) 266static unsigned int mmc_status(struct device *dev)
267{ 267{
268 unsigned int status = readl(IO_ADDRESS(0xca000000 + 4)); 268 unsigned int status = readl(__io_address(0xca000000 + 4));
269 writel(8, IO_ADDRESS(INTEGRATOR_CP_CTL_BASE + 8)); 269 writel(8, __io_address(INTEGRATOR_CP_CTL_BASE + 8));
270 270
271 return status & 8; 271 return status & 8;
272} 272}
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index b866880e82ac..e6145a85acf8 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -181,7 +181,7 @@ static DEFINE_RAW_SPINLOCK(v3_lock);
181#undef V3_LB_BASE_PREFETCH 181#undef V3_LB_BASE_PREFETCH
182#define V3_LB_BASE_PREFETCH 0 182#define V3_LB_BASE_PREFETCH 0
183 183
184static unsigned long v3_open_config_window(struct pci_bus *bus, 184static void __iomem *v3_open_config_window(struct pci_bus *bus,
185 unsigned int devfn, int offset) 185 unsigned int devfn, int offset)
186{ 186{
187 unsigned int address, mapaddress, busnr; 187 unsigned int address, mapaddress, busnr;
@@ -280,7 +280,7 @@ static void v3_close_config_window(void)
280static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where, 280static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
281 int size, u32 *val) 281 int size, u32 *val)
282{ 282{
283 unsigned long addr; 283 void __iomem *addr;
284 unsigned long flags; 284 unsigned long flags;
285 u32 v; 285 u32 v;
286 286
@@ -311,7 +311,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
311static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where, 311static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
312 int size, u32 val) 312 int size, u32 val)
313{ 313{
314 unsigned long addr; 314 void __iomem *addr;
315 unsigned long flags; 315 unsigned long flags;
316 316
317 raw_spin_lock_irqsave(&v3_lock, flags); 317 raw_spin_lock_irqsave(&v3_lock, flags);
@@ -391,9 +391,9 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
391 * means I can't get additional information on the reason for the pm2fb 391 * means I can't get additional information on the reason for the pm2fb
392 * problems. I suppose I'll just have to mind-meld with the machine. ;) 392 * problems. I suppose I'll just have to mind-meld with the machine. ;)
393 */ 393 */
394#define SC_PCI IO_ADDRESS(INTEGRATOR_SC_PCIENABLE) 394#define SC_PCI __io_address(INTEGRATOR_SC_PCIENABLE)
395#define SC_LBFADDR IO_ADDRESS(INTEGRATOR_SC_BASE + 0x20) 395#define SC_LBFADDR __io_address(INTEGRATOR_SC_BASE + 0x20)
396#define SC_LBFCODE IO_ADDRESS(INTEGRATOR_SC_BASE + 0x24) 396#define SC_LBFCODE __io_address(INTEGRATOR_SC_BASE + 0x24)
397 397
398static int 398static int
399v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 399v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index e190dcd7d72d..01b41abce38c 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -148,18 +148,16 @@ extern unsigned long get_iop_tick_rate(void);
148 * IOP13XX chipset registers 148 * IOP13XX chipset registers
149 */ 149 */
150#define IOP13XX_PMMR_PHYS_MEM_BASE 0xffd80000UL /* PMMR phys. address */ 150#define IOP13XX_PMMR_PHYS_MEM_BASE 0xffd80000UL /* PMMR phys. address */
151#define IOP13XX_PMMR_VIRT_MEM_BASE 0xfee80000UL /* PMMR phys. address */ 151#define IOP13XX_PMMR_VIRT_MEM_BASE (void __iomem *)(0xfee80000UL) /* PMMR phys. address */
152#define IOP13XX_PMMR_MEM_WINDOW_SIZE 0x80000 152#define IOP13XX_PMMR_MEM_WINDOW_SIZE 0x80000
153#define IOP13XX_PMMR_UPPER_MEM_VA (IOP13XX_PMMR_VIRT_MEM_BASE +\ 153#define IOP13XX_PMMR_UPPER_MEM_VA (IOP13XX_PMMR_VIRT_MEM_BASE +\
154 IOP13XX_PMMR_MEM_WINDOW_SIZE - 1) 154 IOP13XX_PMMR_MEM_WINDOW_SIZE - 1)
155#define IOP13XX_PMMR_UPPER_MEM_PA (IOP13XX_PMMR_PHYS_MEM_BASE +\ 155#define IOP13XX_PMMR_UPPER_MEM_PA (IOP13XX_PMMR_PHYS_MEM_BASE +\
156 IOP13XX_PMMR_MEM_WINDOW_SIZE - 1) 156 IOP13XX_PMMR_MEM_WINDOW_SIZE - 1)
157#define IOP13XX_PMMR_VIRT_TO_PHYS(addr) (u32) ((u32) addr +\ 157#define IOP13XX_PMMR_VIRT_TO_PHYS(addr) (((addr) - IOP13XX_PMMR_VIRT_MEM_BASE)\
158 (IOP13XX_PMMR_PHYS_MEM_BASE\ 158 + IOP13XX_PMMR_PHYS_MEM_BASE)
159 - IOP13XX_PMMR_VIRT_MEM_BASE)) 159#define IOP13XX_PMMR_PHYS_TO_VIRT(addr) (((addr) - IOP13XX_PMMR_PHYS_MEM_BASE)\
160#define IOP13XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ 160 + IOP13XX_PMMR_VIRT_MEM_BASE)
161 (IOP13XX_PMMR_PHYS_MEM_BASE\
162 - IOP13XX_PMMR_VIRT_MEM_BASE))
163#define IOP13XX_REG_ADDR32(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) 161#define IOP13XX_REG_ADDR32(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg))
164#define IOP13XX_REG_ADDR16(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) 162#define IOP13XX_REG_ADDR16(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg))
165#define IOP13XX_REG_ADDR8(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) 163#define IOP13XX_REG_ADDR8(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg))
@@ -169,10 +167,10 @@ extern unsigned long get_iop_tick_rate(void);
169#define IOP13XX_PMMR_SIZE 0x00080000 167#define IOP13XX_PMMR_SIZE 0x00080000
170 168
171/*=================== Defines for Platform Devices =====================*/ 169/*=================== Defines for Platform Devices =====================*/
172#define IOP13XX_UART0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002300) 170#define IOP13XX_UART0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE + 0x00002300)
173#define IOP13XX_UART1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002340) 171#define IOP13XX_UART1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE + 0x00002340)
174#define IOP13XX_UART0_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002300) 172#define IOP13XX_UART0_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE + 0x00002300)
175#define IOP13XX_UART1_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002340) 173#define IOP13XX_UART1_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE + 0x00002340)
176 174
177#define IOP13XX_I2C0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002500) 175#define IOP13XX_I2C0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002500)
178#define IOP13XX_I2C1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002520) 176#define IOP13XX_I2C1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002520)
diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h
index 1afa99ef97fa..7c032d0ab24a 100644
--- a/arch/arm/mach-iop13xx/include/mach/memory.h
+++ b/arch/arm/mach-iop13xx/include/mach/memory.h
@@ -16,12 +16,12 @@
16#define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE) 16#define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE)
17#define IOP13XX_PMMR_P_END (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE) 17#define IOP13XX_PMMR_P_END (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE)
18 18
19static inline dma_addr_t __virt_to_lbus(unsigned long x) 19static inline dma_addr_t __virt_to_lbus(void __iomem *x)
20{ 20{
21 return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE; 21 return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE;
22} 22}
23 23
24static inline unsigned long __lbus_to_virt(dma_addr_t x) 24static inline void __iomem *__lbus_to_virt(dma_addr_t x)
25{ 25{
26 return x + IOP13XX_PMMR_VIRT_MEM_BASE - IOP13XX_PMMR_PHYS_MEM_BASE; 26 return x + IOP13XX_PMMR_VIRT_MEM_BASE - IOP13XX_PMMR_PHYS_MEM_BASE;
27} 27}
@@ -38,23 +38,23 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
38 38
39#define __arch_dma_to_virt(dev, addr) \ 39#define __arch_dma_to_virt(dev, addr) \
40 ({ \ 40 ({ \
41 unsigned long __virt; \ 41 void * __virt; \
42 dma_addr_t __dma = addr; \ 42 dma_addr_t __dma = addr; \
43 if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \ 43 if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \
44 __virt = __lbus_to_virt(__dma); \ 44 __virt = __lbus_to_virt(__dma); \
45 else \ 45 else \
46 __virt = __phys_to_virt(__dma); \ 46 __virt = (void *)__phys_to_virt(__dma); \
47 (void *)__virt; \ 47 __virt; \
48 }) 48 })
49 49
50#define __arch_virt_to_dma(dev, addr) \ 50#define __arch_virt_to_dma(dev, addr) \
51 ({ \ 51 ({ \
52 unsigned long __virt = (unsigned long)addr; \ 52 void * __virt = addr; \
53 dma_addr_t __dma; \ 53 dma_addr_t __dma; \
54 if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \ 54 if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \
55 __dma = __virt_to_lbus(__virt); \ 55 __dma = __virt_to_lbus(__virt); \
56 else \ 56 else \
57 __dma = __virt_to_phys(__virt); \ 57 __dma = __virt_to_phys((unsigned long)__virt); \
58 __dma; \ 58 __dma; \
59 }) 59 })
60 60
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index 3c364198db9c..b651af966b57 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -52,14 +52,14 @@ static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
52 if (unlikely(!iop13xx_atux_mem_base)) 52 if (unlikely(!iop13xx_atux_mem_base))
53 retval = NULL; 53 retval = NULL;
54 else 54 else
55 retval = (void *)(iop13xx_atux_mem_base + 55 retval = (iop13xx_atux_mem_base +
56 (cookie - IOP13XX_PCIX_LOWER_MEM_RA)); 56 (cookie - IOP13XX_PCIX_LOWER_MEM_RA));
57 break; 57 break;
58 case IOP13XX_PCIE_LOWER_MEM_RA ... IOP13XX_PCIE_UPPER_MEM_RA: 58 case IOP13XX_PCIE_LOWER_MEM_RA ... IOP13XX_PCIE_UPPER_MEM_RA:
59 if (unlikely(!iop13xx_atue_mem_base)) 59 if (unlikely(!iop13xx_atue_mem_base))
60 retval = NULL; 60 retval = NULL;
61 else 61 else
62 retval = (void *)(iop13xx_atue_mem_base + 62 retval = (iop13xx_atue_mem_base +
63 (cookie - IOP13XX_PCIE_LOWER_MEM_RA)); 63 (cookie - IOP13XX_PCIE_LOWER_MEM_RA));
64 break; 64 break;
65 case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA: 65 case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA:
@@ -74,7 +74,7 @@ static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
74 retval = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(cookie); 74 retval = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(cookie);
75 break; 75 break;
76 case IOP13XX_PMMR_PHYS_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_PA: 76 case IOP13XX_PMMR_PHYS_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_PA:
77 retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie); 77 retval = IOP13XX_PMMR_PHYS_TO_VIRT(cookie);
78 break; 78 break;
79 default: 79 default:
80 retval = __arm_ioremap_caller(cookie, size, mtype, 80 retval = __arm_ioremap_caller(cookie, size, mtype,
@@ -99,9 +99,9 @@ static void __iop13xx_iounmap(volatile void __iomem *addr)
99 goto skip; 99 goto skip;
100 100
101 switch ((u32) addr) { 101 switch ((u32) addr) {
102 case IOP13XX_PCIE_LOWER_IO_VA ... IOP13XX_PCIE_UPPER_IO_VA: 102 case (u32)IOP13XX_PCIE_LOWER_IO_VA ... (u32)IOP13XX_PCIE_UPPER_IO_VA:
103 case IOP13XX_PCIX_LOWER_IO_VA ... IOP13XX_PCIX_UPPER_IO_VA: 103 case (u32)IOP13XX_PCIX_LOWER_IO_VA ... (u32)IOP13XX_PCIX_UPPER_IO_VA:
104 case IOP13XX_PMMR_VIRT_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_VA: 104 case (u32)IOP13XX_PMMR_VIRT_MEM_BASE ... (u32)IOP13XX_PMMR_UPPER_MEM_VA:
105 goto skip; 105 goto skip;
106 } 106 }
107 __iounmap(addr); 107 __iounmap(addr);
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 861cb12ef436..b38e97c26dcb 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -36,8 +36,8 @@ u32 iop13xx_atux_pmmr_offset; /* This offset can change based on strapping */
36u32 iop13xx_atue_pmmr_offset; /* This offset can change based on strapping */ 36u32 iop13xx_atue_pmmr_offset; /* This offset can change based on strapping */
37static struct pci_bus *pci_bus_atux = 0; 37static struct pci_bus *pci_bus_atux = 0;
38static struct pci_bus *pci_bus_atue = 0; 38static struct pci_bus *pci_bus_atue = 0;
39u32 iop13xx_atue_mem_base; 39void __iomem *iop13xx_atue_mem_base;
40u32 iop13xx_atux_mem_base; 40void __iomem *iop13xx_atux_mem_base;
41size_t iop13xx_atue_mem_size; 41size_t iop13xx_atue_mem_size;
42size_t iop13xx_atux_mem_size; 42size_t iop13xx_atux_mem_size;
43 43
@@ -88,8 +88,7 @@ void iop13xx_map_pci_memory(void)
88 } 88 }
89 89
90 if (end) { 90 if (end) {
91 iop13xx_atux_mem_base = 91 iop13xx_atux_mem_base = __arm_ioremap_pfn(
92 (u32) __arm_ioremap_pfn(
93 __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA) 92 __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA)
94 , 0, iop13xx_atux_mem_size, MT_DEVICE); 93 , 0, iop13xx_atux_mem_size, MT_DEVICE);
95 if (!iop13xx_atux_mem_base) { 94 if (!iop13xx_atux_mem_base) {
@@ -99,7 +98,7 @@ void iop13xx_map_pci_memory(void)
99 } 98 }
100 } else 99 } else
101 iop13xx_atux_mem_size = 0; 100 iop13xx_atux_mem_size = 0;
102 PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n", 101 PRINTK("%s: atu: %d bus_size: %d mem_base: %p\n",
103 __func__, atu, iop13xx_atux_mem_size, 102 __func__, atu, iop13xx_atux_mem_size,
104 iop13xx_atux_mem_base); 103 iop13xx_atux_mem_base);
105 break; 104 break;
@@ -114,8 +113,7 @@ void iop13xx_map_pci_memory(void)
114 } 113 }
115 114
116 if (end) { 115 if (end) {
117 iop13xx_atue_mem_base = 116 iop13xx_atue_mem_base = __arm_ioremap_pfn(
118 (u32) __arm_ioremap_pfn(
119 __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA) 117 __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA)
120 , 0, iop13xx_atue_mem_size, MT_DEVICE); 118 , 0, iop13xx_atue_mem_size, MT_DEVICE);
121 if (!iop13xx_atue_mem_base) { 119 if (!iop13xx_atue_mem_base) {
@@ -125,13 +123,13 @@ void iop13xx_map_pci_memory(void)
125 } 123 }
126 } else 124 } else
127 iop13xx_atue_mem_size = 0; 125 iop13xx_atue_mem_size = 0;
128 PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n", 126 PRINTK("%s: atu: %d bus_size: %d mem_base: %p\n",
129 __func__, atu, iop13xx_atue_mem_size, 127 __func__, atu, iop13xx_atue_mem_size,
130 iop13xx_atue_mem_base); 128 iop13xx_atue_mem_base);
131 break; 129 break;
132 } 130 }
133 131
134 printk("%s: Initialized (%uM @ resource/virtual: %08lx/%08x)\n", 132 printk("%s: Initialized (%uM @ resource/virtual: %08lx/%p)\n",
135 atu ? "ATUE" : "ATUX", 133 atu ? "ATUE" : "ATUX",
136 (atu ? iop13xx_atue_mem_size : iop13xx_atux_mem_size) / 134 (atu ? iop13xx_atue_mem_size : iop13xx_atux_mem_size) /
137 SZ_1M, 135 SZ_1M,
diff --git a/arch/arm/mach-iop13xx/pci.h b/arch/arm/mach-iop13xx/pci.h
index c70cf5b41e31..d45a80b3080e 100644
--- a/arch/arm/mach-iop13xx/pci.h
+++ b/arch/arm/mach-iop13xx/pci.h
@@ -1,6 +1,6 @@
1#include <linux/types.h> 1#include <linux/types.h>
2 2
3extern u32 iop13xx_atue_mem_base; 3extern void __iomem *iop13xx_atue_mem_base;
4extern u32 iop13xx_atux_mem_base; 4extern void __iomem *iop13xx_atux_mem_base;
5extern size_t iop13xx_atue_mem_size; 5extern size_t iop13xx_atue_mem_size;
6extern size_t iop13xx_atux_mem_size; 6extern size_t iop13xx_atux_mem_size;
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index daabb1fa6c2c..f5c2a229ce0a 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -36,7 +36,7 @@
36 */ 36 */
37static struct map_desc iop13xx_std_desc[] __initdata = { 37static struct map_desc iop13xx_std_desc[] __initdata = {
38 { /* mem mapped registers */ 38 { /* mem mapped registers */
39 .virtual = IOP13XX_PMMR_VIRT_MEM_BASE, 39 .virtual = (unsigned long)IOP13XX_PMMR_VIRT_MEM_BASE,
40 .pfn = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE), 40 .pfn = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE),
41 .length = IOP13XX_PMMR_SIZE, 41 .length = IOP13XX_PMMR_SIZE,
42 .type = MT_DEVICE, 42 .type = MT_DEVICE,
@@ -81,8 +81,8 @@ static struct resource iop13xx_uart1_resources[] = {
81 81
82static struct plat_serial8250_port iop13xx_uart0_data[] = { 82static struct plat_serial8250_port iop13xx_uart0_data[] = {
83 { 83 {
84 .membase = (char*)(IOP13XX_UART0_VIRT), 84 .membase = IOP13XX_UART0_VIRT,
85 .mapbase = (IOP13XX_UART0_PHYS), 85 .mapbase = IOP13XX_UART0_PHYS,
86 .irq = IRQ_IOP13XX_UART0, 86 .irq = IRQ_IOP13XX_UART0,
87 .uartclk = IOP13XX_UART_XTAL, 87 .uartclk = IOP13XX_UART_XTAL,
88 .regshift = 2, 88 .regshift = 2,
@@ -94,8 +94,8 @@ static struct plat_serial8250_port iop13xx_uart0_data[] = {
94 94
95static struct plat_serial8250_port iop13xx_uart1_data[] = { 95static struct plat_serial8250_port iop13xx_uart1_data[] = {
96 { 96 {
97 .membase = (char*)(IOP13XX_UART1_VIRT), 97 .membase = IOP13XX_UART1_VIRT,
98 .mapbase = (IOP13XX_UART1_PHYS), 98 .mapbase = IOP13XX_UART1_PHYS,
99 .irq = IRQ_IOP13XX_UART1, 99 .irq = IRQ_IOP13XX_UART1,
100 .uartclk = IOP13XX_UART_XTAL, 100 .uartclk = IOP13XX_UART_XTAL,
101 .regshift = 2, 101 .regshift = 2,
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index c15a100ba779..02e20c3912ba 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -183,7 +183,7 @@ static struct i2c_board_info __initdata glantank_i2c_devices[] = {
183 183
184static void glantank_power_off(void) 184static void glantank_power_off(void)
185{ 185{
186 __raw_writeb(0x01, 0xfe8d0004); 186 __raw_writeb(0x01, IOMEM(0xfe8d0004));
187 187
188 while (1) 188 while (1)
189 ; 189 ;
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index a9f80943d01f..fdf91a160884 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -53,24 +53,24 @@ static struct clock_event_device clockevent_ixp4xx;
53 *************************************************************************/ 53 *************************************************************************/
54static struct map_desc ixp4xx_io_desc[] __initdata = { 54static struct map_desc ixp4xx_io_desc[] __initdata = {
55 { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */ 55 { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */
56 .virtual = IXP4XX_PERIPHERAL_BASE_VIRT, 56 .virtual = (unsigned long)IXP4XX_PERIPHERAL_BASE_VIRT,
57 .pfn = __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS), 57 .pfn = __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS),
58 .length = IXP4XX_PERIPHERAL_REGION_SIZE, 58 .length = IXP4XX_PERIPHERAL_REGION_SIZE,
59 .type = MT_DEVICE 59 .type = MT_DEVICE
60 }, { /* Expansion Bus Config Registers */ 60 }, { /* Expansion Bus Config Registers */
61 .virtual = IXP4XX_EXP_CFG_BASE_VIRT, 61 .virtual = (unsigned long)IXP4XX_EXP_CFG_BASE_VIRT,
62 .pfn = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS), 62 .pfn = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS),
63 .length = IXP4XX_EXP_CFG_REGION_SIZE, 63 .length = IXP4XX_EXP_CFG_REGION_SIZE,
64 .type = MT_DEVICE 64 .type = MT_DEVICE
65 }, { /* PCI Registers */ 65 }, { /* PCI Registers */
66 .virtual = IXP4XX_PCI_CFG_BASE_VIRT, 66 .virtual = (unsigned long)IXP4XX_PCI_CFG_BASE_VIRT,
67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS), 67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
68 .length = IXP4XX_PCI_CFG_REGION_SIZE, 68 .length = IXP4XX_PCI_CFG_REGION_SIZE,
69 .type = MT_DEVICE 69 .type = MT_DEVICE
70 }, 70 },
71#ifdef CONFIG_DEBUG_LL 71#ifdef CONFIG_DEBUG_LL
72 { /* Debug UART mapping */ 72 { /* Debug UART mapping */
73 .virtual = IXP4XX_DEBUG_UART_BASE_VIRT, 73 .virtual = (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT,
74 .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS), 74 .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
75 .length = IXP4XX_DEBUG_UART_REGION_SIZE, 75 .length = IXP4XX_DEBUG_UART_REGION_SIZE,
76 .type = MT_DEVICE 76 .type = MT_DEVICE
diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h
index b2ef65db0e91..ebc0ba31ce85 100644
--- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
+++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
@@ -14,6 +14,7 @@
14#ifndef __ASM_ARCH_CPU_H__ 14#ifndef __ASM_ARCH_CPU_H__
15#define __ASM_ARCH_CPU_H__ 15#define __ASM_ARCH_CPU_H__
16 16
17#include <linux/io.h>
17#include <asm/cputype.h> 18#include <asm/cputype.h>
18 19
19/* Processor id value in CP15 Register 0 */ 20/* Processor id value in CP15 Register 0 */
@@ -37,7 +38,7 @@
37 38
38static inline u32 ixp4xx_read_feature_bits(void) 39static inline u32 ixp4xx_read_feature_bits(void)
39{ 40{
40 u32 val = ~*IXP4XX_EXP_CFG2; 41 u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
41 42
42 if (cpu_is_ixp42x_rev_a0()) 43 if (cpu_is_ixp42x_rev_a0())
43 return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP | 44 return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP |
@@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
51 52
52static inline void ixp4xx_write_feature_bits(u32 value) 53static inline void ixp4xx_write_feature_bits(u32 value)
53{ 54{
54 *IXP4XX_EXP_CFG2 = ~value; 55 __raw_writel(~value, IXP4XX_EXP_CFG2);
55} 56}
56 57
57#endif /* _ASM_ARCH_CPU_H */ 58#endif /* _ASM_ARCH_CPU_H */
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index 97c530f66e78..eb68b61ce975 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -49,21 +49,21 @@
49 * Expansion BUS Configuration registers 49 * Expansion BUS Configuration registers
50 */ 50 */
51#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) 51#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000)
52#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000) 52#define IXP4XX_EXP_CFG_BASE_VIRT IOMEM(0xFFBFE000)
53#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) 53#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000)
54 54
55/* 55/*
56 * PCI Config registers 56 * PCI Config registers
57 */ 57 */
58#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) 58#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000)
59#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000) 59#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFFBFF000)
60#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) 60#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000)
61 61
62/* 62/*
63 * Peripheral space 63 * Peripheral space
64 */ 64 */
65#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) 65#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
66#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000) 66#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFFBEB000)
67#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) 67#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
68 68
69/* 69/*
@@ -73,7 +73,7 @@
73 * aligned so that it * can be used with the low-level debug code. 73 * aligned so that it * can be used with the low-level debug code.
74 */ 74 */
75#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) 75#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000)
76#define IXP4XX_DEBUG_UART_BASE_VIRT (0xffb00000) 76#define IXP4XX_DEBUG_UART_BASE_VIRT IOMEM(0xffb00000)
77#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) 77#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000)
78 78
79#define IXP4XX_EXP_CS0_OFFSET 0x00 79#define IXP4XX_EXP_CS0_OFFSET 0x00
@@ -92,7 +92,7 @@
92/* 92/*
93 * Expansion Bus Controller registers. 93 * Expansion Bus Controller registers.
94 */ 94 */
95#define IXP4XX_EXP_REG(x) ((volatile u32 *)(IXP4XX_EXP_CFG_BASE_VIRT+(x))) 95#define IXP4XX_EXP_REG(x) ((volatile u32 __iomem *)(IXP4XX_EXP_CFG_BASE_VIRT+(x)))
96 96
97#define IXP4XX_EXP_CS0 IXP4XX_EXP_REG(IXP4XX_EXP_CS0_OFFSET) 97#define IXP4XX_EXP_CS0 IXP4XX_EXP_REG(IXP4XX_EXP_CS0_OFFSET)
98#define IXP4XX_EXP_CS1 IXP4XX_EXP_REG(IXP4XX_EXP_CS1_OFFSET) 98#define IXP4XX_EXP_CS1 IXP4XX_EXP_REG(IXP4XX_EXP_CS1_OFFSET)
diff --git a/arch/arm/mach-ks8695/cpu.c b/arch/arm/mach-ks8695/cpu.c
index 7f3f24053a00..ddb24222918e 100644
--- a/arch/arm/mach-ks8695/cpu.c
+++ b/arch/arm/mach-ks8695/cpu.c
@@ -36,7 +36,7 @@
36 36
37static struct __initdata map_desc ks8695_io_desc[] = { 37static struct __initdata map_desc ks8695_io_desc[] = {
38 { 38 {
39 .virtual = KS8695_IO_VA, 39 .virtual = (unsigned long)KS8695_IO_VA,
40 .pfn = __phys_to_pfn(KS8695_IO_PA), 40 .pfn = __phys_to_pfn(KS8695_IO_PA),
41 .length = KS8695_IO_SIZE, 41 .length = KS8695_IO_SIZE,
42 .type = MT_DEVICE, 42 .type = MT_DEVICE,
diff --git a/arch/arm/mach-ks8695/include/mach/hardware.h b/arch/arm/mach-ks8695/include/mach/hardware.h
index 5e0c388143da..5090338c0db2 100644
--- a/arch/arm/mach-ks8695/include/mach/hardware.h
+++ b/arch/arm/mach-ks8695/include/mach/hardware.h
@@ -33,7 +33,7 @@
33 * head debug code as the initial MMU setup only deals in L1 sections. 33 * head debug code as the initial MMU setup only deals in L1 sections.
34 */ 34 */
35#define KS8695_IO_PA 0x03F00000 35#define KS8695_IO_PA 0x03F00000
36#define KS8695_IO_VA 0xF0000000 36#define KS8695_IO_VA IOMEM(0xF0000000)
37#define KS8695_IO_SIZE SZ_1M 37#define KS8695_IO_SIZE SZ_1M
38 38
39#define KS8695_PCIMEM_PA 0x60000000 39#define KS8695_PCIMEM_PA 0x60000000
diff --git a/arch/arm/mach-ks8695/include/mach/uncompress.h b/arch/arm/mach-ks8695/include/mach/uncompress.h
index 9495cb4d701a..8879d610308a 100644
--- a/arch/arm/mach-ks8695/include/mach/uncompress.h
+++ b/arch/arm/mach-ks8695/include/mach/uncompress.h
@@ -19,15 +19,15 @@
19 19
20static void putc(char c) 20static void putc(char c)
21{ 21{
22 while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE)) 22 while (!(__raw_readl((void __iomem*)KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE))
23 barrier(); 23 barrier();
24 24
25 __raw_writel(c, KS8695_UART_PA + KS8695_URTH); 25 __raw_writel(c, (void __iomem*)KS8695_UART_PA + KS8695_URTH);
26} 26}
27 27
28static inline void flush(void) 28static inline void flush(void)
29{ 29{
30 while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTE)) 30 while (!(__raw_readl((void __iomem*)KS8695_UART_PA + KS8695_URLS) & URLS_URTE))
31 barrier(); 31 barrier();
32} 32}
33 33
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index a48dc2dec485..0d4db8c544b5 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -177,25 +177,25 @@ u32 clk_get_pclk_div(void)
177 177
178static struct map_desc lpc32xx_io_desc[] __initdata = { 178static struct map_desc lpc32xx_io_desc[] __initdata = {
179 { 179 {
180 .virtual = IO_ADDRESS(LPC32XX_AHB0_START), 180 .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START),
181 .pfn = __phys_to_pfn(LPC32XX_AHB0_START), 181 .pfn = __phys_to_pfn(LPC32XX_AHB0_START),
182 .length = LPC32XX_AHB0_SIZE, 182 .length = LPC32XX_AHB0_SIZE,
183 .type = MT_DEVICE 183 .type = MT_DEVICE
184 }, 184 },
185 { 185 {
186 .virtual = IO_ADDRESS(LPC32XX_AHB1_START), 186 .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB1_START),
187 .pfn = __phys_to_pfn(LPC32XX_AHB1_START), 187 .pfn = __phys_to_pfn(LPC32XX_AHB1_START),
188 .length = LPC32XX_AHB1_SIZE, 188 .length = LPC32XX_AHB1_SIZE,
189 .type = MT_DEVICE 189 .type = MT_DEVICE
190 }, 190 },
191 { 191 {
192 .virtual = IO_ADDRESS(LPC32XX_FABAPB_START), 192 .virtual = (unsigned long)IO_ADDRESS(LPC32XX_FABAPB_START),
193 .pfn = __phys_to_pfn(LPC32XX_FABAPB_START), 193 .pfn = __phys_to_pfn(LPC32XX_FABAPB_START),
194 .length = LPC32XX_FABAPB_SIZE, 194 .length = LPC32XX_FABAPB_SIZE,
195 .type = MT_DEVICE 195 .type = MT_DEVICE
196 }, 196 },
197 { 197 {
198 .virtual = IO_ADDRESS(LPC32XX_IRAM_BASE), 198 .virtual = (unsigned long)IO_ADDRESS(LPC32XX_IRAM_BASE),
199 .pfn = __phys_to_pfn(LPC32XX_IRAM_BASE), 199 .pfn = __phys_to_pfn(LPC32XX_IRAM_BASE),
200 .length = (LPC32XX_IRAM_BANK_SIZE * 2), 200 .length = (LPC32XX_IRAM_BANK_SIZE * 2),
201 .type = MT_DEVICE 201 .type = MT_DEVICE
diff --git a/arch/arm/mach-lpc32xx/include/mach/hardware.h b/arch/arm/mach-lpc32xx/include/mach/hardware.h
index 33e1dde37bd9..69065de97a3d 100644
--- a/arch/arm/mach-lpc32xx/include/mach/hardware.h
+++ b/arch/arm/mach-lpc32xx/include/mach/hardware.h
@@ -25,7 +25,7 @@
25/* 25/*
26 * This macro relies on fact that for all HW i/o addresses bits 20-23 are 0 26 * This macro relies on fact that for all HW i/o addresses bits 20-23 are 0
27 */ 27 */
28#define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\ 28#define IO_ADDRESS(x) IOMEM(((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\
29 IO_BASE) 29 IO_BASE)
30 30
31#define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x)) 31#define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x))
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index 657be73297db..f4e475c49302 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -52,13 +52,14 @@ static int msm_smd_debug_mask;
52 52
53struct shared_info { 53struct shared_info {
54 int ready; 54 int ready;
55 unsigned state; 55 void __iomem *state;
56}; 56};
57 57
58static unsigned dummy_state[SMSM_STATE_COUNT]; 58static unsigned dummy_state[SMSM_STATE_COUNT];
59 59
60static struct shared_info smd_info = { 60static struct shared_info smd_info = {
61 .state = (unsigned) &dummy_state, 61 /* FIXME: not a real __iomem pointer */
62 .state = &dummy_state,
62}; 63};
63 64
64module_param_named(debug_mask, msm_smd_debug_mask, 65module_param_named(debug_mask, msm_smd_debug_mask,
@@ -796,22 +797,22 @@ void *smem_alloc(unsigned id, unsigned size)
796 return smem_find(id, size); 797 return smem_find(id, size);
797} 798}
798 799
799void *smem_item(unsigned id, unsigned *size) 800void __iomem *smem_item(unsigned id, unsigned *size)
800{ 801{
801 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; 802 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
802 struct smem_heap_entry *toc = shared->heap_toc; 803 struct smem_heap_entry *toc = shared->heap_toc;
803 804
804 if (id >= SMEM_NUM_ITEMS) 805 if (id >= SMEM_NUM_ITEMS)
805 return 0; 806 return NULL;
806 807
807 if (toc[id].allocated) { 808 if (toc[id].allocated) {
808 *size = toc[id].size; 809 *size = toc[id].size;
809 return (void *) (MSM_SHARED_RAM_BASE + toc[id].offset); 810 return (MSM_SHARED_RAM_BASE + toc[id].offset);
810 } else { 811 } else {
811 *size = 0; 812 *size = 0;
812 } 813 }
813 814
814 return 0; 815 return NULL;
815} 816}
816 817
817void *smem_find(unsigned id, unsigned size_in) 818void *smem_find(unsigned id, unsigned size_in)
@@ -857,7 +858,7 @@ static irqreturn_t smsm_irq_handler(int irq, void *data)
857int smsm_change_state(enum smsm_state_item item, 858int smsm_change_state(enum smsm_state_item item,
858 uint32_t clear_mask, uint32_t set_mask) 859 uint32_t clear_mask, uint32_t set_mask)
859{ 860{
860 unsigned long addr = smd_info.state + item * 4; 861 void __iomem *addr = smd_info.state + item * 4;
861 unsigned long flags; 862 unsigned long flags;
862 unsigned state; 863 unsigned state;
863 864
@@ -943,10 +944,10 @@ int smd_core_init(void)
943 /* wait for essential items to be initialized */ 944 /* wait for essential items to be initialized */
944 for (;;) { 945 for (;;) {
945 unsigned size; 946 unsigned size;
946 void *state; 947 void __iomem *state;
947 state = smem_item(SMEM_SMSM_SHARED_STATE, &size); 948 state = smem_item(SMEM_SMSM_SHARED_STATE, &size);
948 if (size == SMSM_V1_SIZE || size == SMSM_V2_SIZE) { 949 if (size == SMSM_V1_SIZE || size == SMSM_V2_SIZE) {
949 smd_info.state = (unsigned)state; 950 smd_info.state = state;
950 break; 951 break;
951 } 952 }
952 } 953 }
diff --git a/arch/arm/mach-nomadik/include/mach/hardware.h b/arch/arm/mach-nomadik/include/mach/hardware.h
index 6316dba3bfc8..02035e459f50 100644
--- a/arch/arm/mach-nomadik/include/mach/hardware.h
+++ b/arch/arm/mach-nomadik/include/mach/hardware.h
@@ -30,7 +30,7 @@
30 - NOMADIK_IO_VIRTUAL + NOMADIK_IO_PHYSICAL) 30 - NOMADIK_IO_VIRTUAL + NOMADIK_IO_PHYSICAL)
31 31
32/* used in asm code, so no casts */ 32/* used in asm code, so no casts */
33#define IO_ADDRESS(x) ((x) - NOMADIK_IO_PHYSICAL + NOMADIK_IO_VIRTUAL) 33#define IO_ADDRESS(x) IOMEM((x) - NOMADIK_IO_PHYSICAL + NOMADIK_IO_VIRTUAL)
34 34
35/* 35/*
36 * Base address defination for Nomadik Onchip Logic Block 36 * Base address defination for Nomadik Onchip Logic Block
diff --git a/arch/arm/mach-nomadik/include/mach/uncompress.h b/arch/arm/mach-nomadik/include/mach/uncompress.h
index 071003bc8456..7d4687e9cbdf 100644
--- a/arch/arm/mach-nomadik/include/mach/uncompress.h
+++ b/arch/arm/mach-nomadik/include/mach/uncompress.h
@@ -27,10 +27,10 @@
27struct amba_device; 27struct amba_device;
28#include <linux/amba/serial.h> 28#include <linux/amba/serial.h>
29 29
30#define NOMADIK_UART_DR 0x101FB000 30#define NOMADIK_UART_DR (void __iomem *)0x101FB000
31#define NOMADIK_UART_LCRH 0x101FB02c 31#define NOMADIK_UART_LCRH (void __iomem *)0x101FB02c
32#define NOMADIK_UART_CR 0x101FB030 32#define NOMADIK_UART_CR (void __iomem *)0x101FB030
33#define NOMADIK_UART_FR 0x101FB018 33#define NOMADIK_UART_FR (void __iomem *)0x101FB018
34 34
35static void putc(const char c) 35static void putc(const char c)
36{ 36{
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index b4203277f3cd..b0727dcd1ef9 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -36,7 +36,7 @@
36 * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE 36 * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE
37 */ 37 */
38#define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000 38#define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000
39#define TS78XX_FPGA_REGS_VIRT_BASE 0xff900000 39#define TS78XX_FPGA_REGS_VIRT_BASE IOMEM(0xff900000)
40#define TS78XX_FPGA_REGS_SIZE SZ_1M 40#define TS78XX_FPGA_REGS_SIZE SZ_1M
41 41
42static struct ts78xx_fpga_data ts78xx_fpga = { 42static struct ts78xx_fpga_data ts78xx_fpga = {
@@ -50,7 +50,7 @@ static struct ts78xx_fpga_data ts78xx_fpga = {
50 ****************************************************************************/ 50 ****************************************************************************/
51static struct map_desc ts78xx_io_desc[] __initdata = { 51static struct map_desc ts78xx_io_desc[] __initdata = {
52 { 52 {
53 .virtual = TS78XX_FPGA_REGS_VIRT_BASE, 53 .virtual = (unsigned long)TS78XX_FPGA_REGS_VIRT_BASE,
54 .pfn = __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE), 54 .pfn = __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE),
55 .length = TS78XX_FPGA_REGS_SIZE, 55 .length = TS78XX_FPGA_REGS_SIZE,
56 .type = MT_DEVICE, 56 .type = MT_DEVICE,
@@ -80,8 +80,8 @@ static struct mv_sata_platform_data ts78xx_sata_data = {
80/***************************************************************************** 80/*****************************************************************************
81 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c 81 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c
82 ****************************************************************************/ 82 ****************************************************************************/
83#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808) 83#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x808)
84#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c) 84#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE + 0x80c)
85 85
86static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr) 86static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr)
87{ 87{
@@ -162,8 +162,8 @@ static void ts78xx_ts_rtc_unload(void)
162/***************************************************************************** 162/*****************************************************************************
163 * NAND Flash 163 * NAND Flash
164 ****************************************************************************/ 164 ****************************************************************************/
165#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x800) /* VIRT */ 165#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x800) /* VIRT */
166#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x804) /* PHYS */ 166#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE + 0x804) /* PHYS */
167 167
168/* 168/*
169 * hardware specific access to control-lines 169 * hardware specific access to control-lines
diff --git a/arch/arm/mach-prima2/include/mach/uncompress.h b/arch/arm/mach-prima2/include/mach/uncompress.h
index 83125c6a30b3..0c898fcf909c 100644
--- a/arch/arm/mach-prima2/include/mach/uncompress.h
+++ b/arch/arm/mach-prima2/include/mach/uncompress.h
@@ -25,11 +25,11 @@ static __inline__ void putc(char c)
25 * during kernel decompression, all mappings are flat: 25 * during kernel decompression, all mappings are flat:
26 * virt_addr == phys_addr 26 * virt_addr == phys_addr
27 */ 27 */
28 while (__raw_readl(SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_STATUS) 28 while (__raw_readl((void __iomem *)SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_STATUS)
29 & SIRFSOC_UART1_TXFIFO_FULL) 29 & SIRFSOC_UART1_TXFIFO_FULL)
30 barrier(); 30 barrier();
31 31
32 __raw_writel(c, SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_DATA); 32 __raw_writel(c, (void __iomem *)SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_DATA);
33} 33}
34 34
35static inline void flush(void) 35static inline void flush(void)
diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h
index cdea671e8931..ac2ea767215d 100644
--- a/arch/arm/mach-sa1100/include/mach/simpad.h
+++ b/arch/arm/mach-sa1100/include/mach/simpad.h
@@ -87,7 +87,7 @@
87#define SIMPAD_CS3_PCMCIA_SHORT (SIMPAD_CS3_GPIO_BASE + 22) 87#define SIMPAD_CS3_PCMCIA_SHORT (SIMPAD_CS3_GPIO_BASE + 22)
88#define SIMPAD_CS3_GPIO_23 (SIMPAD_CS3_GPIO_BASE + 23) 88#define SIMPAD_CS3_GPIO_23 (SIMPAD_CS3_GPIO_BASE + 23)
89 89
90#define CS3_BASE 0xf1000000 90#define CS3_BASE IOMEM(0xf1000000)
91 91
92long simpad_get_cs3_ro(void); 92long simpad_get_cs3_ro(void);
93long simpad_get_cs3_shadow(void); 93long simpad_get_cs3_shadow(void);
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index fbd53593be54..6ca92d0d32b2 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -124,7 +124,7 @@ static struct map_desc simpad_io_desc[] __initdata = {
124 .length = 0x00800000, 124 .length = 0x00800000,
125 .type = MT_DEVICE 125 .type = MT_DEVICE
126 }, { /* Simpad CS3 */ 126 }, { /* Simpad CS3 */
127 .virtual = CS3_BASE, 127 .virtual = (unsigned long)CS3_BASE,
128 .pfn = __phys_to_pfn(SA1100_CS3_PHYS), 128 .pfn = __phys_to_pfn(SA1100_CS3_PHYS),
129 .length = 0x00100000, 129 .length = 0x00100000,
130 .type = MT_DEVICE 130 .type = MT_DEVICE
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index f172ca85905c..1089ee5472eb 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -432,7 +432,7 @@ static void usb1_host_port_power(int port, int power)
432 return; 432 return;
433 433
434 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */ 434 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
435 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008); 435 __raw_writew(__raw_readw(IOMEM(0xE68B0008)) | 0x600, IOMEM(0xE68B0008));
436} 436}
437 437
438static struct r8a66597_platdata usb1_host_data = { 438static struct r8a66597_platdata usb1_host_data = {
@@ -1224,9 +1224,9 @@ static struct i2c_board_info i2c1_devices[] = {
1224}; 1224};
1225 1225
1226 1226
1227#define GPIO_PORT9CR 0xE6051009 1227#define GPIO_PORT9CR IOMEM(0xE6051009)
1228#define GPIO_PORT10CR 0xE605100A 1228#define GPIO_PORT10CR IOMEM(0xE605100A)
1229#define USCCR1 0xE6058144 1229#define USCCR1 IOMEM(0xE6058144)
1230static void __init ap4evb_init(void) 1230static void __init ap4evb_init(void)
1231{ 1231{
1232 u32 srcr4; 1232 u32 srcr4;
@@ -1304,7 +1304,7 @@ static void __init ap4evb_init(void)
1304 gpio_request(GPIO_FN_OVCN2_1, NULL); 1304 gpio_request(GPIO_FN_OVCN2_1, NULL);
1305 1305
1306 /* setup USB phy */ 1306 /* setup USB phy */
1307 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */ 1307 __raw_writew(0x8a0a, IOMEM(0xE6058130)); /* USBCR4 */
1308 1308
1309 /* enable FSI2 port A (ak4643) */ 1309 /* enable FSI2 port A (ak4643) */
1310 gpio_request(GPIO_FN_FSIAIBT, NULL); 1310 gpio_request(GPIO_FN_FSIAIBT, NULL);
@@ -1453,7 +1453,7 @@ static void __init ap4evb_init(void)
1453 gpio_request(GPIO_FN_HDMI_CEC, NULL); 1453 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1454 1454
1455 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */ 1455 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1456#define SRCR4 0xe61580bc 1456#define SRCR4 IOMEM(0xe61580bc)
1457 srcr4 = __raw_readl(SRCR4); 1457 srcr4 = __raw_readl(SRCR4);
1458 __raw_writel(srcr4 | (1 << 13), SRCR4); 1458 __raw_writel(srcr4 | (1 << 13), SRCR4);
1459 udelay(50); 1459 udelay(50);
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 453a6e50db8b..45b33e02dff5 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -135,7 +135,7 @@
135 * usbhsf_power_ctrl() 135 * usbhsf_power_ctrl()
136 */ 136 */
137#define IRQ7 evt2irq(0x02e0) 137#define IRQ7 evt2irq(0x02e0)
138#define USBCR1 0xe605810a 138#define USBCR1 IOMEM(0xe605810a)
139#define USBH 0xC6700000 139#define USBH 0xC6700000
140#define USBH_USBCTR 0x10834 140#define USBH_USBCTR 0x10834
141 141
@@ -950,8 +950,8 @@ clock_error:
950/* 950/*
951 * board init 951 * board init
952 */ 952 */
953#define GPIO_PORT7CR 0xe6050007 953#define GPIO_PORT7CR IOMEM(0xe6050007)
954#define GPIO_PORT8CR 0xe6050008 954#define GPIO_PORT8CR IOMEM(0xe6050008)
955static void __init eva_init(void) 955static void __init eva_init(void)
956{ 956{
957 struct platform_device *usb = NULL; 957 struct platform_device *usb = NULL;
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 4129008eae29..cb8c994e1430 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -108,12 +108,12 @@ static struct regulator_consumer_supply dummy_supplies[] = {
108#define FPGA_ETH_IRQ (FPGA_IRQ0 + 15) 108#define FPGA_ETH_IRQ (FPGA_IRQ0 + 15)
109static u16 bonito_fpga_read(u32 offset) 109static u16 bonito_fpga_read(u32 offset)
110{ 110{
111 return __raw_readw(0xf0003000 + offset); 111 return __raw_readw(IOMEM(0xf0003000) + offset);
112} 112}
113 113
114static void bonito_fpga_write(u32 offset, u16 val) 114static void bonito_fpga_write(u32 offset, u16 val)
115{ 115{
116 __raw_writew(val, 0xf0003000 + offset); 116 __raw_writew(val, IOMEM(0xf0003000) + offset);
117} 117}
118 118
119static void bonito_fpga_irq_disable(struct irq_data *data) 119static void bonito_fpga_irq_disable(struct irq_data *data)
@@ -361,8 +361,8 @@ static void __init bonito_map_io(void)
361#define BIT_ON(sw, bit) (sw & (1 << bit)) 361#define BIT_ON(sw, bit) (sw & (1 << bit))
362#define BIT_OFF(sw, bit) (!(sw & (1 << bit))) 362#define BIT_OFF(sw, bit) (!(sw & (1 << bit)))
363 363
364#define VCCQ1CR 0xE6058140 364#define VCCQ1CR IOMEM(0xE6058140)
365#define VCCQ1LCDCR 0xE6058186 365#define VCCQ1LCDCR IOMEM(0xE6058186)
366 366
367static void __init bonito_init(void) 367static void __init bonito_init(void)
368{ 368{
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 796fa00ad3c4..b179d4c213bb 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -106,7 +106,7 @@ static void usb_host_port_power(int port, int power)
106 return; 106 return;
107 107
108 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ 108 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
109 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008); 109 __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008));
110} 110}
111 111
112static struct r8a66597_platdata usb_host_data = { 112static struct r8a66597_platdata usb_host_data = {
@@ -279,10 +279,10 @@ static void __init g3evm_init(void)
279 gpio_request(GPIO_FN_IDIN, NULL); 279 gpio_request(GPIO_FN_IDIN, NULL);
280 280
281 /* setup USB phy */ 281 /* setup USB phy */
282 __raw_writew(0x0300, 0xe605810a); /* USBCR1 */ 282 __raw_writew(0x0300, IOMEM(0xe605810a)); /* USBCR1 */
283 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ 283 __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */
284 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ 284 __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */
285 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ 285 __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */
286 286
287 /* KEYSC @ CN7 */ 287 /* KEYSC @ CN7 */
288 gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL); 288 gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
@@ -320,7 +320,7 @@ static void __init g3evm_init(void)
320 gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL); 320 gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
321 gpio_request(GPIO_FN_FRB, NULL); 321 gpio_request(GPIO_FN_FRB, NULL);
322 /* FOE, FCDE, FSC on dedicated pins */ 322 /* FOE, FCDE, FSC on dedicated pins */
323 __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048); 323 __raw_writel(__raw_readl(IOMEM(0xe6158048)) & ~(1 << 15), IOMEM(0xe6158048));
324 324
325 /* IrDA */ 325 /* IrDA */
326 gpio_request(GPIO_FN_IRDA_OUT, NULL); 326 gpio_request(GPIO_FN_IRDA_OUT, NULL);
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index fa5dfc5c8ed6..22d689322533 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -126,7 +126,7 @@ static void usb_host_port_power(int port, int power)
126 return; 126 return;
127 127
128 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ 128 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
129 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008); 129 __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008));
130} 130}
131 131
132static struct r8a66597_platdata usb_host_data = { 132static struct r8a66597_platdata usb_host_data = {
@@ -270,17 +270,17 @@ static struct platform_device *g4evm_devices[] __initdata = {
270 &sdhi1_device, 270 &sdhi1_device,
271}; 271};
272 272
273#define GPIO_SDHID0_D0 0xe60520fc 273#define GPIO_SDHID0_D0 IOMEM(0xe60520fc)
274#define GPIO_SDHID0_D1 0xe60520fd 274#define GPIO_SDHID0_D1 IOMEM(0xe60520fd)
275#define GPIO_SDHID0_D2 0xe60520fe 275#define GPIO_SDHID0_D2 IOMEM(0xe60520fe)
276#define GPIO_SDHID0_D3 0xe60520ff 276#define GPIO_SDHID0_D3 IOMEM(0xe60520ff)
277#define GPIO_SDHICMD0 0xe6052100 277#define GPIO_SDHICMD0 IOMEM(0xe6052100)
278 278
279#define GPIO_SDHID1_D0 0xe6052103 279#define GPIO_SDHID1_D0 IOMEM(0xe6052103)
280#define GPIO_SDHID1_D1 0xe6052104 280#define GPIO_SDHID1_D1 IOMEM(0xe6052104)
281#define GPIO_SDHID1_D2 0xe6052105 281#define GPIO_SDHID1_D2 IOMEM(0xe6052105)
282#define GPIO_SDHID1_D3 0xe6052106 282#define GPIO_SDHID1_D3 IOMEM(0xe6052106)
283#define GPIO_SDHICMD1 0xe6052107 283#define GPIO_SDHICMD1 IOMEM(0xe6052107)
284 284
285static void __init g4evm_init(void) 285static void __init g4evm_init(void)
286{ 286{
@@ -318,10 +318,10 @@ static void __init g4evm_init(void)
318 gpio_request(GPIO_FN_IDIN, NULL); 318 gpio_request(GPIO_FN_IDIN, NULL);
319 319
320 /* setup USB phy */ 320 /* setup USB phy */
321 __raw_writew(0x0200, 0xe605810a); /* USBCR1 */ 321 __raw_writew(0x0200, IOMEM(0xe605810a)); /* USBCR1 */
322 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ 322 __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */
323 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ 323 __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */
324 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ 324 __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */
325 325
326 /* KEYSC @ CN31 */ 326 /* KEYSC @ CN31 */
327 gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL); 327 gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL);
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 53b7ea92c32c..5ffafc1adf99 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -133,8 +133,8 @@ static struct platform_device usb_host_device = {
133 133
134/* USB Func CN17 */ 134/* USB Func CN17 */
135struct usbhs_private { 135struct usbhs_private {
136 unsigned int phy; 136 void __iomem *phy;
137 unsigned int cr2; 137 void __iomem *cr2;
138 struct renesas_usbhs_platform_info info; 138 struct renesas_usbhs_platform_info info;
139}; 139};
140 140
@@ -232,8 +232,8 @@ static u32 usbhs_pipe_cfg[] = {
232}; 232};
233 233
234static struct usbhs_private usbhs_private = { 234static struct usbhs_private usbhs_private = {
235 .phy = 0xe60781e0, /* USBPHYINT */ 235 .phy = IOMEM(0xe60781e0), /* USBPHYINT */
236 .cr2 = 0xe605810c, /* USBCR2 */ 236 .cr2 = IOMEM(0xe605810c), /* USBCR2 */
237 .info = { 237 .info = {
238 .platform_callback = { 238 .platform_callback = {
239 .hardware_init = usbhs_hardware_init, 239 .hardware_init = usbhs_hardware_init,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index c129542f6aed..0dce90ee6cf2 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -583,8 +583,8 @@ out:
583#define USBHS0_POLL_INTERVAL (HZ * 5) 583#define USBHS0_POLL_INTERVAL (HZ * 5)
584 584
585struct usbhs_private { 585struct usbhs_private {
586 unsigned int usbphyaddr; 586 void __iomem *usbphyaddr;
587 unsigned int usbcrcaddr; 587 void __iomem *usbcrcaddr;
588 struct renesas_usbhs_platform_info info; 588 struct renesas_usbhs_platform_info info;
589 struct delayed_work work; 589 struct delayed_work work;
590 struct platform_device *pdev; 590 struct platform_device *pdev;
@@ -642,7 +642,7 @@ static void usbhs0_hardware_exit(struct platform_device *pdev)
642} 642}
643 643
644static struct usbhs_private usbhs0_private = { 644static struct usbhs_private usbhs0_private = {
645 .usbcrcaddr = 0xe605810c, /* USBCR2 */ 645 .usbcrcaddr = IOMEM(0xe605810c), /* USBCR2 */
646 .info = { 646 .info = {
647 .platform_callback = { 647 .platform_callback = {
648 .hardware_init = usbhs0_hardware_init, 648 .hardware_init = usbhs0_hardware_init,
@@ -776,8 +776,8 @@ static u32 usbhs1_pipe_cfg[] = {
776}; 776};
777 777
778static struct usbhs_private usbhs1_private = { 778static struct usbhs_private usbhs1_private = {
779 .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */ 779 .usbphyaddr = IOMEM(0xe60581e2), /* USBPHY1INTAP */
780 .usbcrcaddr = 0xe6058130, /* USBCR4 */ 780 .usbcrcaddr = IOMEM(0xe6058130), /* USBCR4 */
781 .info = { 781 .info = {
782 .platform_callback = { 782 .platform_callback = {
783 .hardware_init = usbhs1_hardware_init, 783 .hardware_init = usbhs1_hardware_init,
@@ -1402,12 +1402,12 @@ static struct i2c_board_info i2c1_devices[] = {
1402 }, 1402 },
1403}; 1403};
1404 1404
1405#define GPIO_PORT9CR 0xE6051009 1405#define GPIO_PORT9CR IOMEM(0xE6051009)
1406#define GPIO_PORT10CR 0xE605100A 1406#define GPIO_PORT10CR IOMEM(0xE605100A)
1407#define GPIO_PORT167CR 0xE60520A7 1407#define GPIO_PORT167CR IOMEM(0xE60520A7)
1408#define GPIO_PORT168CR 0xE60520A8 1408#define GPIO_PORT168CR IOMEM(0xE60520A8)
1409#define SRCR4 0xe61580bc 1409#define SRCR4 IOMEM(0xe61580bc)
1410#define USCCR1 0xE6058144 1410#define USCCR1 IOMEM(0xE6058144)
1411static void __init mackerel_init(void) 1411static void __init mackerel_init(void)
1412{ 1412{
1413 u32 srcr4; 1413 u32 srcr4;
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index ad5fccc7b5e7..6729e0032180 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -41,29 +41,29 @@
41 */ 41 */
42 42
43/* CPG registers */ 43/* CPG registers */
44#define FRQCRA 0xe6150000 44#define FRQCRA IOMEM(0xe6150000)
45#define FRQCRB 0xe6150004 45#define FRQCRB IOMEM(0xe6150004)
46#define VCLKCR1 0xE6150008 46#define VCLKCR1 IOMEM(0xE6150008)
47#define VCLKCR2 0xE615000c 47#define VCLKCR2 IOMEM(0xE615000c)
48#define FRQCRC 0xe61500e0 48#define FRQCRC IOMEM(0xe61500e0)
49#define FSIACKCR 0xe6150018 49#define FSIACKCR IOMEM(0xe6150018)
50#define PLLC01CR 0xe6150028 50#define PLLC01CR IOMEM(0xe6150028)
51 51
52#define SUBCKCR 0xe6150080 52#define SUBCKCR IOMEM(0xe6150080)
53#define USBCKCR 0xe615008c 53#define USBCKCR IOMEM(0xe615008c)
54 54
55#define MSTPSR0 0xe6150030 55#define MSTPSR0 IOMEM(0xe6150030)
56#define MSTPSR1 0xe6150038 56#define MSTPSR1 IOMEM(0xe6150038)
57#define MSTPSR2 0xe6150040 57#define MSTPSR2 IOMEM(0xe6150040)
58#define MSTPSR3 0xe6150048 58#define MSTPSR3 IOMEM(0xe6150048)
59#define MSTPSR4 0xe615004c 59#define MSTPSR4 IOMEM(0xe615004c)
60#define FSIBCKCR 0xe6150090 60#define FSIBCKCR IOMEM(0xe6150090)
61#define HDMICKCR 0xe6150094 61#define HDMICKCR IOMEM(0xe6150094)
62#define SMSTPCR0 0xe6150130 62#define SMSTPCR0 IOMEM(0xe6150130)
63#define SMSTPCR1 0xe6150134 63#define SMSTPCR1 IOMEM(0xe6150134)
64#define SMSTPCR2 0xe6150138 64#define SMSTPCR2 IOMEM(0xe6150138)
65#define SMSTPCR3 0xe615013c 65#define SMSTPCR3 IOMEM(0xe615013c)
66#define SMSTPCR4 0xe6150140 66#define SMSTPCR4 IOMEM(0xe6150140)
67 67
68/* Fixed 32 KHz root clock from EXTALR pin */ 68/* Fixed 32 KHz root clock from EXTALR pin */
69static struct clk extalr_clk = { 69static struct clk extalr_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 162b791b8984..ef0a95e592c4 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -24,28 +24,28 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7367 registers */ 26/* SH7367 registers */
27#define RTFRQCR 0xe6150000 27#define RTFRQCR IOMEM(0xe6150000)
28#define SYFRQCR 0xe6150004 28#define SYFRQCR IOMEM(0xe6150004)
29#define CMFRQCR 0xe61500E0 29#define CMFRQCR IOMEM(0xe61500E0)
30#define VCLKCR1 0xe6150008 30#define VCLKCR1 IOMEM(0xe6150008)
31#define VCLKCR2 0xe615000C 31#define VCLKCR2 IOMEM(0xe615000C)
32#define VCLKCR3 0xe615001C 32#define VCLKCR3 IOMEM(0xe615001C)
33#define SCLKACR 0xe6150010 33#define SCLKACR IOMEM(0xe6150010)
34#define SCLKBCR 0xe6150014 34#define SCLKBCR IOMEM(0xe6150014)
35#define SUBUSBCKCR 0xe6158080 35#define SUBUSBCKCR IOMEM(0xe6158080)
36#define SPUCKCR 0xe6150084 36#define SPUCKCR IOMEM(0xe6150084)
37#define MSUCKCR 0xe6150088 37#define MSUCKCR IOMEM(0xe6150088)
38#define MVI3CKCR 0xe6150090 38#define MVI3CKCR IOMEM(0xe6150090)
39#define VOUCKCR 0xe6150094 39#define VOUCKCR IOMEM(0xe6150094)
40#define MFCK1CR 0xe6150098 40#define MFCK1CR IOMEM(0xe6150098)
41#define MFCK2CR 0xe615009C 41#define MFCK2CR IOMEM(0xe615009C)
42#define PLLC1CR 0xe6150028 42#define PLLC1CR IOMEM(0xe6150028)
43#define PLLC2CR 0xe615002C 43#define PLLC2CR IOMEM(0xe615002C)
44#define RTMSTPCR0 0xe6158030 44#define RTMSTPCR0 IOMEM(0xe6158030)
45#define RTMSTPCR2 0xe6158038 45#define RTMSTPCR2 IOMEM(0xe6158038)
46#define SYMSTPCR0 0xe6158040 46#define SYMSTPCR0 IOMEM(0xe6158040)
47#define SYMSTPCR2 0xe6158048 47#define SYMSTPCR2 IOMEM(0xe6158048)
48#define CMMSTPCR0 0xe615804c 48#define CMMSTPCR0 IOMEM(0xe615804c)
49 49
50/* Fixed 32 KHz root clock from EXTALR pin */ 50/* Fixed 32 KHz root clock from EXTALR pin */
51static struct clk r_clk = { 51static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 5a2894b1c965..430a90ffa120 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -24,36 +24,36 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7372 registers */ 26/* SH7372 registers */
27#define FRQCRA 0xe6150000 27#define FRQCRA IOMEM(0xe6150000)
28#define FRQCRB 0xe6150004 28#define FRQCRB IOMEM(0xe6150004)
29#define FRQCRC 0xe61500e0 29#define FRQCRC IOMEM(0xe61500e0)
30#define FRQCRD 0xe61500e4 30#define FRQCRD IOMEM(0xe61500e4)
31#define VCLKCR1 0xe6150008 31#define VCLKCR1 IOMEM(0xe6150008)
32#define VCLKCR2 0xe615000c 32#define VCLKCR2 IOMEM(0xe615000c)
33#define VCLKCR3 0xe615001c 33#define VCLKCR3 IOMEM(0xe615001c)
34#define FMSICKCR 0xe6150010 34#define FMSICKCR IOMEM(0xe6150010)
35#define FMSOCKCR 0xe6150014 35#define FMSOCKCR IOMEM(0xe6150014)
36#define FSIACKCR 0xe6150018 36#define FSIACKCR IOMEM(0xe6150018)
37#define FSIBCKCR 0xe6150090 37#define FSIBCKCR IOMEM(0xe6150090)
38#define SUBCKCR 0xe6150080 38#define SUBCKCR IOMEM(0xe6150080)
39#define SPUCKCR 0xe6150084 39#define SPUCKCR IOMEM(0xe6150084)
40#define VOUCKCR 0xe6150088 40#define VOUCKCR IOMEM(0xe6150088)
41#define HDMICKCR 0xe6150094 41#define HDMICKCR IOMEM(0xe6150094)
42#define DSITCKCR 0xe6150060 42#define DSITCKCR IOMEM(0xe6150060)
43#define DSI0PCKCR 0xe6150064 43#define DSI0PCKCR IOMEM(0xe6150064)
44#define DSI1PCKCR 0xe6150098 44#define DSI1PCKCR IOMEM(0xe6150098)
45#define PLLC01CR 0xe6150028 45#define PLLC01CR IOMEM(0xe6150028)
46#define PLLC2CR 0xe615002c 46#define PLLC2CR IOMEM(0xe615002c)
47#define RMSTPCR0 0xe6150110 47#define RMSTPCR0 IOMEM(0xe6150110)
48#define RMSTPCR1 0xe6150114 48#define RMSTPCR1 IOMEM(0xe6150114)
49#define RMSTPCR2 0xe6150118 49#define RMSTPCR2 IOMEM(0xe6150118)
50#define RMSTPCR3 0xe615011c 50#define RMSTPCR3 IOMEM(0xe615011c)
51#define RMSTPCR4 0xe6150120 51#define RMSTPCR4 IOMEM(0xe6150120)
52#define SMSTPCR0 0xe6150130 52#define SMSTPCR0 IOMEM(0xe6150130)
53#define SMSTPCR1 0xe6150134 53#define SMSTPCR1 IOMEM(0xe6150134)
54#define SMSTPCR2 0xe6150138 54#define SMSTPCR2 IOMEM(0xe6150138)
55#define SMSTPCR3 0xe615013c 55#define SMSTPCR3 IOMEM(0xe615013c)
56#define SMSTPCR4 0xe6150140 56#define SMSTPCR4 IOMEM(0xe6150140)
57 57
58#define FSIDIVA 0xFE1F8000 58#define FSIDIVA 0xFE1F8000
59#define FSIDIVB 0xFE1F8008 59#define FSIDIVB 0xFE1F8008
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 85f2a3ec2c44..b8480d19e1c8 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -24,31 +24,31 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7377 registers */ 26/* SH7377 registers */
27#define RTFRQCR 0xe6150000 27#define RTFRQCR IOMEM(0xe6150000)
28#define SYFRQCR 0xe6150004 28#define SYFRQCR IOMEM(0xe6150004)
29#define CMFRQCR 0xe61500E0 29#define CMFRQCR IOMEM(0xe61500E0)
30#define VCLKCR1 0xe6150008 30#define VCLKCR1 IOMEM(0xe6150008)
31#define VCLKCR2 0xe615000C 31#define VCLKCR2 IOMEM(0xe615000C)
32#define VCLKCR3 0xe615001C 32#define VCLKCR3 IOMEM(0xe615001C)
33#define FMSICKCR 0xe6150010 33#define FMSICKCR IOMEM(0xe6150010)
34#define FMSOCKCR 0xe6150014 34#define FMSOCKCR IOMEM(0xe6150014)
35#define FSICKCR 0xe6150018 35#define FSICKCR IOMEM(0xe6150018)
36#define PLLC1CR 0xe6150028 36#define PLLC1CR IOMEM(0xe6150028)
37#define PLLC2CR 0xe615002C 37#define PLLC2CR IOMEM(0xe615002C)
38#define SUBUSBCKCR 0xe6150080 38#define SUBUSBCKCR IOMEM(0xe6150080)
39#define SPUCKCR 0xe6150084 39#define SPUCKCR IOMEM(0xe6150084)
40#define MSUCKCR 0xe6150088 40#define MSUCKCR IOMEM(0xe6150088)
41#define MVI3CKCR 0xe6150090 41#define MVI3CKCR IOMEM(0xe6150090)
42#define HDMICKCR 0xe6150094 42#define HDMICKCR IOMEM(0xe6150094)
43#define MFCK1CR 0xe6150098 43#define MFCK1CR IOMEM(0xe6150098)
44#define MFCK2CR 0xe615009C 44#define MFCK2CR IOMEM(0xe615009C)
45#define DSITCKCR 0xe6150060 45#define DSITCKCR IOMEM(0xe6150060)
46#define DSIPCKCR 0xe6150064 46#define DSIPCKCR IOMEM(0xe6150064)
47#define SMSTPCR0 0xe6150130 47#define SMSTPCR0 IOMEM(0xe6150130)
48#define SMSTPCR1 0xe6150134 48#define SMSTPCR1 IOMEM(0xe6150134)
49#define SMSTPCR2 0xe6150138 49#define SMSTPCR2 IOMEM(0xe6150138)
50#define SMSTPCR3 0xe615013C 50#define SMSTPCR3 IOMEM(0xe615013C)
51#define SMSTPCR4 0xe6150140 51#define SMSTPCR4 IOMEM(0xe6150140)
52 52
53/* Fixed 32 KHz root clock from EXTALR pin */ 53/* Fixed 32 KHz root clock from EXTALR pin */
54static struct clk r_clk = { 54static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 7f8da18a8580..516ff7f3e434 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -23,43 +23,43 @@
23#include <linux/clkdev.h> 23#include <linux/clkdev.h>
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26#define FRQCRA 0xe6150000 26#define FRQCRA IOMEM(0xe6150000)
27#define FRQCRB 0xe6150004 27#define FRQCRB IOMEM(0xe6150004)
28#define FRQCRD 0xe61500e4 28#define FRQCRD IOMEM(0xe61500e4)
29#define VCLKCR1 0xe6150008 29#define VCLKCR1 IOMEM(0xe6150008)
30#define VCLKCR2 0xe615000C 30#define VCLKCR2 IOMEM(0xe615000C)
31#define VCLKCR3 0xe615001C 31#define VCLKCR3 IOMEM(0xe615001C)
32#define ZBCKCR 0xe6150010 32#define ZBCKCR IOMEM(0xe6150010)
33#define FLCKCR 0xe6150014 33#define FLCKCR IOMEM(0xe6150014)
34#define SD0CKCR 0xe6150074 34#define SD0CKCR IOMEM(0xe6150074)
35#define SD1CKCR 0xe6150078 35#define SD1CKCR IOMEM(0xe6150078)
36#define SD2CKCR 0xe615007C 36#define SD2CKCR IOMEM(0xe615007C)
37#define FSIACKCR 0xe6150018 37#define FSIACKCR IOMEM(0xe6150018)
38#define FSIBCKCR 0xe6150090 38#define FSIBCKCR IOMEM(0xe6150090)
39#define SUBCKCR 0xe6150080 39#define SUBCKCR IOMEM(0xe6150080)
40#define SPUACKCR 0xe6150084 40#define SPUACKCR IOMEM(0xe6150084)
41#define SPUVCKCR 0xe6150094 41#define SPUVCKCR IOMEM(0xe6150094)
42#define MSUCKCR 0xe6150088 42#define MSUCKCR IOMEM(0xe6150088)
43#define HSICKCR 0xe615008C 43#define HSICKCR IOMEM(0xe615008C)
44#define MFCK1CR 0xe6150098 44#define MFCK1CR IOMEM(0xe6150098)
45#define MFCK2CR 0xe615009C 45#define MFCK2CR IOMEM(0xe615009C)
46#define DSITCKCR 0xe6150060 46#define DSITCKCR IOMEM(0xe6150060)
47#define DSI0PCKCR 0xe6150064 47#define DSI0PCKCR IOMEM(0xe6150064)
48#define DSI1PCKCR 0xe6150068 48#define DSI1PCKCR IOMEM(0xe6150068)
49#define DSI0PHYCR 0xe615006C 49#define DSI0PHYCR 0xe615006C
50#define DSI1PHYCR 0xe6150070 50#define DSI1PHYCR 0xe6150070
51#define PLLECR 0xe61500d0 51#define PLLECR IOMEM(0xe61500d0)
52#define PLL0CR 0xe61500d8 52#define PLL0CR IOMEM(0xe61500d8)
53#define PLL1CR 0xe6150028 53#define PLL1CR IOMEM(0xe6150028)
54#define PLL2CR 0xe615002c 54#define PLL2CR IOMEM(0xe615002c)
55#define PLL3CR 0xe61500dc 55#define PLL3CR IOMEM(0xe61500dc)
56#define SMSTPCR0 0xe6150130 56#define SMSTPCR0 IOMEM(0xe6150130)
57#define SMSTPCR1 0xe6150134 57#define SMSTPCR1 IOMEM(0xe6150134)
58#define SMSTPCR2 0xe6150138 58#define SMSTPCR2 IOMEM(0xe6150138)
59#define SMSTPCR3 0xe615013c 59#define SMSTPCR3 IOMEM(0xe615013c)
60#define SMSTPCR4 0xe6150140 60#define SMSTPCR4 IOMEM(0xe6150140)
61#define SMSTPCR5 0xe6150144 61#define SMSTPCR5 IOMEM(0xe6150144)
62#define CKSCR 0xe61500c0 62#define CKSCR IOMEM(0xe61500c0)
63 63
64/* Fixed 32 KHz root clock from EXTALR pin */ 64/* Fixed 32 KHz root clock from EXTALR pin */
65static struct clk r_clk = { 65static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 844507d937cb..90a92b2c1c52 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -35,12 +35,12 @@ static inline int irq_to_gpio(unsigned int irq)
35 * the method to control only pull up/down/free. 35 * the method to control only pull up/down/free.
36 * this function should be replaced by correct gpio function 36 * this function should be replaced by correct gpio function
37 */ 37 */
38static inline void __init gpio_direction_none(u32 addr) 38static inline void __init gpio_direction_none(void __iomem * addr)
39{ 39{
40 __raw_writeb(0x00, addr); 40 __raw_writeb(0x00, addr);
41} 41}
42 42
43static inline void __init gpio_request_pullup(u32 addr) 43static inline void __init gpio_request_pullup(void __iomem * addr)
44{ 44{
45 u8 data = __raw_readb(addr); 45 u8 data = __raw_readb(addr);
46 46
@@ -49,7 +49,7 @@ static inline void __init gpio_request_pullup(u32 addr)
49 __raw_writeb(data, addr); 49 __raw_writeb(data, addr);
50} 50}
51 51
52static inline void __init gpio_request_pulldown(u32 addr) 52static inline void __init gpio_request_pulldown(void __iomem * addr)
53{ 53{
54 u8 data = __raw_readb(addr); 54 u8 data = __raw_readb(addr);
55 55
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index f04fad4ec4fb..ef66f1a8aa2e 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -29,14 +29,14 @@
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31 31
32#define INT2SMSKCR0 0xfe7822a0 32#define INT2SMSKCR0 IOMEM(0xfe7822a0)
33#define INT2SMSKCR1 0xfe7822a4 33#define INT2SMSKCR1 IOMEM(0xfe7822a4)
34#define INT2SMSKCR2 0xfe7822a8 34#define INT2SMSKCR2 IOMEM(0xfe7822a8)
35#define INT2SMSKCR3 0xfe7822ac 35#define INT2SMSKCR3 IOMEM(0xfe7822ac)
36#define INT2SMSKCR4 0xfe7822b0 36#define INT2SMSKCR4 IOMEM(0xfe7822b0)
37 37
38#define INT2NTSR0 0xfe700060 38#define INT2NTSR0 IOMEM(0xfe700060)
39#define INT2NTSR1 0xfe700064 39#define INT2NTSR1 IOMEM(0xfe700064)
40 40
41static int r8a7779_set_wake(struct irq_data *data, unsigned int on) 41static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
42{ 42{
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 2587a22842f2..a91caad7db7c 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -624,6 +624,9 @@ void sh7372_intcs_resume(void)
624 __raw_writeb(ffd5[k], intcs_ffd5 + k); 624 __raw_writeb(ffd5[k], intcs_ffd5 + k);
625} 625}
626 626
627#define E694_BASE IOMEM(0xe6940000)
628#define E695_BASE IOMEM(0xe6950000)
629
627static unsigned short e694[0x200]; 630static unsigned short e694[0x200];
628static unsigned short e695[0x200]; 631static unsigned short e695[0x200];
629 632
@@ -632,22 +635,22 @@ void sh7372_intca_suspend(void)
632 int k; 635 int k;
633 636
634 for (k = 0x00; k <= 0x38; k += 4) 637 for (k = 0x00; k <= 0x38; k += 4)
635 e694[k] = __raw_readw(0xe6940000 + k); 638 e694[k] = __raw_readw(E694_BASE + k);
636 639
637 for (k = 0x80; k <= 0xb4; k += 4) 640 for (k = 0x80; k <= 0xb4; k += 4)
638 e694[k] = __raw_readb(0xe6940000 + k); 641 e694[k] = __raw_readb(E694_BASE + k);
639 642
640 for (k = 0x180; k <= 0x1b4; k += 4) 643 for (k = 0x180; k <= 0x1b4; k += 4)
641 e694[k] = __raw_readb(0xe6940000 + k); 644 e694[k] = __raw_readb(E694_BASE + k);
642 645
643 for (k = 0x00; k <= 0x50; k += 4) 646 for (k = 0x00; k <= 0x50; k += 4)
644 e695[k] = __raw_readw(0xe6950000 + k); 647 e695[k] = __raw_readw(E695_BASE + k);
645 648
646 for (k = 0x80; k <= 0xa8; k += 4) 649 for (k = 0x80; k <= 0xa8; k += 4)
647 e695[k] = __raw_readb(0xe6950000 + k); 650 e695[k] = __raw_readb(E695_BASE + k);
648 651
649 for (k = 0x180; k <= 0x1a8; k += 4) 652 for (k = 0x180; k <= 0x1a8; k += 4)
650 e695[k] = __raw_readb(0xe6950000 + k); 653 e695[k] = __raw_readb(E695_BASE + k);
651} 654}
652 655
653void sh7372_intca_resume(void) 656void sh7372_intca_resume(void)
@@ -655,20 +658,20 @@ void sh7372_intca_resume(void)
655 int k; 658 int k;
656 659
657 for (k = 0x00; k <= 0x38; k += 4) 660 for (k = 0x00; k <= 0x38; k += 4)
658 __raw_writew(e694[k], 0xe6940000 + k); 661 __raw_writew(e694[k], E694_BASE + k);
659 662
660 for (k = 0x80; k <= 0xb4; k += 4) 663 for (k = 0x80; k <= 0xb4; k += 4)
661 __raw_writeb(e694[k], 0xe6940000 + k); 664 __raw_writeb(e694[k], E694_BASE + k);
662 665
663 for (k = 0x180; k <= 0x1b4; k += 4) 666 for (k = 0x180; k <= 0x1b4; k += 4)
664 __raw_writeb(e694[k], 0xe6940000 + k); 667 __raw_writeb(e694[k], E694_BASE + k);
665 668
666 for (k = 0x00; k <= 0x50; k += 4) 669 for (k = 0x00; k <= 0x50; k += 4)
667 __raw_writew(e695[k], 0xe6950000 + k); 670 __raw_writew(e695[k], E695_BASE + k);
668 671
669 for (k = 0x80; k <= 0xa8; k += 4) 672 for (k = 0x80; k <= 0xa8; k += 4)
670 __raw_writeb(e695[k], 0xe6950000 + k); 673 __raw_writeb(e695[k], E695_BASE + k);
671 674
672 for (k = 0x180; k <= 0x1a8; k += 4) 675 for (k = 0x180; k <= 0x1a8; k += 4)
673 __raw_writeb(e695[k], 0xe6950000 + k); 676 __raw_writeb(e695[k], E695_BASE + k);
674} 677}
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 588555a67d9c..f0c5e5190601 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -366,10 +366,12 @@ static irqreturn_t sh73a0_irq_pin_demux(int irq, void *dev_id)
366 366
367static struct irqaction sh73a0_irq_pin_cascade[32]; 367static struct irqaction sh73a0_irq_pin_cascade[32];
368 368
369#define PINTER0 0xe69000a0 369#define PINTER0_PHYS 0xe69000a0
370#define PINTER1 0xe69000a4 370#define PINTER1_PHYS 0xe69000a4
371#define PINTRR0 0xe69000d0 371#define PINTER0_VIRT IOMEM(0xe69000a0)
372#define PINTRR1 0xe69000d4 372#define PINTER1_VIRT IOMEM(0xe69000a4)
373#define PINTRR0 IOMEM(0xe69000d0)
374#define PINTRR1 IOMEM(0xe69000d4)
373 375
374#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq)) 376#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq))
375#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8)) 377#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8))
@@ -377,14 +379,14 @@ static struct irqaction sh73a0_irq_pin_cascade[32];
377#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24)) 379#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24))
378#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq)) 380#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq))
379 381
380INTC_PINT(intc_pint0, PINTER0, 0xe69000b0, "sh73a0-pint0", \ 382INTC_PINT(intc_pint0, PINTER0_PHYS, 0xe69000b0, "sh73a0-pint0", \
381 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \ 383 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
382 INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \ 384 INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \
383 INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \ 385 INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \
384 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \ 386 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
385 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D)); 387 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D));
386 388
387INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1", \ 389INTC_PINT(intc_pint1, PINTER1_PHYS, 0xe69000c0, "sh73a0-pint1", \
388 INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \ 390 INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \
389 INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \ 391 INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \
390 INTC_PINT_V_NONE, INTC_PINT_V_NONE, \ 392 INTC_PINT_V_NONE, INTC_PINT_V_NONE, \
@@ -394,7 +396,7 @@ INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1", \
394static struct irqaction sh73a0_pint0_cascade; 396static struct irqaction sh73a0_pint0_cascade;
395static struct irqaction sh73a0_pint1_cascade; 397static struct irqaction sh73a0_pint1_cascade;
396 398
397static void pint_demux(unsigned long rr, unsigned long er, int base_irq) 399static void pint_demux(void __iomem *rr, void __iomem *er, int base_irq)
398{ 400{
399 unsigned long value = ioread32(rr) & ioread32(er); 401 unsigned long value = ioread32(rr) & ioread32(er);
400 int k; 402 int k;
@@ -409,13 +411,13 @@ static void pint_demux(unsigned long rr, unsigned long er, int base_irq)
409 411
410static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id) 412static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id)
411{ 413{
412 pint_demux(PINTRR0, PINTER0, SH73A0_PINT0_IRQ(0)); 414 pint_demux(PINTRR0, PINTER0_VIRT, SH73A0_PINT0_IRQ(0));
413 return IRQ_HANDLED; 415 return IRQ_HANDLED;
414} 416}
415 417
416static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id) 418static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
417{ 419{
418 pint_demux(PINTRR1, PINTER1, SH73A0_PINT1_IRQ(0)); 420 pint_demux(PINTRR1, PINTER1_VIRT, SH73A0_PINT1_IRQ(0));
419 return IRQ_HANDLED; 421 return IRQ_HANDLED;
420} 422}
421 423
diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
index a8562540f1d6..32e177275e47 100644
--- a/arch/arm/mach-shmobile/pm-rmobile.c
+++ b/arch/arm/mach-shmobile/pm-rmobile.c
@@ -20,9 +20,9 @@
20#include <mach/pm-rmobile.h> 20#include <mach/pm-rmobile.h>
21 21
22/* SYSC */ 22/* SYSC */
23#define SPDCR 0xe6180008 23#define SPDCR IOMEM(0xe6180008)
24#define SWUCR 0xe6180014 24#define SWUCR IOMEM(0xe6180014)
25#define PSTR 0xe6180080 25#define PSTR IOMEM(0xe6180080)
26 26
27#define PSTR_RETRIES 100 27#define PSTR_RETRIES 100
28#define PSTR_DELAY_US 10 28#define PSTR_DELAY_US 10
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 792037069226..162121842a2b 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -29,45 +29,46 @@
29#include <mach/pm-rmobile.h> 29#include <mach/pm-rmobile.h>
30 30
31/* DBG */ 31/* DBG */
32#define DBGREG1 0xe6100020 32#define DBGREG1 IOMEM(0xe6100020)
33#define DBGREG9 0xe6100040 33#define DBGREG9 IOMEM(0xe6100040)
34 34
35/* CPGA */ 35/* CPGA */
36#define SYSTBCR 0xe6150024 36#define SYSTBCR IOMEM(0xe6150024)
37#define MSTPSR0 0xe6150030 37#define MSTPSR0 IOMEM(0xe6150030)
38#define MSTPSR1 0xe6150038 38#define MSTPSR1 IOMEM(0xe6150038)
39#define MSTPSR2 0xe6150040 39#define MSTPSR2 IOMEM(0xe6150040)
40#define MSTPSR3 0xe6150048 40#define MSTPSR3 IOMEM(0xe6150048)
41#define MSTPSR4 0xe615004c 41#define MSTPSR4 IOMEM(0xe615004c)
42#define PLLC01STPCR 0xe61500c8 42#define PLLC01STPCR IOMEM(0xe61500c8)
43 43
44/* SYSC */ 44/* SYSC */
45#define SBAR 0xe6180020 45#define SBAR IOMEM(0xe6180020)
46#define WUPRMSK 0xe6180028 46#define WUPRMSK IOMEM(0xe6180028)
47#define WUPSMSK 0xe618002c 47#define WUPSMSK IOMEM(0xe618002c)
48#define WUPSMSK2 0xe6180048 48#define WUPSMSK2 IOMEM(0xe6180048)
49#define WUPSFAC 0xe6180098 49#define WUPSFAC IOMEM(0xe6180098)
50#define IRQCR 0xe618022c 50#define IRQCR IOMEM(0xe618022c)
51#define IRQCR2 0xe6180238 51#define IRQCR2 IOMEM(0xe6180238)
52#define IRQCR3 0xe6180244 52#define IRQCR3 IOMEM(0xe6180244)
53#define IRQCR4 0xe6180248 53#define IRQCR4 IOMEM(0xe6180248)
54#define PDNSEL 0xe6180254 54#define PDNSEL IOMEM(0xe6180254)
55 55
56/* INTC */ 56/* INTC */
57#define ICR1A 0xe6900000 57#define ICR1A IOMEM(0xe6900000)
58#define ICR2A 0xe6900004 58#define ICR2A IOMEM(0xe6900004)
59#define ICR3A 0xe6900008 59#define ICR3A IOMEM(0xe6900008)
60#define ICR4A 0xe690000c 60#define ICR4A IOMEM(0xe690000c)
61#define INTMSK00A 0xe6900040 61#define INTMSK00A IOMEM(0xe6900040)
62#define INTMSK10A 0xe6900044 62#define INTMSK10A IOMEM(0xe6900044)
63#define INTMSK20A 0xe6900048 63#define INTMSK20A IOMEM(0xe6900048)
64#define INTMSK30A 0xe690004c 64#define INTMSK30A IOMEM(0xe690004c)
65 65
66/* MFIS */ 66/* MFIS */
67/* FIXME: pointing where? */
67#define SMFRAM 0xe6a70000 68#define SMFRAM 0xe6a70000
68 69
69/* AP-System Core */ 70/* AP-System Core */
70#define APARMBAREA 0xe6f10020 71#define APARMBAREA IOMEM(0xe6f10020)
71 72
72#ifdef CONFIG_PM 73#ifdef CONFIG_PM
73 74
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index 2e3074ab75b3..e647f5410879 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -462,7 +462,7 @@ static void __init sh7367_earlytimer_init(void)
462 shmobile_earlytimer_init(); 462 shmobile_earlytimer_init();
463} 463}
464 464
465#define SYMSTPCR2 0xe6158048 465#define SYMSTPCR2 IOMEM(0xe6158048)
466#define SYMSTPCR2_CMT1 (1 << 29) 466#define SYMSTPCR2_CMT1 (1 << 29)
467 467
468void __init sh7367_add_early_devices(void) 468void __init sh7367_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index 855b1506caf8..edcf98bb7012 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -484,7 +484,7 @@ static void __init sh7377_earlytimer_init(void)
484 shmobile_earlytimer_init(); 484 shmobile_earlytimer_init();
485} 485}
486 486
487#define SMSTPCR3 0xe615013c 487#define SMSTPCR3 IOMEM(0xe615013c)
488#define SMSTPCR3_CMT1 (1 << 29) 488#define SMSTPCR3_CMT1 (1 << 29)
489 489
490void __init sh7377_add_early_devices(void) 490void __init sh7377_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index d230af656fc9..a13c97b4ba1d 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -759,7 +759,7 @@ static struct platform_device *sh73a0_late_devices[] __initdata = {
759 &mpdma0_device, 759 &mpdma0_device,
760}; 760};
761 761
762#define SRCR2 0xe61580b0 762#define SRCR2 IOMEM(0xe61580b0)
763 763
764void __init sh73a0_add_standard_devices(void) 764void __init sh73a0_add_standard_devices(void)
765{ 765{
diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h
index 65f27def239b..07d90acc92c8 100644
--- a/arch/arm/mach-spear13xx/include/mach/spear.h
+++ b/arch/arm/mach-spear13xx/include/mach/spear.h
@@ -17,26 +17,26 @@
17#include <asm/memory.h> 17#include <asm/memory.h>
18 18
19#define PERIP_GRP2_BASE UL(0xB3000000) 19#define PERIP_GRP2_BASE UL(0xB3000000)
20#define VA_PERIP_GRP2_BASE UL(0xFE000000) 20#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000)
21#define MCIF_SDHCI_BASE UL(0xB3000000) 21#define MCIF_SDHCI_BASE UL(0xB3000000)
22#define SYSRAM0_BASE UL(0xB3800000) 22#define SYSRAM0_BASE UL(0xB3800000)
23#define VA_SYSRAM0_BASE UL(0xFE800000) 23#define VA_SYSRAM0_BASE IOMEM(0xFE800000)
24#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) 24#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600)
25 25
26#define PERIP_GRP1_BASE UL(0xE0000000) 26#define PERIP_GRP1_BASE UL(0xE0000000)
27#define VA_PERIP_GRP1_BASE UL(0xFD000000) 27#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000)
28#define UART_BASE UL(0xE0000000) 28#define UART_BASE UL(0xE0000000)
29#define VA_UART_BASE UL(0xFD000000) 29#define VA_UART_BASE IOMEM(0xFD000000)
30#define SSP_BASE UL(0xE0100000) 30#define SSP_BASE UL(0xE0100000)
31#define MISC_BASE UL(0xE0700000) 31#define MISC_BASE UL(0xE0700000)
32#define VA_MISC_BASE IOMEM(UL(0xFD700000)) 32#define VA_MISC_BASE IOMEM(0xFD700000)
33 33
34#define A9SM_AND_MPMC_BASE UL(0xEC000000) 34#define A9SM_AND_MPMC_BASE UL(0xEC000000)
35#define VA_A9SM_AND_MPMC_BASE UL(0xFC000000) 35#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000)
36 36
37/* A9SM peripheral offsets */ 37/* A9SM peripheral offsets */
38#define A9SM_PERIP_BASE UL(0xEC800000) 38#define A9SM_PERIP_BASE UL(0xEC800000)
39#define VA_A9SM_PERIP_BASE UL(0xFC800000) 39#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000)
40#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) 40#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00)
41 41
42#define L2CC_BASE UL(0xED000000) 42#define L2CC_BASE UL(0xED000000)
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index cf936b106e27..e10648801b2e 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -114,17 +114,17 @@ void __init spear13xx_l2x0_init(void)
114 */ 114 */
115struct map_desc spear13xx_io_desc[] __initdata = { 115struct map_desc spear13xx_io_desc[] __initdata = {
116 { 116 {
117 .virtual = VA_PERIP_GRP2_BASE, 117 .virtual = (unsigned long)VA_PERIP_GRP2_BASE,
118 .pfn = __phys_to_pfn(PERIP_GRP2_BASE), 118 .pfn = __phys_to_pfn(PERIP_GRP2_BASE),
119 .length = SZ_16M, 119 .length = SZ_16M,
120 .type = MT_DEVICE 120 .type = MT_DEVICE
121 }, { 121 }, {
122 .virtual = VA_PERIP_GRP1_BASE, 122 .virtual = (unsigned long)VA_PERIP_GRP1_BASE,
123 .pfn = __phys_to_pfn(PERIP_GRP1_BASE), 123 .pfn = __phys_to_pfn(PERIP_GRP1_BASE),
124 .length = SZ_16M, 124 .length = SZ_16M,
125 .type = MT_DEVICE 125 .type = MT_DEVICE
126 }, { 126 }, {
127 .virtual = VA_A9SM_AND_MPMC_BASE, 127 .virtual = (unsigned long)VA_A9SM_AND_MPMC_BASE,
128 .pfn = __phys_to_pfn(A9SM_AND_MPMC_BASE), 128 .pfn = __phys_to_pfn(A9SM_AND_MPMC_BASE),
129 .length = SZ_16M, 129 .length = SZ_16M,
130 .type = MT_DEVICE 130 .type = MT_DEVICE
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h
index 34775baadaea..d60ecd1753f0 100644
--- a/arch/arm/mach-ux500/include/mach/uncompress.h
+++ b/arch/arm/mach-ux500/include/mach/uncompress.h
@@ -24,7 +24,7 @@
24#include <linux/amba/serial.h> 24#include <linux/amba/serial.h>
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26 26
27u32 ux500_uart_base; 27void __iomem *ux500_uart_base;
28 28
29static void putc(const char c) 29static void putc(const char c)
30{ 30{
@@ -51,7 +51,7 @@ static void flush(void)
51static inline void arch_decomp_setup(void) 51static inline void arch_decomp_setup(void)
52{ 52{
53 /* Use machine_is_foo() macro if you need to switch base someday */ 53 /* Use machine_is_foo() macro if you need to switch base someday */
54 ux500_uart_base = U8500_UART2_BASE; 54 ux500_uart_base = (void __iomem *)U8500_UART2_BASE;
55} 55}
56 56
57#define arch_decomp_wdog() /* nothing to do here */ 57#define arch_decomp_wdog() /* nothing to do here */
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index dbced61d9fda..ee9b1f9215df 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -76,7 +76,7 @@
76#define MX31_RTIC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xec000) 76#define MX31_RTIC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xec000)
77 77
78#define MX31_ROMP_BASE_ADDR 0x60000000 78#define MX31_ROMP_BASE_ADDR 0x60000000
79#define MX31_ROMP_BASE_ADDR_VIRT 0xfc500000 79#define MX31_ROMP_BASE_ADDR_VIRT IOMEM(0xfc500000)
80#define MX31_ROMP_SIZE SZ_1M 80#define MX31_ROMP_SIZE SZ_1M
81 81
82#define MX31_AVIC_BASE_ADDR 0x68000000 82#define MX31_AVIC_BASE_ADDR 0x68000000
@@ -92,11 +92,11 @@
92#define MX31_CS3_BASE_ADDR 0xb2000000 92#define MX31_CS3_BASE_ADDR 0xb2000000
93 93
94#define MX31_CS4_BASE_ADDR 0xb4000000 94#define MX31_CS4_BASE_ADDR 0xb4000000
95#define MX31_CS4_BASE_ADDR_VIRT 0xf6000000 95#define MX31_CS4_BASE_ADDR_VIRT IOMEM(0xf6000000)
96#define MX31_CS4_SIZE SZ_32M 96#define MX31_CS4_SIZE SZ_32M
97 97
98#define MX31_CS5_BASE_ADDR 0xb6000000 98#define MX31_CS5_BASE_ADDR 0xb6000000
99#define MX31_CS5_BASE_ADDR_VIRT 0xf8000000 99#define MX31_CS5_BASE_ADDR_VIRT IOMEM(0xf8000000)
100#define MX31_CS5_SIZE SZ_32M 100#define MX31_CS5_SIZE SZ_32M
101 101
102#define MX31_X_MEMC_BASE_ADDR 0xb8000000 102#define MX31_X_MEMC_BASE_ADDR 0xb8000000
diff --git a/arch/arm/plat-samsung/s5p-irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c
index f9431fe5b06e..23557d30e44c 100644
--- a/arch/arm/plat-samsung/s5p-irq-gpioint.c
+++ b/arch/arm/plat-samsung/s5p-irq-gpioint.c
@@ -24,7 +24,7 @@
24 24
25#include <asm/mach/irq.h> 25#include <asm/mach/irq.h>
26 26
27#define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u) 27#define GPIO_BASE(chip) ((void __iomem *)((unsigned long)((chip)->base) & 0xFFFFF000u))
28 28
29#define CON_OFFSET 0x700 29#define CON_OFFSET 0x700
30#define MASK_OFFSET 0x900 30#define MASK_OFFSET 0x900
@@ -153,7 +153,7 @@ static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip)
153 bank->chips[group - bank->start] = chip; 153 bank->chips[group - bank->start] = chip;
154 154
155 gc = irq_alloc_generic_chip("s5p_gpioint", 1, chip->irq_base, 155 gc = irq_alloc_generic_chip("s5p_gpioint", 1, chip->irq_base,
156 (void __iomem *)GPIO_BASE(chip), 156 GPIO_BASE(chip),
157 handle_level_irq); 157 handle_level_irq);
158 if (!gc) 158 if (!gc)
159 return -ENOMEM; 159 return -ENOMEM;
diff --git a/drivers/input/mouse/rpcmouse.c b/drivers/input/mouse/rpcmouse.c
index 272deddc8db6..21c60fea5d31 100644
--- a/drivers/input/mouse/rpcmouse.c
+++ b/drivers/input/mouse/rpcmouse.c
@@ -42,7 +42,7 @@ static irqreturn_t rpcmouse_irq(int irq, void *dev_id)
42 42
43 x = (short) iomd_readl(IOMD_MOUSEX); 43 x = (short) iomd_readl(IOMD_MOUSEX);
44 y = (short) iomd_readl(IOMD_MOUSEY); 44 y = (short) iomd_readl(IOMD_MOUSEY);
45 b = (short) (__raw_readl(0xe0310000) ^ 0x70); 45 b = (short) (__raw_readl(IOMEM(0xe0310000)) ^ 0x70);
46 46
47 dx = x - rpcmouse_lastx; 47 dx = x - rpcmouse_lastx;
48 dy = y - rpcmouse_lasty; 48 dy = y - rpcmouse_lasty;
diff --git a/drivers/net/ethernet/seeq/ether3.c b/drivers/net/ethernet/seeq/ether3.c
index df808ac8cb65..6a40dd03a32f 100644
--- a/drivers/net/ethernet/seeq/ether3.c
+++ b/drivers/net/ethernet/seeq/ether3.c
@@ -99,13 +99,13 @@ typedef enum {
99 * The SEEQ8005 doesn't like us writing to its registers 99 * The SEEQ8005 doesn't like us writing to its registers
100 * too quickly. 100 * too quickly.
101 */ 101 */
102static inline void ether3_outb(int v, const void __iomem *r) 102static inline void ether3_outb(int v, void __iomem *r)
103{ 103{
104 writeb(v, r); 104 writeb(v, r);
105 udelay(1); 105 udelay(1);
106} 106}
107 107
108static inline void ether3_outw(int v, const void __iomem *r) 108static inline void ether3_outw(int v, void __iomem *r)
109{ 109{
110 writew(v, r); 110 writew(v, r);
111 udelay(1); 111 udelay(1);
diff --git a/drivers/scsi/arm/eesox.c b/drivers/scsi/arm/eesox.c
index edfd12b48c28..968d08358d20 100644
--- a/drivers/scsi/arm/eesox.c
+++ b/drivers/scsi/arm/eesox.c
@@ -273,7 +273,7 @@ static void eesoxscsi_buffer_out(void *buf, int length, void __iomem *base)
273{ 273{
274 const void __iomem *reg_fas = base + EESOX_FAS216_OFFSET; 274 const void __iomem *reg_fas = base + EESOX_FAS216_OFFSET;
275 const void __iomem *reg_dmastat = base + EESOX_DMASTAT; 275 const void __iomem *reg_dmastat = base + EESOX_DMASTAT;
276 const void __iomem *reg_dmadata = base + EESOX_DMADATA; 276 void __iomem *reg_dmadata = base + EESOX_DMADATA;
277 277
278 do { 278 do {
279 unsigned int status; 279 unsigned int status;
diff --git a/drivers/tty/serial/serial_ks8695.c b/drivers/tty/serial/serial_ks8695.c
index 7c13639c597e..9bd004f9da89 100644
--- a/drivers/tty/serial/serial_ks8695.c
+++ b/drivers/tty/serial/serial_ks8695.c
@@ -548,8 +548,8 @@ static struct uart_ops ks8695uart_pops = {
548 548
549static struct uart_port ks8695uart_ports[SERIAL_KS8695_NR] = { 549static struct uart_port ks8695uart_ports[SERIAL_KS8695_NR] = {
550 { 550 {
551 .membase = (void *) KS8695_UART_VA, 551 .membase = KS8695_UART_VA,
552 .mapbase = KS8695_UART_VA, 552 .mapbase = KS8695_UART_PA,
553 .iotype = SERIAL_IO_MEM, 553 .iotype = SERIAL_IO_MEM,
554 .irq = KS8695_IRQ_UART_TX, 554 .irq = KS8695_IRQ_UART_TX,
555 .uartclk = KS8695_CLOCK_RATE * 16, 555 .uartclk = KS8695_CLOCK_RATE * 16,
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 7ae9d53f2bf1..113d43a16f54 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -131,7 +131,7 @@
131#define UPPER_MARGIN 32 131#define UPPER_MARGIN 32
132#define LOWER_MARGIN 32 132#define LOWER_MARGIN 32
133 133
134static resource_size_t da8xx_fb_reg_base; 134static void __iomem *da8xx_fb_reg_base;
135static struct resource *lcdc_regs; 135static struct resource *lcdc_regs;
136static unsigned int lcd_revision; 136static unsigned int lcd_revision;
137static irq_handler_t lcdc_irq_handler; 137static irq_handler_t lcdc_irq_handler;
@@ -951,7 +951,7 @@ static int __devexit fb_remove(struct platform_device *dev)
951 clk_disable(par->lcdc_clk); 951 clk_disable(par->lcdc_clk);
952 clk_put(par->lcdc_clk); 952 clk_put(par->lcdc_clk);
953 framebuffer_release(info); 953 framebuffer_release(info);
954 iounmap((void __iomem *)da8xx_fb_reg_base); 954 iounmap(da8xx_fb_reg_base);
955 release_mem_region(lcdc_regs->start, resource_size(lcdc_regs)); 955 release_mem_region(lcdc_regs->start, resource_size(lcdc_regs));
956 956
957 } 957 }
@@ -1171,7 +1171,7 @@ static int __devinit fb_probe(struct platform_device *device)
1171 if (!lcdc_regs) 1171 if (!lcdc_regs)
1172 return -EBUSY; 1172 return -EBUSY;
1173 1173
1174 da8xx_fb_reg_base = (resource_size_t)ioremap(lcdc_regs->start, len); 1174 da8xx_fb_reg_base = ioremap(lcdc_regs->start, len);
1175 if (!da8xx_fb_reg_base) { 1175 if (!da8xx_fb_reg_base) {
1176 ret = -EBUSY; 1176 ret = -EBUSY;
1177 goto err_request_mem; 1177 goto err_request_mem;
@@ -1392,7 +1392,7 @@ err_clk_put:
1392 clk_put(fb_clk); 1392 clk_put(fb_clk);
1393 1393
1394err_ioremap: 1394err_ioremap:
1395 iounmap((void __iomem *)da8xx_fb_reg_base); 1395 iounmap(da8xx_fb_reg_base);
1396 1396
1397err_request_mem: 1397err_request_mem:
1398 release_mem_region(lcdc_regs->start, len); 1398 release_mem_region(lcdc_regs->start, len);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-05 23:46:43 -0500