diff options
author | Joseph Lo <josephl@nvidia.com> | 2013-06-03 04:10:04 -0400 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-06-05 13:37:08 -0400 |
commit | af7f322ea8d00d120f06de4d6f73ad704c7fcc61 (patch) | |
tree | a1633d9fb35c80d749a22f87780015d4d51bb476 | |
parent | 510bb595de26f90e5bb7c4a1e2a584e38398cf00 (diff) |
ARM: tegra: remove ifdef in the tegra_resume
The ifdef was originally added with the intent that the runtime SoC
detection code, and code to support SoCs other than Tegra20, was only
included if the kernel supported SoCs other than Tegra20. However,
the condition was somewhat backwards and did not achieve this goal.
Simply remove the ifdef to solve this, rather than creating a much more
complex version.
We also fix a typo that caused a build error due to cpu_to_csr_req being
undefined.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren: rewrote commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/reset-handler.S | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index d2042ac736eb..39dc9e7834f3 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S | |||
@@ -54,12 +54,11 @@ ENTRY(tegra_resume) | |||
54 | bne cpu_resume @ no | 54 | bne cpu_resume @ no |
55 | no_cpu0_chk: | 55 | no_cpu0_chk: |
56 | 56 | ||
57 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
58 | /* Are we on Tegra20? */ | 57 | /* Are we on Tegra20? */ |
59 | cmp r6, #TEGRA20 | 58 | cmp r6, #TEGRA20 |
60 | beq 1f @ Yes | 59 | beq 1f @ Yes |
61 | /* Clear the flow controller flags for this CPU. */ | 60 | /* Clear the flow controller flags for this CPU. */ |
62 | cpu_to_csr_req r1, r0 | 61 | cpu_to_csr_reg r1, r0 |
63 | mov32 r2, TEGRA_FLOW_CTRL_BASE | 62 | mov32 r2, TEGRA_FLOW_CTRL_BASE |
64 | ldr r1, [r2, r1] | 63 | ldr r1, [r2, r1] |
65 | /* Clear event & intr flag */ | 64 | /* Clear event & intr flag */ |
@@ -70,7 +69,6 @@ no_cpu0_chk: | |||
70 | bic r1, r1, r0 | 69 | bic r1, r1, r0 |
71 | str r1, [r2] | 70 | str r1, [r2] |
72 | 1: | 71 | 1: |
73 | #endif | ||
74 | 72 | ||
75 | check_cpu_part_num 0xc09, r8, r9 | 73 | check_cpu_part_num 0xc09, r8, r9 |
76 | bne not_ca9 | 74 | bne not_ca9 |