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authorLinus Torvalds <torvalds@linux-foundation.org>2014-08-09 12:34:19 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-08-09 12:34:19 -0400
commitad1f5caf34390bb20fdbb4eaf71b0494e89936f0 (patch)
treeda297afa4878cb68bcecd6fa7600389df413612f
parente853ccf08b9ac32ce731600de9618c1a462e8b70 (diff)
parente57e41931134e09fc6c03c8d4eb19d516cc6e59b (diff)
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "A number of small fixes: - fix loading of the translation table base registers for LPAE - add two new syscalls to the ARM syscall tables" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: wire up memfd_create syscall ARM: wire up getrandom syscall ARM: 8114/1: LPAE: load upper bits of early TTBR0/TTBR1
-rw-r--r--arch/arm/include/asm/unistd.h2
-rw-r--r--arch/arm/include/uapi/asm/unistd.h2
-rw-r--r--arch/arm/kernel/calls.S2
-rw-r--r--arch/arm/mm/proc-v7-3level.S7
4 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 21ca0cebcab0..32640c431a08 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -19,7 +19,7 @@
19 * This may need to be greater than __NR_last_syscall+1 in order to 19 * This may need to be greater than __NR_last_syscall+1 in order to
20 * account for the padding in the syscall table 20 * account for the padding in the syscall table
21 */ 21 */
22#define __NR_syscalls (384) 22#define __NR_syscalls (388)
23 23
24/* 24/*
25 * *NOTE*: This is a ghost syscall private to the kernel. Only the 25 * *NOTE*: This is a ghost syscall private to the kernel. Only the
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 767ea204334e..3aaa75cae90c 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -410,6 +410,8 @@
410#define __NR_sched_getattr (__NR_SYSCALL_BASE+381) 410#define __NR_sched_getattr (__NR_SYSCALL_BASE+381)
411#define __NR_renameat2 (__NR_SYSCALL_BASE+382) 411#define __NR_renameat2 (__NR_SYSCALL_BASE+382)
412#define __NR_seccomp (__NR_SYSCALL_BASE+383) 412#define __NR_seccomp (__NR_SYSCALL_BASE+383)
413#define __NR_getrandom (__NR_SYSCALL_BASE+384)
414#define __NR_memfd_create (__NR_SYSCALL_BASE+385)
413 415
414/* 416/*
415 * The following SWIs are ARM private. 417 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index bea85f97f363..9f899d8fdcca 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -393,6 +393,8 @@
393 CALL(sys_sched_getattr) 393 CALL(sys_sched_getattr)
394 CALL(sys_renameat2) 394 CALL(sys_renameat2)
395 CALL(sys_seccomp) 395 CALL(sys_seccomp)
396 CALL(sys_getrandom)
397/* 385 */ CALL(sys_memfd_create)
396#ifndef syscalls_counted 398#ifndef syscalls_counted
397.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 399.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
398#define syscalls_counted 400#define syscalls_counted
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index e4c8acfc1323..1a24e9232ec8 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -146,12 +146,11 @@ ENDPROC(cpu_v7_set_pte_ext)
146 mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits 146 mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
147 mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits 147 mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits
148 addls \ttbr1, \ttbr1, #TTBR1_OFFSET 148 addls \ttbr1, \ttbr1, #TTBR1_OFFSET
149 mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1 149 adcls \tmp, \tmp, #0
150 mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
150 mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits 151 mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
151 mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits 152 mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits
152 mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 153 mcrr p15, 0, \ttbr0, \tmp, c2 @ load TTBR0
153 mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1
154 mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0
155 .endm 154 .endm
156 155
157 /* 156 /*