diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2009-10-22 17:35:07 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2009-11-20 17:45:38 -0500 |
commit | ab2f489294b69e6d736efa7a57dcf286cd9662a0 (patch) | |
tree | 7fbca6c42dc2edf003553928e22884967d8c8c65 | |
parent | 3bc265627a0e163acebd35235454c525ea020804 (diff) |
powerpc/p4080: Add basic support for p4080ds platform
Add basic support for the P4080 DS reference board. None of the data
path devices (ethernet, crypto, pme) are support at this time.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r-- | arch/powerpc/boot/dts/p4080ds.dts | 554 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/Kconfig | 12 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/Makefile | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/corenet_ds.c | 125 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/corenet_ds.h | 19 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/p4080_ds.c | 74 |
6 files changed, 785 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts new file mode 100644 index 000000000000..6b29eab05362 --- /dev/null +++ b/arch/powerpc/boot/dts/p4080ds.dts | |||
@@ -0,0 +1,554 @@ | |||
1 | /* | ||
2 | * P4080DS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | |||
14 | / { | ||
15 | model = "fsl,P4080DS"; | ||
16 | compatible = "fsl,P4080DS"; | ||
17 | #address-cells = <2>; | ||
18 | #size-cells = <2>; | ||
19 | |||
20 | aliases { | ||
21 | ccsr = &soc; | ||
22 | |||
23 | serial0 = &serial0; | ||
24 | serial1 = &serial1; | ||
25 | serial2 = &serial2; | ||
26 | serial3 = &serial3; | ||
27 | pci0 = &pci0; | ||
28 | pci1 = &pci1; | ||
29 | pci2 = &pci2; | ||
30 | usb0 = &usb0; | ||
31 | usb1 = &usb1; | ||
32 | dma0 = &dma0; | ||
33 | dma1 = &dma1; | ||
34 | sdhc = &sdhc; | ||
35 | |||
36 | rio0 = &rapidio0; | ||
37 | }; | ||
38 | |||
39 | cpus { | ||
40 | #address-cells = <1>; | ||
41 | #size-cells = <0>; | ||
42 | |||
43 | cpu0: PowerPC,4080@0 { | ||
44 | device_type = "cpu"; | ||
45 | reg = <0>; | ||
46 | next-level-cache = <&L2_0>; | ||
47 | L2_0: l2-cache { | ||
48 | }; | ||
49 | }; | ||
50 | cpu1: PowerPC,4080@1 { | ||
51 | device_type = "cpu"; | ||
52 | reg = <1>; | ||
53 | next-level-cache = <&L2_1>; | ||
54 | L2_1: l2-cache { | ||
55 | }; | ||
56 | }; | ||
57 | cpu2: PowerPC,4080@2 { | ||
58 | device_type = "cpu"; | ||
59 | reg = <2>; | ||
60 | next-level-cache = <&L2_2>; | ||
61 | L2_2: l2-cache { | ||
62 | }; | ||
63 | }; | ||
64 | cpu3: PowerPC,4080@3 { | ||
65 | device_type = "cpu"; | ||
66 | reg = <3>; | ||
67 | next-level-cache = <&L2_3>; | ||
68 | L2_3: l2-cache { | ||
69 | }; | ||
70 | }; | ||
71 | cpu4: PowerPC,4080@4 { | ||
72 | device_type = "cpu"; | ||
73 | reg = <4>; | ||
74 | next-level-cache = <&L2_4>; | ||
75 | L2_4: l2-cache { | ||
76 | }; | ||
77 | }; | ||
78 | cpu5: PowerPC,4080@5 { | ||
79 | device_type = "cpu"; | ||
80 | reg = <5>; | ||
81 | next-level-cache = <&L2_5>; | ||
82 | L2_5: l2-cache { | ||
83 | }; | ||
84 | }; | ||
85 | cpu6: PowerPC,4080@6 { | ||
86 | device_type = "cpu"; | ||
87 | reg = <6>; | ||
88 | next-level-cache = <&L2_6>; | ||
89 | L2_6: l2-cache { | ||
90 | }; | ||
91 | }; | ||
92 | cpu7: PowerPC,4080@7 { | ||
93 | device_type = "cpu"; | ||
94 | reg = <7>; | ||
95 | next-level-cache = <&L2_7>; | ||
96 | L2_7: l2-cache { | ||
97 | }; | ||
98 | }; | ||
99 | }; | ||
100 | |||
101 | memory { | ||
102 | device_type = "memory"; | ||
103 | }; | ||
104 | |||
105 | soc: soc@ffe000000 { | ||
106 | #address-cells = <1>; | ||
107 | #size-cells = <1>; | ||
108 | device_type = "soc"; | ||
109 | compatible = "simple-bus"; | ||
110 | ranges = <0x00000000 0xf 0xfe000000 0x1000000>; | ||
111 | reg = <0xf 0xfe000000 0 0x00001000>; | ||
112 | |||
113 | corenet-law@0 { | ||
114 | compatible = "fsl,corenet-law"; | ||
115 | reg = <0x0 0x1000>; | ||
116 | fsl,num-laws = <32>; | ||
117 | }; | ||
118 | |||
119 | memory-controller@8000 { | ||
120 | compatible = "fsl,p4080-memory-controller"; | ||
121 | reg = <0x8000 0x1000>; | ||
122 | interrupt-parent = <&mpic>; | ||
123 | interrupts = <0x12 2>; | ||
124 | }; | ||
125 | |||
126 | memory-controller@9000 { | ||
127 | compatible = "fsl,p4080-memory-controller"; | ||
128 | reg = <0x9000 0x1000>; | ||
129 | interrupt-parent = <&mpic>; | ||
130 | interrupts = <0x12 2>; | ||
131 | }; | ||
132 | |||
133 | corenet-cf@18000 { | ||
134 | compatible = "fsl,corenet-cf"; | ||
135 | reg = <0x18000 0x1000>; | ||
136 | fsl,ccf-num-csdids = <32>; | ||
137 | fsl,ccf-num-snoopids = <32>; | ||
138 | }; | ||
139 | |||
140 | iommu@20000 { | ||
141 | compatible = "fsl,p4080-pamu"; | ||
142 | reg = <0x20000 0x10000>; | ||
143 | interrupts = <24 2>; | ||
144 | interrupt-parent = <&mpic>; | ||
145 | }; | ||
146 | |||
147 | mpic: pic@40000 { | ||
148 | interrupt-controller; | ||
149 | #address-cells = <0>; | ||
150 | #interrupt-cells = <2>; | ||
151 | reg = <0x40000 0x40000>; | ||
152 | compatible = "chrp,open-pic"; | ||
153 | device_type = "open-pic"; | ||
154 | }; | ||
155 | |||
156 | dma0: dma@100300 { | ||
157 | #address-cells = <1>; | ||
158 | #size-cells = <1>; | ||
159 | compatible = "fsl,p4080-dma", "fsl,eloplus-dma"; | ||
160 | reg = <0x100300 0x4>; | ||
161 | ranges = <0x0 0x100100 0x200>; | ||
162 | cell-index = <0>; | ||
163 | dma-channel@0 { | ||
164 | compatible = "fsl,p4080-dma-channel", | ||
165 | "fsl,eloplus-dma-channel"; | ||
166 | reg = <0x0 0x80>; | ||
167 | cell-index = <0>; | ||
168 | interrupt-parent = <&mpic>; | ||
169 | interrupts = <28 2>; | ||
170 | }; | ||
171 | dma-channel@80 { | ||
172 | compatible = "fsl,p4080-dma-channel", | ||
173 | "fsl,eloplus-dma-channel"; | ||
174 | reg = <0x80 0x80>; | ||
175 | cell-index = <1>; | ||
176 | interrupt-parent = <&mpic>; | ||
177 | interrupts = <29 2>; | ||
178 | }; | ||
179 | dma-channel@100 { | ||
180 | compatible = "fsl,p4080-dma-channel", | ||
181 | "fsl,eloplus-dma-channel"; | ||
182 | reg = <0x100 0x80>; | ||
183 | cell-index = <2>; | ||
184 | interrupt-parent = <&mpic>; | ||
185 | interrupts = <30 2>; | ||
186 | }; | ||
187 | dma-channel@180 { | ||
188 | compatible = "fsl,p4080-dma-channel", | ||
189 | "fsl,eloplus-dma-channel"; | ||
190 | reg = <0x180 0x80>; | ||
191 | cell-index = <3>; | ||
192 | interrupt-parent = <&mpic>; | ||
193 | interrupts = <31 2>; | ||
194 | }; | ||
195 | }; | ||
196 | |||
197 | dma1: dma@101300 { | ||
198 | #address-cells = <1>; | ||
199 | #size-cells = <1>; | ||
200 | compatible = "fsl,p4080-dma", "fsl,eloplus-dma"; | ||
201 | reg = <0x101300 0x4>; | ||
202 | ranges = <0x0 0x101100 0x200>; | ||
203 | cell-index = <1>; | ||
204 | dma-channel@0 { | ||
205 | compatible = "fsl,p4080-dma-channel", | ||
206 | "fsl,eloplus-dma-channel"; | ||
207 | reg = <0x0 0x80>; | ||
208 | cell-index = <0>; | ||
209 | interrupt-parent = <&mpic>; | ||
210 | interrupts = <32 2>; | ||
211 | }; | ||
212 | dma-channel@80 { | ||
213 | compatible = "fsl,p4080-dma-channel", | ||
214 | "fsl,eloplus-dma-channel"; | ||
215 | reg = <0x80 0x80>; | ||
216 | cell-index = <1>; | ||
217 | interrupt-parent = <&mpic>; | ||
218 | interrupts = <33 2>; | ||
219 | }; | ||
220 | dma-channel@100 { | ||
221 | compatible = "fsl,p4080-dma-channel", | ||
222 | "fsl,eloplus-dma-channel"; | ||
223 | reg = <0x100 0x80>; | ||
224 | cell-index = <2>; | ||
225 | interrupt-parent = <&mpic>; | ||
226 | interrupts = <34 2>; | ||
227 | }; | ||
228 | dma-channel@180 { | ||
229 | compatible = "fsl,p4080-dma-channel", | ||
230 | "fsl,eloplus-dma-channel"; | ||
231 | reg = <0x180 0x80>; | ||
232 | cell-index = <3>; | ||
233 | interrupt-parent = <&mpic>; | ||
234 | interrupts = <35 2>; | ||
235 | }; | ||
236 | }; | ||
237 | |||
238 | spi@110000 { | ||
239 | cell-index = <0>; | ||
240 | #address-cells = <1>; | ||
241 | #size-cells = <0>; | ||
242 | compatible = "fsl,espi"; | ||
243 | reg = <0x110000 0x1000>; | ||
244 | interrupts = <53 0x2>; | ||
245 | interrupt-parent = <&mpic>; | ||
246 | espi,num-ss-bits = <4>; | ||
247 | mode = "cpu"; | ||
248 | |||
249 | fsl_m25p80@0 { | ||
250 | #address-cells = <1>; | ||
251 | #size-cells = <1>; | ||
252 | compatible = "fsl,espi-flash"; | ||
253 | reg = <0>; | ||
254 | linux,modalias = "fsl_m25p80"; | ||
255 | spi-max-frequency = <40000000>; /* input clock */ | ||
256 | partition@u-boot { | ||
257 | label = "u-boot"; | ||
258 | reg = <0x00000000 0x00100000>; | ||
259 | read-only; | ||
260 | }; | ||
261 | partition@kernel { | ||
262 | label = "kernel"; | ||
263 | reg = <0x00100000 0x00500000>; | ||
264 | read-only; | ||
265 | }; | ||
266 | partition@dtb { | ||
267 | label = "dtb"; | ||
268 | reg = <0x00600000 0x00100000>; | ||
269 | read-only; | ||
270 | }; | ||
271 | partition@fs { | ||
272 | label = "file system"; | ||
273 | reg = <0x00700000 0x00900000>; | ||
274 | }; | ||
275 | }; | ||
276 | }; | ||
277 | |||
278 | sdhc: sdhc@114000 { | ||
279 | compatible = "fsl,p4080-esdhc", "fsl,esdhc"; | ||
280 | reg = <0x114000 0x1000>; | ||
281 | interrupts = <48 2>; | ||
282 | interrupt-parent = <&mpic>; | ||
283 | }; | ||
284 | |||
285 | i2c@118000 { | ||
286 | #address-cells = <1>; | ||
287 | #size-cells = <0>; | ||
288 | cell-index = <0>; | ||
289 | compatible = "fsl-i2c"; | ||
290 | reg = <0x118000 0x100>; | ||
291 | interrupts = <38 2>; | ||
292 | interrupt-parent = <&mpic>; | ||
293 | dfsrr; | ||
294 | }; | ||
295 | |||
296 | i2c@118100 { | ||
297 | #address-cells = <1>; | ||
298 | #size-cells = <0>; | ||
299 | cell-index = <1>; | ||
300 | compatible = "fsl-i2c"; | ||
301 | reg = <0x118100 0x100>; | ||
302 | interrupts = <38 2>; | ||
303 | interrupt-parent = <&mpic>; | ||
304 | dfsrr; | ||
305 | eeprom@51 { | ||
306 | compatible = "at24,24c256"; | ||
307 | reg = <0x51>; | ||
308 | }; | ||
309 | eeprom@52 { | ||
310 | compatible = "at24,24c256"; | ||
311 | reg = <0x52>; | ||
312 | }; | ||
313 | rtc@68 { | ||
314 | compatible = "dallas,ds3232"; | ||
315 | reg = <0x68>; | ||
316 | interrupts = <0 0x1>; | ||
317 | interrupt-parent = <&mpic>; | ||
318 | }; | ||
319 | }; | ||
320 | |||
321 | i2c@119000 { | ||
322 | #address-cells = <1>; | ||
323 | #size-cells = <0>; | ||
324 | cell-index = <2>; | ||
325 | compatible = "fsl-i2c"; | ||
326 | reg = <0x119000 0x100>; | ||
327 | interrupts = <39 2>; | ||
328 | interrupt-parent = <&mpic>; | ||
329 | dfsrr; | ||
330 | }; | ||
331 | |||
332 | i2c@119100 { | ||
333 | #address-cells = <1>; | ||
334 | #size-cells = <0>; | ||
335 | cell-index = <3>; | ||
336 | compatible = "fsl-i2c"; | ||
337 | reg = <0x119100 0x100>; | ||
338 | interrupts = <39 2>; | ||
339 | interrupt-parent = <&mpic>; | ||
340 | dfsrr; | ||
341 | }; | ||
342 | |||
343 | serial0: serial@11c500 { | ||
344 | cell-index = <0>; | ||
345 | device_type = "serial"; | ||
346 | compatible = "ns16550"; | ||
347 | reg = <0x11c500 0x100>; | ||
348 | clock-frequency = <0>; | ||
349 | interrupts = <36 2>; | ||
350 | interrupt-parent = <&mpic>; | ||
351 | }; | ||
352 | |||
353 | serial1: serial@11c600 { | ||
354 | cell-index = <1>; | ||
355 | device_type = "serial"; | ||
356 | compatible = "ns16550"; | ||
357 | reg = <0x11c600 0x100>; | ||
358 | clock-frequency = <0>; | ||
359 | interrupts = <36 2>; | ||
360 | interrupt-parent = <&mpic>; | ||
361 | }; | ||
362 | |||
363 | serial2: serial@11d500 { | ||
364 | cell-index = <2>; | ||
365 | device_type = "serial"; | ||
366 | compatible = "ns16550"; | ||
367 | reg = <0x11d500 0x100>; | ||
368 | clock-frequency = <0>; | ||
369 | interrupts = <37 2>; | ||
370 | interrupt-parent = <&mpic>; | ||
371 | }; | ||
372 | |||
373 | serial3: serial@11d600 { | ||
374 | cell-index = <3>; | ||
375 | device_type = "serial"; | ||
376 | compatible = "ns16550"; | ||
377 | reg = <0x11d600 0x100>; | ||
378 | clock-frequency = <0>; | ||
379 | interrupts = <37 2>; | ||
380 | interrupt-parent = <&mpic>; | ||
381 | }; | ||
382 | |||
383 | gpio0: gpio@130000 { | ||
384 | compatible = "fsl,p4080-gpio"; | ||
385 | reg = <0x130000 0x1000>; | ||
386 | interrupts = <55 2>; | ||
387 | interrupt-parent = <&mpic>; | ||
388 | #gpio-cells = <2>; | ||
389 | gpio-controller; | ||
390 | }; | ||
391 | |||
392 | usb0: usb@210000 { | ||
393 | compatible = "fsl,p4080-usb2-mph", | ||
394 | "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; | ||
395 | reg = <0x210000 0x1000>; | ||
396 | #address-cells = <1>; | ||
397 | #size-cells = <0>; | ||
398 | interrupt-parent = <&mpic>; | ||
399 | interrupts = <44 0x2>; | ||
400 | phy_type = "ulpi"; | ||
401 | }; | ||
402 | |||
403 | usb1: usb@211000 { | ||
404 | compatible = "fsl,p4080-usb2-dr", | ||
405 | "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; | ||
406 | reg = <0x211000 0x1000>; | ||
407 | #address-cells = <1>; | ||
408 | #size-cells = <0>; | ||
409 | interrupt-parent = <&mpic>; | ||
410 | interrupts = <45 0x2>; | ||
411 | dr_mode = "host"; | ||
412 | phy_type = "ulpi"; | ||
413 | }; | ||
414 | }; | ||
415 | |||
416 | rapidio0: rapidio@ffe0c0000 { | ||
417 | #address-cells = <2>; | ||
418 | #size-cells = <2>; | ||
419 | compatible = "fsl,rapidio-delta"; | ||
420 | reg = <0xf 0xfe0c0000 0 0x20000>; | ||
421 | ranges = <0 0 0xf 0xf5000000 0 0x01000000>; | ||
422 | interrupt-parent = <&mpic>; | ||
423 | /* err_irq bell_outb_irq bell_inb_irq | ||
424 | msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */ | ||
425 | interrupts = <16 2 56 2 57 2 60 2 61 2 62 2 63 2>; | ||
426 | }; | ||
427 | |||
428 | localbus@ffe124000 { | ||
429 | compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; | ||
430 | reg = <0xf 0xfe124000 0 0x1000>; | ||
431 | interrupts = <25 2>; | ||
432 | #address-cells = <2>; | ||
433 | #size-cells = <1>; | ||
434 | |||
435 | ranges = <0 0 0xf 0xe8000000 0x08000000>; | ||
436 | |||
437 | flash@0,0 { | ||
438 | compatible = "cfi-flash"; | ||
439 | reg = <0 0 0x08000000>; | ||
440 | bank-width = <2>; | ||
441 | device-width = <2>; | ||
442 | }; | ||
443 | }; | ||
444 | |||
445 | pci0: pcie@ffe200000 { | ||
446 | compatible = "fsl,p4080-pcie"; | ||
447 | device_type = "pci"; | ||
448 | #interrupt-cells = <1>; | ||
449 | #size-cells = <2>; | ||
450 | #address-cells = <3>; | ||
451 | reg = <0xf 0xfe200000 0 0x1000>; | ||
452 | bus-range = <0x0 0xff>; | ||
453 | ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 | ||
454 | 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; | ||
455 | clock-frequency = <0x1fca055>; | ||
456 | interrupt-parent = <&mpic>; | ||
457 | interrupts = <16 2>; | ||
458 | |||
459 | interrupt-map-mask = <0xf800 0 0 7>; | ||
460 | interrupt-map = < | ||
461 | /* IDSEL 0x0 */ | ||
462 | 0000 0 0 1 &mpic 40 1 | ||
463 | 0000 0 0 2 &mpic 1 1 | ||
464 | 0000 0 0 3 &mpic 2 1 | ||
465 | 0000 0 0 4 &mpic 3 1 | ||
466 | >; | ||
467 | pcie@0 { | ||
468 | reg = <0 0 0 0 0>; | ||
469 | #size-cells = <2>; | ||
470 | #address-cells = <3>; | ||
471 | device_type = "pci"; | ||
472 | ranges = <0x02000000 0 0xe0000000 | ||
473 | 0x02000000 0 0xe0000000 | ||
474 | 0 0x20000000 | ||
475 | |||
476 | 0x01000000 0 0x00000000 | ||
477 | 0x01000000 0 0x00000000 | ||
478 | 0 0x00010000>; | ||
479 | }; | ||
480 | }; | ||
481 | |||
482 | pci1: pcie@ffe201000 { | ||
483 | compatible = "fsl,p4080-pcie"; | ||
484 | device_type = "pci"; | ||
485 | #interrupt-cells = <1>; | ||
486 | #size-cells = <2>; | ||
487 | #address-cells = <3>; | ||
488 | reg = <0xf 0xfe201000 0 0x1000>; | ||
489 | bus-range = <0 0xff>; | ||
490 | ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 | ||
491 | 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; | ||
492 | clock-frequency = <0x1fca055>; | ||
493 | interrupt-parent = <&mpic>; | ||
494 | interrupts = <16 2>; | ||
495 | interrupt-map-mask = <0xf800 0 0 7>; | ||
496 | interrupt-map = < | ||
497 | /* IDSEL 0x0 */ | ||
498 | 0000 0 0 1 &mpic 41 1 | ||
499 | 0000 0 0 2 &mpic 5 1 | ||
500 | 0000 0 0 3 &mpic 6 1 | ||
501 | 0000 0 0 4 &mpic 7 1 | ||
502 | >; | ||
503 | pcie@0 { | ||
504 | reg = <0 0 0 0 0>; | ||
505 | #size-cells = <2>; | ||
506 | #address-cells = <3>; | ||
507 | device_type = "pci"; | ||
508 | ranges = <0x02000000 0 0xe0000000 | ||
509 | 0x02000000 0 0xe0000000 | ||
510 | 0 0x20000000 | ||
511 | |||
512 | 0x01000000 0 0x00000000 | ||
513 | 0x01000000 0 0x00000000 | ||
514 | 0 0x00010000>; | ||
515 | }; | ||
516 | }; | ||
517 | |||
518 | pci2: pcie@ffe202000 { | ||
519 | compatible = "fsl,p4080-pcie"; | ||
520 | device_type = "pci"; | ||
521 | #interrupt-cells = <1>; | ||
522 | #size-cells = <2>; | ||
523 | #address-cells = <3>; | ||
524 | reg = <0xf 0xfe202000 0 0x1000>; | ||
525 | bus-range = <0x0 0xff>; | ||
526 | ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 | ||
527 | 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; | ||
528 | clock-frequency = <0x1fca055>; | ||
529 | interrupt-parent = <&mpic>; | ||
530 | interrupts = <16 2>; | ||
531 | interrupt-map-mask = <0xf800 0 0 7>; | ||
532 | interrupt-map = < | ||
533 | /* IDSEL 0x0 */ | ||
534 | 0000 0 0 1 &mpic 42 1 | ||
535 | 0000 0 0 2 &mpic 9 1 | ||
536 | 0000 0 0 3 &mpic 10 1 | ||
537 | 0000 0 0 4 &mpic 11 1 | ||
538 | >; | ||
539 | pcie@0 { | ||
540 | reg = <0 0 0 0 0>; | ||
541 | #size-cells = <2>; | ||
542 | #address-cells = <3>; | ||
543 | device_type = "pci"; | ||
544 | ranges = <0x02000000 0 0xe0000000 | ||
545 | 0x02000000 0 0xe0000000 | ||
546 | 0 0x20000000 | ||
547 | |||
548 | 0x01000000 0 0x00000000 | ||
549 | 0x01000000 0 0x00000000 | ||
550 | 0 0x00010000>; | ||
551 | }; | ||
552 | }; | ||
553 | |||
554 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 5de0d633836c..d95121894eb7 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -145,6 +145,18 @@ config SBC8560 | |||
145 | help | 145 | help |
146 | This option enables support for the Wind River SBC8560 board | 146 | This option enables support for the Wind River SBC8560 board |
147 | 147 | ||
148 | config P4080_DS | ||
149 | bool "Freescale P4080 DS" | ||
150 | select DEFAULT_UIMAGE | ||
151 | select PPC_FSL_BOOK3E | ||
152 | select PPC_E500MC | ||
153 | select PHYS_64BIT | ||
154 | select SWIOTLB | ||
155 | select MPC8xxx_GPIO | ||
156 | select HAS_RAPIDIO | ||
157 | help | ||
158 | This option enables support for the P4080 DS board | ||
159 | |||
148 | endif # FSL_SOC_BOOKE | 160 | endif # FSL_SOC_BOOKE |
149 | 161 | ||
150 | config TQM85xx | 162 | config TQM85xx |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 9098aea0cf32..387c128f2c8c 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -10,6 +10,7 @@ obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o | |||
10 | obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o | 10 | obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o |
11 | obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o | 11 | obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o |
12 | obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o | 12 | obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o |
13 | obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o | ||
13 | obj-$(CONFIG_STX_GP3) += stx_gp3.o | 14 | obj-$(CONFIG_STX_GP3) += stx_gp3.o |
14 | obj-$(CONFIG_TQM85xx) += tqm85xx.o | 15 | obj-$(CONFIG_TQM85xx) += tqm85xx.o |
15 | obj-$(CONFIG_SBC8560) += sbc8560.o | 16 | obj-$(CONFIG_SBC8560) += sbc8560.o |
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c new file mode 100644 index 000000000000..534c2ecc89d9 --- /dev/null +++ b/arch/powerpc/platforms/85xx/corenet_ds.c | |||
@@ -0,0 +1,125 @@ | |||
1 | /* | ||
2 | * Corenet based SoC DS Setup | ||
3 | * | ||
4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | ||
5 | * | ||
6 | * Copyright 2009 Freescale Semiconductor Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/kdev_t.h> | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/lmb.h> | ||
20 | |||
21 | #include <asm/system.h> | ||
22 | #include <asm/time.h> | ||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/pci-bridge.h> | ||
25 | #include <mm/mmu_decl.h> | ||
26 | #include <asm/prom.h> | ||
27 | #include <asm/udbg.h> | ||
28 | #include <asm/mpic.h> | ||
29 | |||
30 | #include <linux/of_platform.h> | ||
31 | #include <sysdev/fsl_soc.h> | ||
32 | #include <sysdev/fsl_pci.h> | ||
33 | |||
34 | void __init corenet_ds_pic_init(void) | ||
35 | { | ||
36 | struct mpic *mpic; | ||
37 | struct resource r; | ||
38 | struct device_node *np = NULL; | ||
39 | unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN | | ||
40 | MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU; | ||
41 | |||
42 | np = of_find_node_by_type(np, "open-pic"); | ||
43 | |||
44 | if (np == NULL) { | ||
45 | printk(KERN_ERR "Could not find open-pic node\n"); | ||
46 | return; | ||
47 | } | ||
48 | |||
49 | if (of_address_to_resource(np, 0, &r)) { | ||
50 | printk(KERN_ERR "Failed to map mpic register space\n"); | ||
51 | of_node_put(np); | ||
52 | return; | ||
53 | } | ||
54 | |||
55 | if (ppc_md.get_irq == mpic_get_coreint_irq) | ||
56 | flags |= MPIC_ENABLE_COREINT; | ||
57 | |||
58 | mpic = mpic_alloc(np, r.start, flags, 0, 256, " OpenPIC "); | ||
59 | BUG_ON(mpic == NULL); | ||
60 | |||
61 | mpic_init(mpic); | ||
62 | } | ||
63 | |||
64 | #ifdef CONFIG_PCI | ||
65 | static int primary_phb_addr; | ||
66 | #endif | ||
67 | |||
68 | /* | ||
69 | * Setup the architecture | ||
70 | */ | ||
71 | #ifdef CONFIG_SMP | ||
72 | void __init mpc85xx_smp_init(void); | ||
73 | #endif | ||
74 | |||
75 | void __init corenet_ds_setup_arch(void) | ||
76 | { | ||
77 | #ifdef CONFIG_PCI | ||
78 | struct device_node *np; | ||
79 | struct pci_controller *hose; | ||
80 | #endif | ||
81 | dma_addr_t max = 0xffffffff; | ||
82 | |||
83 | #ifdef CONFIG_SMP | ||
84 | mpc85xx_smp_init(); | ||
85 | #endif | ||
86 | |||
87 | #ifdef CONFIG_PCI | ||
88 | for_each_compatible_node(np, "pci", "fsl,p4080-pcie") { | ||
89 | struct resource rsrc; | ||
90 | of_address_to_resource(np, 0, &rsrc); | ||
91 | if ((rsrc.start & 0xfffff) == primary_phb_addr) | ||
92 | fsl_add_bridge(np, 1); | ||
93 | else | ||
94 | fsl_add_bridge(np, 0); | ||
95 | |||
96 | hose = pci_find_hose_for_OF_device(np); | ||
97 | max = min(max, hose->dma_window_base_cur + | ||
98 | hose->dma_window_size); | ||
99 | } | ||
100 | #endif | ||
101 | |||
102 | #ifdef CONFIG_SWIOTLB | ||
103 | if (lmb_end_of_DRAM() > max) { | ||
104 | ppc_swiotlb_enable = 1; | ||
105 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
106 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
107 | } | ||
108 | #endif | ||
109 | pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); | ||
110 | } | ||
111 | |||
112 | static const struct of_device_id of_device_ids[] __devinitconst = { | ||
113 | { | ||
114 | .compatible = "simple-bus" | ||
115 | }, | ||
116 | { | ||
117 | .compatible = "fsl,rapidio-delta", | ||
118 | }, | ||
119 | {} | ||
120 | }; | ||
121 | |||
122 | int __init corenet_ds_publish_devices(void) | ||
123 | { | ||
124 | return of_platform_bus_probe(NULL, of_device_ids, NULL); | ||
125 | } | ||
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.h b/arch/powerpc/platforms/85xx/corenet_ds.h new file mode 100644 index 000000000000..ddd700b23031 --- /dev/null +++ b/arch/powerpc/platforms/85xx/corenet_ds.h | |||
@@ -0,0 +1,19 @@ | |||
1 | /* | ||
2 | * Corenet based SoC DS Setup | ||
3 | * | ||
4 | * Copyright 2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #ifndef CORENET_DS_H | ||
13 | #define CORENET_DS_H | ||
14 | |||
15 | extern void __init corenet_ds_pic_init(void); | ||
16 | extern void __init corenet_ds_setup_arch(void); | ||
17 | extern int __init corenet_ds_publish_devices(void); | ||
18 | |||
19 | #endif | ||
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c new file mode 100644 index 000000000000..84170460497b --- /dev/null +++ b/arch/powerpc/platforms/85xx/p4080_ds.c | |||
@@ -0,0 +1,74 @@ | |||
1 | /* | ||
2 | * P4080 DS Setup | ||
3 | * | ||
4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | ||
5 | * | ||
6 | * Copyright 2009 Freescale Semiconductor Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/kdev_t.h> | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | |||
20 | #include <asm/system.h> | ||
21 | #include <asm/time.h> | ||
22 | #include <asm/machdep.h> | ||
23 | #include <asm/pci-bridge.h> | ||
24 | #include <mm/mmu_decl.h> | ||
25 | #include <asm/prom.h> | ||
26 | #include <asm/udbg.h> | ||
27 | #include <asm/mpic.h> | ||
28 | |||
29 | #include <linux/of_platform.h> | ||
30 | #include <sysdev/fsl_soc.h> | ||
31 | #include <sysdev/fsl_pci.h> | ||
32 | |||
33 | #include "corenet_ds.h" | ||
34 | |||
35 | #ifdef CONFIG_PCI | ||
36 | static int primary_phb_addr; | ||
37 | #endif | ||
38 | |||
39 | /* | ||
40 | * Called very early, device-tree isn't unflattened | ||
41 | */ | ||
42 | static int __init p4080_ds_probe(void) | ||
43 | { | ||
44 | unsigned long root = of_get_flat_dt_root(); | ||
45 | |||
46 | if (of_flat_dt_is_compatible(root, "fsl,P4080DS")) { | ||
47 | #ifdef CONFIG_PCI | ||
48 | /* treat PCIe1 as primary, | ||
49 | * shouldn't matter as we have no ISA on the board | ||
50 | */ | ||
51 | primary_phb_addr = 0x0000; | ||
52 | #endif | ||
53 | return 1; | ||
54 | } else { | ||
55 | return 0; | ||
56 | } | ||
57 | } | ||
58 | |||
59 | define_machine(p4080_ds) { | ||
60 | .name = "P4080 DS", | ||
61 | .probe = p4080_ds_probe, | ||
62 | .setup_arch = corenet_ds_setup_arch, | ||
63 | .init_IRQ = corenet_ds_pic_init, | ||
64 | #ifdef CONFIG_PCI | ||
65 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
66 | #endif | ||
67 | .get_irq = mpic_get_coreint_irq, | ||
68 | .restart = fsl_rstcr_restart, | ||
69 | .calibrate_decr = generic_calibrate_decr, | ||
70 | .progress = udbg_progress, | ||
71 | }; | ||
72 | |||
73 | machine_device_initcall(p4080_ds, corenet_ds_publish_devices); | ||
74 | machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier); | ||