Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
 "Some further ARM fixes:
   - another build fix for the kprobes test code
   - a fix for no kuser helpers for the set_tls code, which oopsed on
     noMMU hardware
   - a fix for alignment handler with neon opcodes being misinterpreted
   - turning off the hardware access support, which is not implemented
   - a build fix for the v7 coherency exiting code, which can be built
     in non-v7 environments (but still only executed on v7 CPUs)"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8179/1: kprobes-test: Fix compile error "bad immediate value for offset"
  ARM: 8178/1: fix set_tls for !CONFIG_KUSER_HELPERS
  ARM: 8177/1: cacheflush: Fix v7_exit_coherency_flush exynos build breakage on ARMv6
  ARM: 8165/1: alignment: don't break misaligned NEON load/store
  ARM: 8164/1: mm: clear SCTLR.HA instead of setting it for LPAE

6 files changed, 21 insertions, 10 deletions

diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 79ecb4f34ffb..10e78d00a0bb 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -466,6 +466,7 @@ static inline void __sync_cache_range_r(volatile void *p, size_t size)
  */
 #define v7_exit_coherency_flush(level) \
         asm volatile( \
+        ".arch  armv7-a \n\t" \
         "stmfd  sp!, {fp, ip} \n\t" \
         "mrc    p15, 0, r0, c1, c0, 0   @ get SCTLR \n\t" \
         "bic    r0, r0, #"__stringify(CR_C)" \n\t" \
diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h
index 36172adda9d0..5f833f7adba1 100644
--- a/arch/arm/include/asm/tls.h
+++ b/arch/arm/include/asm/tls.h
@@ -81,6 +81,7 @@ static inline void set_tls(unsigned long val)
                         asm("mcr p15, 0, %0, c13, c0, 3"
                             : : "r" (val));
                 } else {
+#ifdef CONFIG_KUSER_HELPERS
                         /*
                          * User space must never try to access this
                          * directly.  Expect your app to break
@@ -89,6 +90,7 @@ static inline void set_tls(unsigned long val)
                          * entry-armv.S for details)
                          */
                         *((unsigned int *)0xffff0ff0) = val;
+#endif
                 }
 
         }
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c
index 08d731294bcd..b206d7790c77 100644
--- a/arch/arm/kernel/kprobes-test.c
+++ b/arch/arm/kernel/kprobes-test.c
@@ -110,10 +110,13 @@
  *
  *      @ TESTCASE_START
  *      bl      __kprobes_test_case_start
- *      @ start of inline data...
+ *      .pushsection .rodata
+ *      "10:
  *      .ascii "mov r0, r7"     @ text title for test case
  *      .byte   0
- *      .align  2, 0
+ *      .popsection
+ *      @ start of inline data...
+ *      .word   10b             @ pointer to title in .rodata section
  *
  *      @ TEST_ARG_REG
  *      .byte   ARG_TYPE_REG
@@ -971,7 +974,7 @@ void __naked __kprobes_test_case_start(void)
         __asm__ __volatile__ (
                 "stmdb  sp!, {r4-r11}                           \n\t"
                 "sub    sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t"
-                "bic    r0, lr, #1  @ r0 = inline title string  \n\t"
+                "bic    r0, lr, #1  @ r0 = inline data          \n\t"
                 "mov    r1, sp                                  \n\t"
                 "bl     kprobes_test_case_start                 \n\t"
                 "bx     r0                                      \n\t"
@@ -1349,15 +1352,14 @@ static unsigned long next_instruction(unsigned long pc)
         return pc + 4;
 }
 
-static uintptr_t __used kprobes_test_case_start(const char *title, void *stack)
+static uintptr_t __used kprobes_test_case_start(const char **title, void *stack)
 {
         struct test_arg *args;
         struct test_arg_end *end_arg;
         unsigned long test_code;
 
-        args = (struct test_arg *)PTR_ALIGN(title + strlen(title) + 1, 4);
-
-        current_title = title;
+        current_title = *title++;
+        args = (struct test_arg *)title;
         current_args = args;
         current_stack = stack;
 
diff --git a/arch/arm/kernel/kprobes-test.h b/arch/arm/kernel/kprobes-test.h
index eecc90a0fd91..4430990e90e7 100644
--- a/arch/arm/kernel/kprobes-test.h
+++ b/arch/arm/kernel/kprobes-test.h
@@ -111,11 +111,14 @@ struct test_arg_end {
 #define TESTCASE_START(title)                                   \
         __asm__ __volatile__ (                                  \
         "bl     __kprobes_test_case_start               \n\t"   \
+        ".pushsection .rodata                           \n\t"   \
+        "10:                                            \n\t"   \
         /* don't use .asciz here as 'title' may be */           \
         /* multiple strings to be concatenated.  */             \
         ".ascii "#title"                                \n\t"   \
         ".byte  0                                       \n\t"   \
-        ".align 2, 0                                    \n\t"
+        ".popsection                                    \n\t"   \
+        ".word  10b                                     \n\t"
 
 #define TEST_ARG_REG(reg, val)                                  \
         ".byte  "__stringify(ARG_TYPE_REG)"             \n\t"   \
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 0c1ab49e5f7b..83792f4324ea 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -41,6 +41,7 @@
  * This code is not portable to processors with late data abort handling.
  */
 #define CODING_BITS(i)  (i & 0x0e000000)
+#define COND_BITS(i)    (i & 0xf0000000)
 
 #define LDST_I_BIT(i)   (i & (1 << 26))         /* Immediate constant   */
 #define LDST_P_BIT(i)   (i & (1 << 24))         /* Preindex             */
@@ -821,6 +822,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
                 break;
 
         case 0x04000000:        /* ldr or str immediate */
+                if (COND_BITS(instr) == 0xf0000000) /* NEON VLDn, VSTn */
+                        goto bad;
                 offset.un = OFFSET_BITS(instr);
                 handler = do_alignment_ldrstr;
                 break;
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index b64e67c7f176..d3daed0ae0ad 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -157,9 +157,9 @@ ENDPROC(cpu_v7_set_pte_ext)
          *  TFR   EV X F   IHD LR    S
          * .EEE ..EE PUI. .TAT 4RVI ZWRS BLDP WCAM
          * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
-         *   11    0 110    1  0011 1100 .111 1101 < we want
+         *   11    0 110    0  0011 1100 .111 1101 < we want
          */
         .align  2
         .type   v7_crval, #object
 v7_crval:
-        crval   clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
+        crval   clear=0x0122c302, mmuset=0x30c03c7d, ucset=0x00c01c7c