aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorTrent Piepho <tpiepho@gmail.com>2013-10-01 16:15:40 -0400
committerMark Brown <broonie@linaro.org>2013-10-17 20:00:32 -0400
commitaa9e0c6feb3e06463b45b0d9734a2cdbf95c4431 (patch)
tree843355f971b8a030cf4aba13aa8d0f586fe72cdb
parentd426eadb1ef166b472b09a223c30d3104fde2586 (diff)
spi: spi-mxs: Clean up setup_transfer function
It can't be called with a NULL transfer anymore so it can be simplified to not check for that. Fix indention of line-wrapped code to Linux standard. The transfer pointer can be const. It's not necessary to check if the spi_transfer's speed_hz is zero, as the spi core also fills it in from the spi_device. However, the spi core does not check if spi_device's speed is zero so we have to do that still. Signed-off-by: Trent Piepho <tpiepho@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r--drivers/spi/spi-mxs.c19
1 files changed, 8 insertions, 11 deletions
diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c
index 23cc41273dd3..9e6101a38e85 100644
--- a/drivers/spi/spi-mxs.c
+++ b/drivers/spi/spi-mxs.c
@@ -70,17 +70,14 @@ struct mxs_spi {
70}; 70};
71 71
72static int mxs_spi_setup_transfer(struct spi_device *dev, 72static int mxs_spi_setup_transfer(struct spi_device *dev,
73 struct spi_transfer *t) 73 const struct spi_transfer *t)
74{ 74{
75 struct mxs_spi *spi = spi_master_get_devdata(dev->master); 75 struct mxs_spi *spi = spi_master_get_devdata(dev->master);
76 struct mxs_ssp *ssp = &spi->ssp; 76 struct mxs_ssp *ssp = &spi->ssp;
77 uint32_t hz = 0; 77 const unsigned int hz = min(dev->max_speed_hz, t->speed_hz);
78 78
79 hz = dev->max_speed_hz;
80 if (t && t->speed_hz)
81 hz = min(hz, t->speed_hz);
82 if (hz == 0) { 79 if (hz == 0) {
83 dev_err(&dev->dev, "Cannot continue with zero clock\n"); 80 dev_err(&dev->dev, "SPI clock rate of zero not allowed\n");
84 return -EINVAL; 81 return -EINVAL;
85 } 82 }
86 83
@@ -88,12 +85,12 @@ static int mxs_spi_setup_transfer(struct spi_device *dev,
88 85
89 writel(BM_SSP_CTRL0_LOCK_CS, 86 writel(BM_SSP_CTRL0_LOCK_CS,
90 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); 87 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
88
91 writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) | 89 writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
92 BF_SSP_CTRL1_WORD_LENGTH 90 BF_SSP_CTRL1_WORD_LENGTH(BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
93 (BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) | 91 ((dev->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
94 ((dev->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) | 92 ((dev->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0),
95 ((dev->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0), 93 ssp->base + HW_SSP_CTRL1(ssp));
96 ssp->base + HW_SSP_CTRL1(ssp));
97 94
98 writel(0x0, ssp->base + HW_SSP_CMD0); 95 writel(0x0, ssp->base + HW_SSP_CMD0);
99 writel(0x0, ssp->base + HW_SSP_CMD1); 96 writel(0x0, ssp->base + HW_SSP_CMD1);