diff options
author | Fenghua Yu <fenghua.yu@intel.com> | 2012-12-21 02:44:25 -0500 |
---|---|---|
committer | H. Peter Anvin <hpa@linux.intel.com> | 2013-01-31 16:19:12 -0500 |
commit | a8ebf6d1d6971b90a20f5bd0465e6d520377e33b (patch) | |
tree | 94a38bdf06e32d6b4d20b68da6ee007734e0e374 | |
parent | e6ebf5deaaaa33b661f0db86380c232b162bd68c (diff) |
x86/microcode_core_early.c: Define interfaces for early loading ucode
Define interfaces load_ucode_bsp() and load_ucode_ap() to load ucode on BSP and
AP in early boot time. These are generic interfaces. Internally they call
vendor specific implementations.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Link: http://lkml.kernel.org/r/1356075872-3054-6-git-send-email-fenghua.yu@intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
-rw-r--r-- | arch/x86/include/asm/microcode.h | 14 | ||||
-rw-r--r-- | arch/x86/kernel/microcode_core_early.c | 76 |
2 files changed, 90 insertions, 0 deletions
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index 43d921b4752c..6825e2efd1b4 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h | |||
@@ -57,4 +57,18 @@ static inline struct microcode_ops * __init init_amd_microcode(void) | |||
57 | static inline void __exit exit_amd_microcode(void) {} | 57 | static inline void __exit exit_amd_microcode(void) {} |
58 | #endif | 58 | #endif |
59 | 59 | ||
60 | #ifdef CONFIG_MICROCODE_EARLY | ||
61 | #define MAX_UCODE_COUNT 128 | ||
62 | extern void __init load_ucode_bsp(void); | ||
63 | extern __init void load_ucode_ap(void); | ||
64 | extern int __init save_microcode_in_initrd(void); | ||
65 | #else | ||
66 | static inline void __init load_ucode_bsp(void) {} | ||
67 | static inline __init void load_ucode_ap(void) {} | ||
68 | static inline int __init save_microcode_in_initrd(void) | ||
69 | { | ||
70 | return 0; | ||
71 | } | ||
72 | #endif | ||
73 | |||
60 | #endif /* _ASM_X86_MICROCODE_H */ | 74 | #endif /* _ASM_X86_MICROCODE_H */ |
diff --git a/arch/x86/kernel/microcode_core_early.c b/arch/x86/kernel/microcode_core_early.c new file mode 100644 index 000000000000..577db8417d15 --- /dev/null +++ b/arch/x86/kernel/microcode_core_early.c | |||
@@ -0,0 +1,76 @@ | |||
1 | /* | ||
2 | * X86 CPU microcode early update for Linux | ||
3 | * | ||
4 | * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> | ||
5 | * H Peter Anvin" <hpa@zytor.com> | ||
6 | * | ||
7 | * This driver allows to early upgrade microcode on Intel processors | ||
8 | * belonging to IA-32 family - PentiumPro, Pentium II, | ||
9 | * Pentium III, Xeon, Pentium 4, etc. | ||
10 | * | ||
11 | * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture | ||
12 | * Software Developer's Manual. | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or | ||
15 | * modify it under the terms of the GNU General Public License | ||
16 | * as published by the Free Software Foundation; either version | ||
17 | * 2 of the License, or (at your option) any later version. | ||
18 | */ | ||
19 | #include <linux/module.h> | ||
20 | #include <asm/microcode_intel.h> | ||
21 | #include <asm/processor.h> | ||
22 | |||
23 | #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24)) | ||
24 | #define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u') | ||
25 | #define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I') | ||
26 | #define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l') | ||
27 | #define CPUID_AMD1 QCHAR('A', 'u', 't', 'h') | ||
28 | #define CPUID_AMD2 QCHAR('e', 'n', 't', 'i') | ||
29 | #define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D') | ||
30 | |||
31 | #define CPUID_IS(a, b, c, ebx, ecx, edx) \ | ||
32 | (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c)))) | ||
33 | |||
34 | /* | ||
35 | * In early loading microcode phase on BSP, boot_cpu_data is not set up yet. | ||
36 | * x86_vendor() gets vendor id for BSP. | ||
37 | * | ||
38 | * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify | ||
39 | * coding, we still use x86_vendor() to get vendor id for AP. | ||
40 | * | ||
41 | * x86_vendor() gets vendor information directly through cpuid. | ||
42 | */ | ||
43 | static int __cpuinit x86_vendor(void) | ||
44 | { | ||
45 | u32 eax = 0x00000000; | ||
46 | u32 ebx, ecx = 0, edx; | ||
47 | |||
48 | if (!have_cpuid_p()) | ||
49 | return X86_VENDOR_UNKNOWN; | ||
50 | |||
51 | native_cpuid(&eax, &ebx, &ecx, &edx); | ||
52 | |||
53 | if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx)) | ||
54 | return X86_VENDOR_INTEL; | ||
55 | |||
56 | if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx)) | ||
57 | return X86_VENDOR_AMD; | ||
58 | |||
59 | return X86_VENDOR_UNKNOWN; | ||
60 | } | ||
61 | |||
62 | void __init load_ucode_bsp(void) | ||
63 | { | ||
64 | int vendor = x86_vendor(); | ||
65 | |||
66 | if (vendor == X86_VENDOR_INTEL) | ||
67 | load_ucode_intel_bsp(); | ||
68 | } | ||
69 | |||
70 | void __cpuinit load_ucode_ap(void) | ||
71 | { | ||
72 | int vendor = x86_vendor(); | ||
73 | |||
74 | if (vendor == X86_VENDOR_INTEL) | ||
75 | load_ucode_intel_ap(); | ||
76 | } | ||