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authorFlorian Vaussard <florian.vaussard@epfl.ch>2014-02-28 15:42:35 -0500
committerJoerg Roedel <joro@8bytes.org>2014-03-04 11:01:55 -0500
commita8689f65de5a8c3e47bf29c2550dfebe0744e077 (patch)
treeb783d174ff647254ade15bda0000a3514c84879e
parent90e569c4ca727b59ba8f82a9cd5e2f43462bbc3b (diff)
Documentation: dt: add OMAP iommu bindings
This patch adds the iommu bindings for all OMAP2+ SoCs. Apart from the standard bindings used by OMAP peripherals, this patch uses a 'dma-window' (already used by Tegra SMMU) and adds two OMAP custom bindings - 'ti,#tlb-entries' and 'ti,iommu-bus-err-back'. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: split bindings document, add dra7 and bus error back] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
-rw-r--r--Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt26
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt b/Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt
new file mode 100644
index 000000000000..42531dc387aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt
@@ -0,0 +1,26 @@
1OMAP2+ IOMMU
2
3Required properties:
4- compatible : Should be one of,
5 "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
6 "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
7 "ti,dra7-iommu" for DRA7xx IOMMU instances
8- ti,hwmods : Name of the hwmod associated with the IOMMU instance
9- reg : Address space for the configuration registers
10- interrupts : Interrupt specifier for the IOMMU instance
11
12Optional properties:
13- ti,#tlb-entries : Number of entries in the translation look-aside buffer.
14 Should be either 8 or 32 (default: 32)
15- ti,iommu-bus-err-back : Indicates the IOMMU instance supports throwing
16 back a bus error response on MMU faults.
17
18Example:
19 /* OMAP3 ISP MMU */
20 mmu_isp: mmu@480bd400 {
21 compatible = "ti,omap2-iommu";
22 reg = <0x480bd400 0x80>;
23 interrupts = <24>;
24 ti,hwmods = "mmu_isp";
25 ti,#tlb-entries = <8>;
26 };