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authorRob Clark <robdclark@gmail.com>2014-05-30 14:47:38 -0400
committerRob Clark <robdclark@gmail.com>2014-06-02 07:36:11 -0400
commita7d3c9509b2fecf8e593f3c933ab302cbe987d2e (patch)
tree7713d6f2e17c96c442cd7a162dd66f526f71da93
parentfb27b8f29f60b8799df1aa60cd9647d56d62810e (diff)
drm/msm: add rd logging debugfs
To ease debugging, add debugfs file which can be cat/tail'd to log submits, along with fence #. If GPU hangs, you can look at 'gpu' debugfs file to find last completed fence and current register state, and compare with logged rd file to narrow down the DRAW_INDX which triggered the GPU hang. Signed-off-by: Rob Clark <robdclark@gmail.com>
-rw-r--r--drivers/gpu/drm/msm/Makefile1
-rw-r--r--drivers/gpu/drm/msm/msm_drv.c38
-rw-r--r--drivers/gpu/drm/msm/msm_drv.h11
-rw-r--r--drivers/gpu/drm/msm/msm_gem.h1
-rw-r--r--drivers/gpu/drm/msm/msm_gem_submit.c1
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.c4
-rw-r--r--drivers/gpu/drm/msm/msm_rd.c337
7 files changed, 392 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 5e1e6b0cd8ac..9a506b5921e5 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -34,6 +34,7 @@ msm-y := \
34 msm_gem_submit.o \ 34 msm_gem_submit.o \
35 msm_gpu.o \ 35 msm_gpu.o \
36 msm_iommu.o \ 36 msm_iommu.o \
37 msm_rd.o \
37 msm_ringbuffer.o 38 msm_ringbuffer.o
38 39
39msm-$(CONFIG_DRM_MSM_FBDEV) += msm_fbdev.o 40msm-$(CONFIG_DRM_MSM_FBDEV) += msm_fbdev.o
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 50ec1bed5820..929f57343440 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -299,6 +299,10 @@ static int msm_load(struct drm_device *dev, unsigned long flags)
299 priv->fbdev = msm_fbdev_init(dev); 299 priv->fbdev = msm_fbdev_init(dev);
300#endif 300#endif
301 301
302 ret = msm_debugfs_late_init(dev);
303 if (ret)
304 goto fail;
305
302 drm_kms_helper_poll_init(dev); 306 drm_kms_helper_poll_init(dev);
303 307
304 return 0; 308 return 0;
@@ -531,6 +535,35 @@ static struct drm_info_list msm_debugfs_list[] = {
531 { "fb", show_locked, 0, msm_fb_show }, 535 { "fb", show_locked, 0, msm_fb_show },
532}; 536};
533 537
538static int late_init_minor(struct drm_minor *minor)
539{
540 int ret;
541
542 if (!minor)
543 return 0;
544
545 ret = msm_rd_debugfs_init(minor);
546 if (ret) {
547 dev_err(minor->dev->dev, "could not install rd debugfs\n");
548 return ret;
549 }
550
551 return 0;
552}
553
554int msm_debugfs_late_init(struct drm_device *dev)
555{
556 int ret;
557 ret = late_init_minor(dev->primary);
558 if (ret)
559 return ret;
560 ret = late_init_minor(dev->render);
561 if (ret)
562 return ret;
563 ret = late_init_minor(dev->control);
564 return ret;
565}
566
534static int msm_debugfs_init(struct drm_minor *minor) 567static int msm_debugfs_init(struct drm_minor *minor)
535{ 568{
536 struct drm_device *dev = minor->dev; 569 struct drm_device *dev = minor->dev;
@@ -545,13 +578,16 @@ static int msm_debugfs_init(struct drm_minor *minor)
545 return ret; 578 return ret;
546 } 579 }
547 580
548 return ret; 581 return 0;
549} 582}
550 583
551static void msm_debugfs_cleanup(struct drm_minor *minor) 584static void msm_debugfs_cleanup(struct drm_minor *minor)
552{ 585{
553 drm_debugfs_remove_files(msm_debugfs_list, 586 drm_debugfs_remove_files(msm_debugfs_list,
554 ARRAY_SIZE(msm_debugfs_list), minor); 587 ARRAY_SIZE(msm_debugfs_list), minor);
588 if (!minor->dev->dev_private)
589 return;
590 msm_rd_debugfs_cleanup(minor);
555} 591}
556#endif 592#endif
557 593
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 588c427d0243..c9c71a0c3e6f 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -55,6 +55,8 @@ static inline struct device *msm_iommu_get_ctx(const char *ctx_name)
55struct msm_kms; 55struct msm_kms;
56struct msm_gpu; 56struct msm_gpu;
57struct msm_mmu; 57struct msm_mmu;
58struct msm_rd_state;
59struct msm_gem_submit;
58 60
59#define NUM_DOMAINS 2 /* one for KMS, then one per gpu core (?) */ 61#define NUM_DOMAINS 2 /* one for KMS, then one per gpu core (?) */
60 62
@@ -82,6 +84,8 @@ struct msm_drm_private {
82 uint32_t next_fence, completed_fence; 84 uint32_t next_fence, completed_fence;
83 wait_queue_head_t fence_event; 85 wait_queue_head_t fence_event;
84 86
87 struct msm_rd_state *rd;
88
85 /* list of GEM objects: */ 89 /* list of GEM objects: */
86 struct list_head inactive_list; 90 struct list_head inactive_list;
87 91
@@ -204,6 +208,13 @@ void __exit hdmi_unregister(void);
204void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m); 208void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
205void msm_gem_describe_objects(struct list_head *list, struct seq_file *m); 209void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
206void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m); 210void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
211int msm_debugfs_late_init(struct drm_device *dev);
212int msm_rd_debugfs_init(struct drm_minor *minor);
213void msm_rd_debugfs_cleanup(struct drm_minor *minor);
214void msm_rd_dump_submit(struct msm_gem_submit *submit);
215#else
216static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
217static inline void msm_rd_dump_submit(struct msm_gem_submit *submit) {}
207#endif 218#endif
208 219
209void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, 220void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h
index 3246bb46c4f2..bfb052688f8e 100644
--- a/drivers/gpu/drm/msm/msm_gem.h
+++ b/drivers/gpu/drm/msm/msm_gem.h
@@ -90,6 +90,7 @@ struct msm_gem_submit {
90 uint32_t type; 90 uint32_t type;
91 uint32_t size; /* in dwords */ 91 uint32_t size; /* in dwords */
92 uint32_t iova; 92 uint32_t iova;
93 uint32_t idx; /* cmdstream buffer idx in bos[] */
93 } cmd[MAX_CMDS]; 94 } cmd[MAX_CMDS];
94 struct { 95 struct {
95 uint32_t flags; 96 uint32_t flags;
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c
index 1f1f4cffdaed..cd0554f68316 100644
--- a/drivers/gpu/drm/msm/msm_gem_submit.c
+++ b/drivers/gpu/drm/msm/msm_gem_submit.c
@@ -402,6 +402,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
402 submit->cmd[i].type = submit_cmd.type; 402 submit->cmd[i].type = submit_cmd.type;
403 submit->cmd[i].size = submit_cmd.size / 4; 403 submit->cmd[i].size = submit_cmd.size / 4;
404 submit->cmd[i].iova = iova + submit_cmd.submit_offset; 404 submit->cmd[i].iova = iova + submit_cmd.submit_offset;
405 submit->cmd[i].idx = submit_cmd.submit_idx;
405 406
406 if (submit->valid) 407 if (submit->valid)
407 continue; 408 continue;
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index 3e667ca1f2b9..67371f3ddf99 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -377,6 +377,10 @@ int msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
377 377
378 inactive_cancel(gpu); 378 inactive_cancel(gpu);
379 379
380 msm_rd_dump_submit(submit);
381
382 gpu->submitted_fence = submit->fence;
383
380 ret = gpu->funcs->submit(gpu, submit, ctx); 384 ret = gpu->funcs->submit(gpu, submit, ctx);
381 priv->lastctx = ctx; 385 priv->lastctx = ctx;
382 386
diff --git a/drivers/gpu/drm/msm/msm_rd.c b/drivers/gpu/drm/msm/msm_rd.c
new file mode 100644
index 000000000000..9a78c48817c6
--- /dev/null
+++ b/drivers/gpu/drm/msm/msm_rd.c
@@ -0,0 +1,337 @@
1/*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* For debugging crashes, userspace can:
19 *
20 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
21 *
22 * To log the cmdstream in a format that is understood by freedreno/cffdump
23 * utility. By comparing the last successfully completed fence #, to the
24 * cmdstream for the next fence, you can narrow down which process and submit
25 * caused the gpu crash/lockup.
26 *
27 * This bypasses drm_debugfs_create_files() mainly because we need to use
28 * our own fops for a bit more control. In particular, we don't want to
29 * do anything if userspace doesn't have the debugfs file open.
30 */
31
32#ifdef CONFIG_DEBUG_FS
33
34#include <linux/kfifo.h>
35#include <linux/debugfs.h>
36#include <linux/circ_buf.h>
37#include <linux/wait.h>
38
39#include "msm_drv.h"
40#include "msm_gpu.h"
41#include "msm_gem.h"
42
43enum rd_sect_type {
44 RD_NONE,
45 RD_TEST, /* ascii text */
46 RD_CMD, /* ascii text */
47 RD_GPUADDR, /* u32 gpuaddr, u32 size */
48 RD_CONTEXT, /* raw dump */
49 RD_CMDSTREAM, /* raw dump */
50 RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
51 RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */
52 RD_FLUSH, /* empty, clear previous params */
53 RD_PROGRAM, /* shader program, raw dump */
54 RD_VERT_SHADER,
55 RD_FRAG_SHADER,
56 RD_BUFFER_CONTENTS,
57 RD_GPU_ID,
58};
59
60#define BUF_SZ 512 /* should be power of 2 */
61
62/* space used: */
63#define circ_count(circ) \
64 (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
65#define circ_count_to_end(circ) \
66 (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
67/* space available: */
68#define circ_space(circ) \
69 (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
70#define circ_space_to_end(circ) \
71 (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
72
73struct msm_rd_state {
74 struct drm_device *dev;
75
76 bool open;
77
78 struct dentry *ent;
79 struct drm_info_node *node;
80
81 /* current submit to read out: */
82 struct msm_gem_submit *submit;
83
84 /* fifo access is synchronized on the producer side by
85 * struct_mutex held by submit code (otherwise we could
86 * end up w/ cmds logged in different order than they
87 * were executed). And read_lock synchronizes the reads
88 */
89 struct mutex read_lock;
90
91 wait_queue_head_t fifo_event;
92 struct circ_buf fifo;
93
94 char buf[BUF_SZ];
95};
96
97static void rd_write(struct msm_rd_state *rd, const void *buf, int sz)
98{
99 struct circ_buf *fifo = &rd->fifo;
100 const char *ptr = buf;
101
102 while (sz > 0) {
103 char *fptr = &fifo->buf[fifo->head];
104 int n;
105
106 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0);
107
108 n = min(sz, circ_space_to_end(&rd->fifo));
109 memcpy(fptr, ptr, n);
110
111 fifo->head = (fifo->head + n) & (BUF_SZ - 1);
112 sz -= n;
113 ptr += n;
114
115 wake_up_all(&rd->fifo_event);
116 }
117}
118
119static void rd_write_section(struct msm_rd_state *rd,
120 enum rd_sect_type type, const void *buf, int sz)
121{
122 rd_write(rd, &type, 4);
123 rd_write(rd, &sz, 4);
124 rd_write(rd, buf, sz);
125}
126
127static ssize_t rd_read(struct file *file, char __user *buf,
128 size_t sz, loff_t *ppos)
129{
130 struct msm_rd_state *rd = file->private_data;
131 struct circ_buf *fifo = &rd->fifo;
132 const char *fptr = &fifo->buf[fifo->tail];
133 int n = 0, ret = 0;
134
135 mutex_lock(&rd->read_lock);
136
137 ret = wait_event_interruptible(rd->fifo_event,
138 circ_count(&rd->fifo) > 0);
139 if (ret)
140 goto out;
141
142 n = min_t(int, sz, circ_count_to_end(&rd->fifo));
143 ret = copy_to_user(buf, fptr, n);
144 if (ret)
145 goto out;
146
147 fifo->tail = (fifo->tail + n) & (BUF_SZ - 1);
148 *ppos += n;
149
150 wake_up_all(&rd->fifo_event);
151
152out:
153 mutex_unlock(&rd->read_lock);
154 if (ret)
155 return ret;
156 return n;
157}
158
159static int rd_open(struct inode *inode, struct file *file)
160{
161 struct msm_rd_state *rd = inode->i_private;
162 struct drm_device *dev = rd->dev;
163 struct msm_drm_private *priv = dev->dev_private;
164 struct msm_gpu *gpu = priv->gpu;
165 uint64_t val;
166 uint32_t gpu_id;
167 int ret = 0;
168
169 mutex_lock(&dev->struct_mutex);
170
171 if (rd->open || !gpu) {
172 ret = -EBUSY;
173 goto out;
174 }
175
176 file->private_data = rd;
177 rd->open = true;
178
179 /* the parsing tools need to know gpu-id to know which
180 * register database to load.
181 */
182 gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val);
183 gpu_id = val;
184
185 rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id));
186
187out:
188 mutex_unlock(&dev->struct_mutex);
189 return ret;
190}
191
192static int rd_release(struct inode *inode, struct file *file)
193{
194 struct msm_rd_state *rd = inode->i_private;
195 rd->open = false;
196 return 0;
197}
198
199
200static const struct file_operations rd_debugfs_fops = {
201 .owner = THIS_MODULE,
202 .open = rd_open,
203 .read = rd_read,
204 .llseek = no_llseek,
205 .release = rd_release,
206};
207
208int msm_rd_debugfs_init(struct drm_minor *minor)
209{
210 struct msm_drm_private *priv = minor->dev->dev_private;
211 struct msm_rd_state *rd;
212
213 /* only create on first minor: */
214 if (priv->rd)
215 return 0;
216
217 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
218 if (!rd)
219 return -ENOMEM;
220
221 rd->dev = minor->dev;
222 rd->fifo.buf = rd->buf;
223
224 mutex_init(&rd->read_lock);
225 priv->rd = rd;
226
227 init_waitqueue_head(&rd->fifo_event);
228
229 rd->node = kzalloc(sizeof(*rd->node), GFP_KERNEL);
230 if (!rd->node)
231 goto fail;
232
233 rd->ent = debugfs_create_file("rd", S_IFREG | S_IRUGO,
234 minor->debugfs_root, rd, &rd_debugfs_fops);
235 if (!rd->ent) {
236 DRM_ERROR("Cannot create /sys/kernel/debug/dri/%s/rd\n",
237 minor->debugfs_root->d_name.name);
238 goto fail;
239 }
240
241 rd->node->minor = minor;
242 rd->node->dent = rd->ent;
243 rd->node->info_ent = NULL;
244
245 mutex_lock(&minor->debugfs_lock);
246 list_add(&rd->node->list, &minor->debugfs_list);
247 mutex_unlock(&minor->debugfs_lock);
248
249 return 0;
250
251fail:
252 msm_rd_debugfs_cleanup(minor);
253 return -1;
254}
255
256void msm_rd_debugfs_cleanup(struct drm_minor *minor)
257{
258 struct msm_drm_private *priv = minor->dev->dev_private;
259 struct msm_rd_state *rd = priv->rd;
260
261 if (!rd)
262 return;
263
264 priv->rd = NULL;
265
266 debugfs_remove(rd->ent);
267
268 if (rd->node) {
269 mutex_lock(&minor->debugfs_lock);
270 list_del(&rd->node->list);
271 mutex_unlock(&minor->debugfs_lock);
272 kfree(rd->node);
273 }
274
275 mutex_destroy(&rd->read_lock);
276
277 kfree(rd);
278}
279
280/* called under struct_mutex */
281void msm_rd_dump_submit(struct msm_gem_submit *submit)
282{
283 struct drm_device *dev = submit->dev;
284 struct msm_drm_private *priv = dev->dev_private;
285 struct msm_rd_state *rd = priv->rd;
286 char msg[128];
287 int i, n;
288
289 if (!rd->open)
290 return;
291
292 /* writing into fifo is serialized by caller, and
293 * rd->read_lock is used to serialize the reads
294 */
295 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
296
297 n = snprintf(msg, sizeof(msg), "%.*s/%d: fence=%u",
298 TASK_COMM_LEN, current->comm, task_pid_nr(current),
299 submit->fence);
300
301 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
302
303 /* could be nice to have an option (module-param?) to snapshot
304 * all the bo's associated with the submit. Handy to see vtx
305 * buffers, etc. For now just the cmdstream bo's is enough.
306 */
307
308 for (i = 0; i < submit->nr_cmds; i++) {
309 uint32_t idx = submit->cmd[i].idx;
310 uint32_t iova = submit->cmd[i].iova;
311 uint32_t szd = submit->cmd[i].size; /* in dwords */
312 struct msm_gem_object *obj = submit->bos[idx].obj;
313 const char *buf = msm_gem_vaddr_locked(&obj->base);
314
315 buf += iova - submit->bos[idx].iova;
316
317 rd_write_section(rd, RD_GPUADDR,
318 (uint32_t[2]){ iova, szd * 4 }, 8);
319 rd_write_section(rd, RD_BUFFER_CONTENTS,
320 buf, szd * 4);
321
322 switch (submit->cmd[i].type) {
323 case MSM_SUBMIT_CMD_IB_TARGET_BUF:
324 /* ignore IB-targets, we've logged the buffer, the
325 * parser tool will follow the IB based on the logged
326 * buffer/gpuaddr, so nothing more to do.
327 */
328 break;
329 case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
330 case MSM_SUBMIT_CMD_BUF:
331 rd_write_section(rd, RD_CMDSTREAM_ADDR,
332 (uint32_t[2]){ iova, szd }, 8);
333 break;
334 }
335 }
336}
337#endif