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authorStephen Warren <swarren@nvidia.com>2013-08-20 18:08:41 -0400
committerStephen Warren <swarren@nvidia.com>2014-02-25 12:58:06 -0500
commita7cbe92cef278964a2bdb963c1da302a180bdf2a (patch)
tree8aba2b8061855510f55b65f6a58ef326fa797ecc
parent5f809932419375af8203561a39c70ed1a994c877 (diff)
ARM: tegra: remove tegra EMC scaling driver
Nothing calls into the Tegra EMC (External Memory Controller) scaling driver any more, so it's dead code. Remove it. Cc: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat
-rw-r--r--arch/arm/mach-tegra/Makefile1
-rw-r--r--arch/arm/mach-tegra/tegra2_emc.c347
-rw-r--r--arch/arm/mach-tegra/tegra2_emc.h24
3 files changed, 0 insertions, 372 deletions
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 019bb1758662..6fbfbb77dcd9 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -14,7 +14,6 @@ obj-y += sleep.o
14obj-y += tegra.o 14obj-y += tegra.o
15obj-$(CONFIG_CPU_IDLE) += cpuidle.o 15obj-$(CONFIG_CPU_IDLE) += cpuidle.o
16obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_speedo.o 16obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_speedo.o
17obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
18obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o 17obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o
19obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o 18obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o
20ifeq ($(CONFIG_CPU_IDLE),y) 19ifeq ($(CONFIG_CPU_IDLE),y)
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
deleted file mode 100644
index 3ae4a7f1a2fb..000000000000
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ /dev/null
@@ -1,347 +0,0 @@
1/*
2 * Copyright (C) 2011 Google, Inc.
3 *
4 * Author:
5 * Colin Cross <ccross@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/device.h>
20#include <linux/clk.h>
21#include <linux/err.h>
22#include <linux/io.h>
23#include <linux/module.h>
24#include <linux/of.h>
25#include <linux/platform_device.h>
26#include <linux/platform_data/tegra_emc.h>
27
28#include "tegra2_emc.h"
29#include "fuse.h"
30
31#ifdef CONFIG_TEGRA_EMC_SCALING_ENABLE
32static bool emc_enable = true;
33#else
34static bool emc_enable;
35#endif
36module_param(emc_enable, bool, 0644);
37
38static struct platform_device *emc_pdev;
39static void __iomem *emc_regbase;
40
41static inline void emc_writel(u32 val, unsigned long addr)
42{
43 writel(val, emc_regbase + addr);
44}
45
46static inline u32 emc_readl(unsigned long addr)
47{
48 return readl(emc_regbase + addr);
49}
50
51static const unsigned long emc_reg_addr[TEGRA_EMC_NUM_REGS] = {
52 0x2c, /* RC */
53 0x30, /* RFC */
54 0x34, /* RAS */
55 0x38, /* RP */
56 0x3c, /* R2W */
57 0x40, /* W2R */
58 0x44, /* R2P */
59 0x48, /* W2P */
60 0x4c, /* RD_RCD */
61 0x50, /* WR_RCD */
62 0x54, /* RRD */
63 0x58, /* REXT */
64 0x5c, /* WDV */
65 0x60, /* QUSE */
66 0x64, /* QRST */
67 0x68, /* QSAFE */
68 0x6c, /* RDV */
69 0x70, /* REFRESH */
70 0x74, /* BURST_REFRESH_NUM */
71 0x78, /* PDEX2WR */
72 0x7c, /* PDEX2RD */
73 0x80, /* PCHG2PDEN */
74 0x84, /* ACT2PDEN */
75 0x88, /* AR2PDEN */
76 0x8c, /* RW2PDEN */
77 0x90, /* TXSR */
78 0x94, /* TCKE */
79 0x98, /* TFAW */
80 0x9c, /* TRPAB */
81 0xa0, /* TCLKSTABLE */
82 0xa4, /* TCLKSTOP */
83 0xa8, /* TREFBW */
84 0xac, /* QUSE_EXTRA */
85 0x114, /* FBIO_CFG6 */
86 0xb0, /* ODT_WRITE */
87 0xb4, /* ODT_READ */
88 0x104, /* FBIO_CFG5 */
89 0x2bc, /* CFG_DIG_DLL */
90 0x2c0, /* DLL_XFORM_DQS */
91 0x2c4, /* DLL_XFORM_QUSE */
92 0x2e0, /* ZCAL_REF_CNT */
93 0x2e4, /* ZCAL_WAIT_CNT */
94 0x2a8, /* AUTO_CAL_INTERVAL */
95 0x2d0, /* CFG_CLKTRIM_0 */
96 0x2d4, /* CFG_CLKTRIM_1 */
97 0x2d8, /* CFG_CLKTRIM_2 */
98};
99
100/* Select the closest EMC rate that is higher than the requested rate */
101long tegra_emc_round_rate(unsigned long rate)
102{
103 struct tegra_emc_pdata *pdata;
104 int i;
105 int best = -1;
106 unsigned long distance = ULONG_MAX;
107
108 if (!emc_pdev)
109 return -EINVAL;
110
111 pdata = emc_pdev->dev.platform_data;
112
113 pr_debug("%s: %lu\n", __func__, rate);
114
115 /*
116 * The EMC clock rate is twice the bus rate, and the bus rate is
117 * measured in kHz
118 */
119 rate = rate / 2 / 1000;
120
121 for (i = 0; i < pdata->num_tables; i++) {
122 if (pdata->tables[i].rate >= rate &&
123 (pdata->tables[i].rate - rate) < distance) {
124 distance = pdata->tables[i].rate - rate;
125 best = i;
126 }
127 }
128
129 if (best < 0)
130 return -EINVAL;
131
132 pr_debug("%s: using %lu\n", __func__, pdata->tables[best].rate);
133
134 return pdata->tables[best].rate * 2 * 1000;
135}
136
137/*
138 * The EMC registers have shadow registers. When the EMC clock is updated
139 * in the clock controller, the shadow registers are copied to the active
140 * registers, allowing glitchless memory bus frequency changes.
141 * This function updates the shadow registers for a new clock frequency,
142 * and relies on the clock lock on the emc clock to avoid races between
143 * multiple frequency changes
144 */
145int tegra_emc_set_rate(unsigned long rate)
146{
147 struct tegra_emc_pdata *pdata;
148 int i;
149 int j;
150
151 if (!emc_pdev)
152 return -EINVAL;
153
154 pdata = emc_pdev->dev.platform_data;
155
156 /*
157 * The EMC clock rate is twice the bus rate, and the bus rate is
158 * measured in kHz
159 */
160 rate = rate / 2 / 1000;
161
162 for (i = 0; i < pdata->num_tables; i++)
163 if (pdata->tables[i].rate == rate)
164 break;
165
166 if (i >= pdata->num_tables)
167 return -EINVAL;
168
169 pr_debug("%s: setting to %lu\n", __func__, rate);
170
171 for (j = 0; j < TEGRA_EMC_NUM_REGS; j++)
172 emc_writel(pdata->tables[i].regs[j], emc_reg_addr[j]);
173
174 emc_readl(pdata->tables[i].regs[TEGRA_EMC_NUM_REGS - 1]);
175
176 return 0;
177}
178
179#ifdef CONFIG_OF
180static struct device_node *tegra_emc_ramcod