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authorDave Airlie <airlied@redhat.com>2013-05-20 19:41:33 -0400
committerDave Airlie <airlied@redhat.com>2013-05-20 19:41:33 -0400
commita3f6902672c9fa3868722ef6ab8a7dd9141def6a (patch)
treed5067d8752d7d5f29213168a589d025d3b7100e7
parentb7cb1c50c828adaee95e8ada0e55918686245992 (diff)
parent731da21b7b205efb388481f7a9731c4c1ca3b48c (diff)
Merge branch 'drm-fixes-3.10' of git://people.freedesktop.org/~agd5f/linux into drm-next
Minor bug fixes. * 'drm-fixes-3.10' of git://people.freedesktop.org/~agd5f/linux: drm/radeon/dce2: use 10khz units for audio dto calculation drm/radeon: Fix VRAM size calculation for VRAM >= 4GB drm/radeon: Remove superfluous variable
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c6
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c4
-rw-r--r--drivers/gpu/drm/radeon/evergreen_hdmi.c7
-rw-r--r--drivers/gpu/drm/radeon/r600_hdmi.c9
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c2
-rw-r--r--drivers/gpu/drm/radeon/si.c4
8 files changed, 12 insertions, 25 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 6d6fdb3ba0d0..d5df8fd10217 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1811,12 +1811,9 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc,
1811 1811
1812static void atombios_crtc_prepare(struct drm_crtc *crtc) 1812static void atombios_crtc_prepare(struct drm_crtc *crtc)
1813{ 1813{
1814 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1815 struct drm_device *dev = crtc->dev; 1814 struct drm_device *dev = crtc->dev;
1816 struct radeon_device *rdev = dev->dev_private; 1815 struct radeon_device *rdev = dev->dev_private;
1817 1816
1818 radeon_crtc->in_mode_set = true;
1819
1820 /* disable crtc pair power gating before programming */ 1817 /* disable crtc pair power gating before programming */
1821 if (ASIC_IS_DCE6(rdev)) 1818 if (ASIC_IS_DCE6(rdev))
1822 atombios_powergate_crtc(crtc, ATOM_DISABLE); 1819 atombios_powergate_crtc(crtc, ATOM_DISABLE);
@@ -1827,11 +1824,8 @@ static void atombios_crtc_prepare(struct drm_crtc *crtc)
1827 1824
1828static void atombios_crtc_commit(struct drm_crtc *crtc) 1825static void atombios_crtc_commit(struct drm_crtc *crtc)
1829{ 1826{
1830 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1831
1832 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_ON); 1827 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
1833 atombios_lock_crtc(crtc, ATOM_DISABLE); 1828 atombios_lock_crtc(crtc, ATOM_DISABLE);
1834 radeon_crtc->in_mode_set = false;
1835} 1829}
1836 1830
1837static void atombios_crtc_disable(struct drm_crtc *crtc) 1831static void atombios_crtc_disable(struct drm_crtc *crtc)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 105bafb6c29d..06c261bed289 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3405,8 +3405,8 @@ int evergreen_mc_init(struct radeon_device *rdev)
3405 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); 3405 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
3406 } else { 3406 } else {
3407 /* size in MB on evergreen/cayman/tn */ 3407 /* size in MB on evergreen/cayman/tn */
3408 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; 3408 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;
3409 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; 3409 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;
3410 } 3410 }
3411 rdev->mc.visible_vram_size = rdev->mc.aper_size; 3411 rdev->mc.visible_vram_size = rdev->mc.aper_size;
3412 r700_vram_gtt_location(rdev, &rdev->mc); 3412 r700_vram_gtt_location(rdev, &rdev->mc);
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index b4ab8ceb1654..ed7c8a768092 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -154,19 +154,18 @@ static void evergreen_audio_set_dto(struct drm_encoder *encoder, u32 clock)
154 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 154 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
155 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 155 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
156 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 156 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
157 u32 base_rate = 48000; 157 u32 base_rate = 24000;
158 158
159 if (!dig || !dig->afmt) 159 if (!dig || !dig->afmt)
160 return; 160 return;
161 161
162 /* XXX: properly calculate this */
163 /* XXX two dtos; generally use dto0 for hdmi */ 162 /* XXX two dtos; generally use dto0 for hdmi */
164 /* Express [24MHz / target pixel clock] as an exact rational 163 /* Express [24MHz / target pixel clock] as an exact rational
165 * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE 164 * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE
166 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator 165 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
167 */ 166 */
168 WREG32(DCCG_AUDIO_DTO0_PHASE, (base_rate*50) & 0xffffff); 167 WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100);
169 WREG32(DCCG_AUDIO_DTO0_MODULE, (clock*100) & 0xffffff); 168 WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100);
170 WREG32(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL(radeon_crtc->crtc_id)); 169 WREG32(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL(radeon_crtc->crtc_id));
171} 170}
172 171
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 47f180a79352..456750a0daa5 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -232,7 +232,7 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
232 struct radeon_device *rdev = dev->dev_private; 232 struct radeon_device *rdev = dev->dev_private;
233 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 233 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
234 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 234 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
235 u32 base_rate = 48000; 235 u32 base_rate = 24000;
236 236
237 if (!dig || !dig->afmt) 237 if (!dig || !dig->afmt)
238 return; 238 return;
@@ -240,7 +240,6 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
240 /* there are two DTOs selected by DCCG_AUDIO_DTO_SELECT. 240 /* there are two DTOs selected by DCCG_AUDIO_DTO_SELECT.
241 * doesn't matter which one you use. Just use the first one. 241 * doesn't matter which one you use. Just use the first one.
242 */ 242 */
243 /* XXX: properly calculate this */
244 /* XXX two dtos; generally use dto0 for hdmi */ 243 /* XXX two dtos; generally use dto0 for hdmi */
245 /* Express [24MHz / target pixel clock] as an exact rational 244 /* Express [24MHz / target pixel clock] as an exact rational
246 * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE 245 * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE
@@ -250,13 +249,13 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
250 /* according to the reg specs, this should DCE3.2 only, but in 249 /* according to the reg specs, this should DCE3.2 only, but in
251 * practice it seems to cover DCE3.0 as well. 250 * practice it seems to cover DCE3.0 as well.
252 */ 251 */
253 WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 50); 252 WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100);
254 WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100); 253 WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100);
255 WREG32(DCCG_AUDIO_DTO_SELECT, 0); /* select DTO0 */ 254 WREG32(DCCG_AUDIO_DTO_SELECT, 0); /* select DTO0 */
256 } else { 255 } else {
257 /* according to the reg specs, this should be DCE2.0 and DCE3.0 */ 256 /* according to the reg specs, this should be DCE2.0 and DCE3.0 */
258 WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate * 50) | 257 WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate / 10) |
259 AUDIO_DTO_MODULE(clock * 100)); 258 AUDIO_DTO_MODULE(clock / 10));
260 } 259 }
261} 260}
262 261
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 6857cb4efb76..7cb178a34a0f 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -1031,11 +1031,9 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc,
1031 1031
1032static void radeon_crtc_prepare(struct drm_crtc *crtc) 1032static void radeon_crtc_prepare(struct drm_crtc *crtc)
1033{ 1033{
1034 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1035 struct drm_device *dev = crtc->dev; 1034 struct drm_device *dev = crtc->dev;
1036 struct drm_crtc *crtci; 1035 struct drm_crtc *crtci;
1037 1036
1038 radeon_crtc->in_mode_set = true;
1039 /* 1037 /*
1040 * The hardware wedges sometimes if you reconfigure one CRTC 1038 * The hardware wedges sometimes if you reconfigure one CRTC
1041 * whilst another is running (see fdo bug #24611). 1039 * whilst another is running (see fdo bug #24611).
@@ -1046,7 +1044,6 @@ static void radeon_crtc_prepare(struct drm_crtc *crtc)
1046 1044
1047static void radeon_crtc_commit(struct drm_crtc *crtc) 1045static void radeon_crtc_commit(struct drm_crtc *crtc)
1048{ 1046{
1049 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1050 struct drm_device *dev = crtc->dev; 1047 struct drm_device *dev = crtc->dev;
1051 struct drm_crtc *crtci; 1048 struct drm_crtc *crtci;
1052 1049
@@ -1057,7 +1054,6 @@ static void radeon_crtc_commit(struct drm_crtc *crtc)
1057 if (crtci->enabled) 1054 if (crtci->enabled)
1058 radeon_crtc_dpms(crtci, DRM_MODE_DPMS_ON); 1055 radeon_crtc_dpms(crtci, DRM_MODE_DPMS_ON);
1059 } 1056 }
1060 radeon_crtc->in_mode_set = false;
1061} 1057}
1062 1058
1063static const struct drm_crtc_helper_funcs legacy_helper_funcs = { 1059static const struct drm_crtc_helper_funcs legacy_helper_funcs = {
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 44e579e75fd0..69ad4fe224c1 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -302,7 +302,6 @@ struct radeon_crtc {
302 u16 lut_r[256], lut_g[256], lut_b[256]; 302 u16 lut_r[256], lut_g[256], lut_b[256];
303 bool enabled; 303 bool enabled;
304 bool can_tile; 304 bool can_tile;
305 bool in_mode_set;
306 uint32_t crtc_offset; 305 uint32_t crtc_offset;
307 struct drm_gem_object *cursor_bo; 306 struct drm_gem_object *cursor_bo;
308 uint64_t cursor_addr; 307 uint64_t cursor_addr;
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 93f760e27a92..6c0ce8915fac 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -726,7 +726,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
726 return r; 726 return r;
727 } 727 }
728 DRM_INFO("radeon: %uM of VRAM memory ready\n", 728 DRM_INFO("radeon: %uM of VRAM memory ready\n",
729 (unsigned)rdev->mc.real_vram_size / (1024 * 1024)); 729 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
730 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, 730 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
731 rdev->mc.gtt_size >> PAGE_SHIFT); 731 rdev->mc.gtt_size >> PAGE_SHIFT);
732 if (r) { 732 if (r) {
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index f0b6c2f87c4d..113ed9f1f0d1 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -3397,8 +3397,8 @@ static int si_mc_init(struct radeon_device *rdev)
3397 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); 3397 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
3398 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); 3398 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
3399 /* size in MB on si */ 3399 /* size in MB on si */
3400 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; 3400 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;
3401 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; 3401 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;
3402 rdev->mc.visible_vram_size = rdev->mc.aper_size; 3402 rdev->mc.visible_vram_size = rdev->mc.aper_size;
3403 si_vram_gtt_location(rdev, &rdev->mc); 3403 si_vram_gtt_location(rdev, &rdev->mc);
3404 radeon_update_bandwidth_info(rdev); 3404 radeon_update_bandwidth_info(rdev);