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authorKeith Packard <keithp@keithp.com>2012-01-12 15:51:06 -0500
committerKeith Packard <keithp@keithp.com>2012-01-12 15:51:06 -0500
commita190d703f0cd1de301b80c3219cf891c2779d15f (patch)
tree05410e7425fc113ec8847a5752dc56ecf8a146c3
parent1a464cbb3d483f2f195b614cffa4aa1b910a0440 (diff)
parent44306ab302687b519a31aa498b954c1e26f95a6b (diff)
Merge branch 'drm-intel-next-fixes' into drm-intel-fixes
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c4
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c7
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c23
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c8
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c8
-rw-r--r--drivers/gpu/drm/i915/intel_tv.c138
6 files changed, 50 insertions, 138 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 11807989f918..f8b8ed22b4dc 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -121,11 +121,11 @@ static const char *cache_level_str(int type)
121static void 121static void
122describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) 122describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
123{ 123{
124 seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s%s", 124 seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d%s%s%s",
125 &obj->base, 125 &obj->base,
126 get_pin_flag(obj), 126 get_pin_flag(obj),
127 get_tiling_flag(obj), 127 get_tiling_flag(obj),
128 obj->base.size, 128 obj->base.size / 1024,
129 obj->base.read_domains, 129 obj->base.read_domains,
130 obj->base.write_domain, 130 obj->base.write_domain,
131 obj->last_rendering_seqno, 131 obj->last_rendering_seqno,
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 7886e4fb60e3..30d924f447c0 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -28,14 +28,19 @@
28#include "drm.h" 28#include "drm.h"
29#include "i915_drm.h" 29#include "i915_drm.h"
30#include "intel_drv.h" 30#include "intel_drv.h"
31#include "i915_reg.h"
31 32
32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) 33static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
33{ 34{
34 struct drm_i915_private *dev_priv = dev->dev_private; 35 struct drm_i915_private *dev_priv = dev->dev_private;
35 u32 dpll_reg; 36 u32 dpll_reg;
36 37
38 /* On IVB, 3rd pipe shares PLL with another one */
39 if (pipe > 1)
40 return false;
41
37 if (HAS_PCH_SPLIT(dev)) 42 if (HAS_PCH_SPLIT(dev))
38 dpll_reg = (pipe == PIPE_A) ? _PCH_DPLL_A : _PCH_DPLL_B; 43 dpll_reg = PCH_DPLL(pipe);
39 else 44 else
40 dpll_reg = (pipe == PIPE_A) ? _DPLL_A : _DPLL_B; 45 dpll_reg = (pipe == PIPE_A) ? _DPLL_A : _DPLL_B;
41 46
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index fee0ad02c6d0..dd729d46a61f 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -24,6 +24,7 @@
24 * Eric Anholt <eric@anholt.net> 24 * Eric Anholt <eric@anholt.net>
25 */ 25 */
26 26
27#include <linux/dmi.h>
27#include <linux/i2c.h> 28#include <linux/i2c.h>
28#include <linux/slab.h> 29#include <linux/slab.h>
29#include "drmP.h" 30#include "drmP.h"
@@ -540,6 +541,24 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs = {
540 .destroy = intel_encoder_destroy, 541 .destroy = intel_encoder_destroy,
541}; 542};
542 543
544static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
545{
546 DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id->ident);
547 return 1;
548}
549
550static const struct dmi_system_id intel_no_crt[] = {
551 {
552 .callback = intel_no_crt_dmi_callback,
553 .ident = "ACER ZGB",
554 .matches = {
555 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
556 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
557 },
558 },
559 { }
560};
561
543void intel_crt_init(struct drm_device *dev) 562void intel_crt_init(struct drm_device *dev)
544{ 563{
545 struct drm_connector *connector; 564 struct drm_connector *connector;
@@ -547,6 +566,10 @@ void intel_crt_init(struct drm_device *dev)
547 struct intel_connector *intel_connector; 566 struct intel_connector *intel_connector;
548 struct drm_i915_private *dev_priv = dev->dev_private; 567 struct drm_i915_private *dev_priv = dev->dev_private;
549 568
569 /* Skip machines without VGA that falsely report hotplug events */
570 if (dmi_check_system(intel_no_crt))
571 return;
572
550 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL); 573 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
551 if (!crt) 574 if (!crt)
552 return; 575 return;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index e44191132ac4..798f6e1aa544 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -708,6 +708,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
708 }, 708 },
709 }, 709 },
710 { 710 {
711 .callback = intel_no_lvds_dmi_callback,
712 .ident = "Clientron E830",
713 .matches = {
714 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
715 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
716 },
717 },
718 {
711 .callback = intel_no_lvds_dmi_callback, 719 .callback = intel_no_lvds_dmi_callback,
712 .ident = "Asus EeeBox PC EB1007", 720 .ident = "Asus EeeBox PC EB1007",
713 .matches = { 721 .matches = {
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index f7b9268df266..e334ec33a47d 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1066,15 +1066,13 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1066 1066
1067 /* Set the SDVO control regs. */ 1067 /* Set the SDVO control regs. */
1068 if (INTEL_INFO(dev)->gen >= 4) { 1068 if (INTEL_INFO(dev)->gen >= 4) {
1069 sdvox = 0; 1069 /* The real mode polarity is set by the SDVO commands, using
1070 * struct intel_sdvo_dtd. */
1071 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1070 if (intel_sdvo->is_hdmi) 1072 if (intel_sdvo->is_hdmi)
1071 sdvox |= intel_sdvo->color_range; 1073 sdvox |= intel_sdvo->color_range;
1072 if (INTEL_INFO(dev)->gen < 5) 1074 if (INTEL_INFO(dev)->gen < 5)
1073 sdvox |= SDVO_BORDER_ENABLE; 1075 sdvox |= SDVO_BORDER_ENABLE;
1074 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1075 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1076 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1077 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1078 } else { 1076 } else {
1079 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1077 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1080 switch (intel_sdvo->sdvo_reg) { 1078 switch (intel_sdvo->sdvo_reg) {
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index f3c6a9a8b081..1571be37ce3e 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -417,7 +417,7 @@ static const struct tv_mode tv_modes[] = {
417 { 417 {
418 .name = "NTSC-M", 418 .name = "NTSC-M",
419 .clock = 108000, 419 .clock = 108000,
420 .refresh = 29970, 420 .refresh = 59940,
421 .oversample = TV_OVERSAMPLE_8X, 421 .oversample = TV_OVERSAMPLE_8X,
422 .component_only = 0, 422 .component_only = 0,
423 /* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */ 423 /* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
@@ -460,7 +460,7 @@ static const struct tv_mode tv_modes[] = {
460 { 460 {
461 .name = "NTSC-443", 461 .name = "NTSC-443",
462 .clock = 108000, 462 .clock = 108000,
463 .refresh = 29970, 463 .refresh = 59940,
464 .oversample = TV_OVERSAMPLE_8X, 464 .oversample = TV_OVERSAMPLE_8X,
465 .component_only = 0, 465 .component_only = 0,
466 /* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 4.43MHz */ 466 /* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 4.43MHz */
@@ -502,7 +502,7 @@ static const struct tv_mode tv_modes[] = {
502 { 502 {
503 .name = "NTSC-J", 503 .name = "NTSC-J",
504 .clock = 108000, 504 .clock = 108000,
505 .refresh = 29970, 505 .refresh = 59940,
506 .oversample = TV_OVERSAMPLE_8X, 506 .oversample = TV_OVERSAMPLE_8X,
507 .component_only = 0, 507 .component_only = 0,
508 508
@@ -545,7 +545,7 @@ static const struct tv_mode tv_modes[] = {
545 { 545 {
546 .name = "PAL-M", 546 .name = "PAL-M",
547 .clock = 108000, 547 .clock = 108000,
548 .refresh = 29970, 548 .refresh = 59940,
549 .oversample = TV_OVERSAMPLE_8X, 549 .oversample = TV_OVERSAMPLE_8X,
550 .component_only = 0, 550 .component_only = 0,
551 551
@@ -589,7 +589,7 @@ static const struct tv_mode tv_modes[] = {
589 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */ 589 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
590 .name = "PAL-N", 590 .name = "PAL-N",
591 .clock = 108000, 591 .clock = 108000,
592 .refresh = 25000, 592 .refresh = 50000,
593 .oversample = TV_OVERSAMPLE_8X, 593 .oversample = TV_OVERSAMPLE_8X,
594 .component_only = 0, 594 .component_only = 0,
595 595
@@ -634,7 +634,7 @@ static const struct tv_mode tv_modes[] = {
634 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */ 634 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
635 .name = "PAL", 635 .name = "PAL",
636 .clock = 108000, 636 .clock = 108000,
637 .refresh = 25000, 637 .refresh = 50000,
638 .oversample = TV_OVERSAMPLE_8X, 638 .oversample = TV_OVERSAMPLE_8X,
639 .component_only = 0, 639 .component_only = 0,
640 640
@@ -674,78 +674,6 @@ static const struct tv_mode tv_modes[] = {
674 .filter_table = filter_table, 674 .filter_table = filter_table,
675 }, 675 },
676 { 676 {
677 .name = "480p@59.94Hz",
678 .clock = 107520,
679 .refresh = 59940,
680 .oversample = TV_OVERSAMPLE_4X,
681 .component_only = 1,
682
683 .hsync_end = 64, .hblank_end = 122,
684 .hblank_start = 842, .htotal = 857,
685
686 .progressive = true, .trilevel_sync = false,
687
688 .vsync_start_f1 = 12, .vsync_start_f2 = 12,
689 .vsync_len = 12,
690
691 .veq_ena = false,
692
693 .vi_end_f1 = 44, .vi_end_f2 = 44,
694 .nbr_end = 479,
695
696 .burst_ena = false,
697
698 .filter_table = filter_table,
699 },
700 {
701 .name = "480p@60Hz",
702 .clock = 107520,
703 .refresh = 60000,
704 .oversample = TV_OVERSAMPLE_4X,
705 .component_only = 1,
706
707 .hsync_end = 64, .hblank_end = 122,
708 .hblank_start = 842, .htotal = 856,
709
710 .progressive = true, .trilevel_sync = false,
711
712 .vsync_start_f1 = 12, .vsync_start_f2 = 12,
713 .vsync_len = 12,
714
715 .veq_ena = false,
716
717 .vi_end_f1 = 44, .vi_end_f2 = 44,
718 .nbr_end = 479,
719
720 .burst_ena = false,
721
722 .filter_table = filter_table,
723 },
724 {
725 .name = "576p",
726 .clock = 107520,
727 .refresh = 50000,
728 .oversample = TV_OVERSAMPLE_4X,
729 .component_only = 1,
730
731 .hsync_end = 64, .hblank_end = 139,
732 .hblank_start = 859, .htotal = 863,
733
734 .progressive = true, .trilevel_sync = false,
735
736 .vsync_start_f1 = 10, .vsync_start_f2 = 10,
737 .vsync_len = 10,
738
739 .veq_ena = false,
740
741 .vi_end_f1 = 48, .vi_end_f2 = 48,
742 .nbr_end = 575,
743
744 .burst_ena = false,
745
746 .filter_table = filter_table,
747 },
748 {
749 .name = "720p@60Hz", 677 .name = "720p@60Hz",
750 .clock = 148800, 678 .clock = 148800,
751 .refresh = 60000, 679 .refresh = 60000,
@@ -770,30 +698,6 @@ static const struct tv_mode tv_modes[] = {
770 .filter_table = filter_table, 698 .filter_table = filter_table,
771 }, 699 },
772 { 700 {
773 .name = "720p@59.94Hz",
774 .clock = 148800,
775 .refresh = 59940,
776 .oversample = TV_OVERSAMPLE_2X,
777 .component_only = 1,
778
779 .hsync_end = 80, .hblank_end = 300,
780 .hblank_start = 1580, .htotal = 1651,
781
782 .progressive = true, .trilevel_sync = true,
783
784 .vsync_start_f1 = 10, .vsync_start_f2 = 10,
785 .vsync_len = 10,
786
787 .veq_ena = false,
788
789 .vi_end_f1 = 29, .vi_end_f2 = 29,
790 .nbr_end = 719,
791
792 .burst_ena = false,
793
794 .filter_table = filter_table,
795 },
796 {
797 .name = "720p@50Hz", 701 .name = "720p@50Hz",
798 .clock = 148800, 702 .clock = 148800,
799 .refresh = 50000, 703 .refresh = 50000,
@@ -821,7 +725,7 @@ static const struct tv_mode tv_modes[] = {
821 { 725 {
822 .name = "1080i@50Hz", 726 .name = "1080i@50Hz",
823 .clock = 148800, 727 .clock = 148800,
824 .refresh = 25000, 728 .refresh = 50000,
825 .oversample = TV_OVERSAMPLE_2X, 729 .oversample = TV_OVERSAMPLE_2X,
826 .component_only = 1, 730 .component_only = 1,
827 731
@@ -847,7 +751,7 @@ static const struct tv_mode tv_modes[] = {
847 { 751 {
848 .name = "1080i@60Hz", 752 .name = "1080i@60Hz",
849 .clock = 148800, 753 .clock = 148800,
850 .refresh = 30000, 754 .refresh = 60000,
851 .oversample = TV_OVERSAMPLE_2X, 755 .oversample = TV_OVERSAMPLE_2X,
852 .component_only = 1, 756 .component_only = 1,
853 757
@@ -870,32 +774,6 @@ static const struct tv_mode tv_modes[] = {
870 774
871 .filter_table = filter_table, 775 .filter_table = filter_table,
872 }, 776 },
873 {
874 .name = "1080i@59.94Hz",
875 .clock = 148800,
876 .refresh = 29970,
877 .oversample = TV_OVERSAMPLE_2X,
878 .component_only = 1,
879
880 .hsync_end = 88, .hblank_end = 235,
881 .hblank_start = 2155, .htotal = 2201,
882
883 .progressive = false, .trilevel_sync = true,
884
885 .vsync_start_f1 = 4, .vsync_start_f2 = 5,
886 .vsync_len = 10,
887
888 .veq_ena = true, .veq_start_f1 = 4,
889 .veq_start_f2 = 4, .veq_len = 10,
890
891
892 .vi_end_f1 = 21, .vi_end_f2 = 22,
893 .nbr_end = 539,
894
895 .burst_ena = false,
896
897 .filter_table = filter_table,
898 },
899}; 777};
900 778
901static struct intel_tv *enc_to_intel_tv(struct drm_encoder *encoder) 779static struct intel_tv *enc_to_intel_tv(struct drm_encoder *encoder)