aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDaniel Thompson <daniel.thompson@linaro.org>2015-01-09 12:30:13 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-01-12 14:26:57 -0500
commita18f36453e0788d2d285a62b85c7c668ec119a64 (patch)
tree58a7608414858d990b7fd969a4b3171f65f2b7e0
parent1e3479225acbb7ae048ac30fb7c6090fa7f0df02 (diff)
ARM: 8266/1: Remove early stack deallocation from restore_user_regs
Currently restore_user_regs deallocates the SVC stack early in its execution and relies on no exception being taken between the deallocation and the registers being restored. The introduction of a default FIQ handler that also uses the SVC stack breaks this assumption and can result in corrupted register state. This patch works around the problem by removing the early stack deallocation and using r2 as a temporary instead. I have not found a way to do this without introducing an extra mov instruction to the macro. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/kernel/entry-header.S13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 4176df721bf0..1a0045abead7 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -253,21 +253,22 @@
253 .endm 253 .endm
254 254
255 .macro restore_user_regs, fast = 0, offset = 0 255 .macro restore_user_regs, fast = 0, offset = 0
256 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 256 mov r2, sp
257 ldr lr, [sp, #\offset + S_PC]! @ get pc 257 ldr r1, [r2, #\offset + S_PSR] @ get calling cpsr
258 ldr lr, [r2, #\offset + S_PC]! @ get pc
258 msr spsr_cxsf, r1 @ save in spsr_svc 259 msr spsr_cxsf, r1 @ save in spsr_svc
259#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K) 260#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
260 @ We must avoid clrex due to Cortex-A15 erratum #830321 261 @ We must avoid clrex due to Cortex-A15 erratum #830321
261 strex r1, r2, [sp] @ clear the exclusive monitor 262 strex r1, r2, [r2] @ clear the exclusive monitor
262#endif 263#endif
263 .if \fast 264 .if \fast
264 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr 265 ldmdb r2, {r1 - lr}^ @ get calling r1 - lr
265 .else 266 .else
266 ldmdb sp, {r0 - lr}^ @ get calling r0 - lr 267 ldmdb r2, {r0 - lr}^ @ get calling r0 - lr
267 .endif 268 .endif
268 mov r0, r0 @ ARMv5T and earlier require a nop 269 mov r0, r0 @ ARMv5T and earlier require a nop
269 @ after ldm {}^ 270 @ after ldm {}^
270 add sp, sp, #S_FRAME_SIZE - S_PC 271 add sp, sp, #\offset + S_FRAME_SIZE
271 movs pc, lr @ return & move spsr_svc into cpsr 272 movs pc, lr @ return & move spsr_svc into cpsr
272 .endm 273 .endm
273 274