KVM: PPC: Book3S PR: Expose TM registers

POWER8 introduces transactional memory which brings along a number of new
registers and MSR bits.

Implementing all of those is a pretty big headache, so for now let's at least
emulate enough to make Linux's context switching code happy.

Signed-off-by: Alexander Graf <agraf@suse.de>

2 files changed, 41 insertions, 1 deletions

diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
index e1165bae693a..9bdff159ad2a 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -451,6 +451,17 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
         case SPRN_EBBRR:
                 vcpu->arch.ebbrr = spr_val;
                 break;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+        case SPRN_TFHAR:
+                vcpu->arch.tfhar = spr_val;
+                break;
+        case SPRN_TEXASR:
+                vcpu->arch.texasr = spr_val;
+                break;
+        case SPRN_TFIAR:
+                vcpu->arch.tfiar = spr_val;
+                break;
+#endif
 #endif
         case SPRN_ICTC:
         case SPRN_THRM1:
@@ -572,6 +583,17 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
         case SPRN_EBBRR:
                 *spr_val = vcpu->arch.ebbrr;
                 break;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+        case SPRN_TFHAR:
+                *spr_val = vcpu->arch.tfhar;
+                break;
+        case SPRN_TEXASR:
+                *spr_val = vcpu->arch.texasr;
+                break;
+        case SPRN_TFIAR:
+                *spr_val = vcpu->arch.tfiar;
+                break;
+#endif
 #endif
         case SPRN_THRM1:
         case SPRN_THRM2:
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 7d27a9518f07..23367a7e44c3 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -794,9 +794,27 @@ static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
 /* Enable facilities (TAR, EBB, DSCR) for the guest */
 static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
 {
+        bool guest_fac_enabled;
         BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));
 
-        if (!(vcpu->arch.fscr & (1ULL << fac))) {
+        /*
+         * Not every facility is enabled by FSCR bits, check whether the
+         * guest has this facility enabled at all.
+         */
+        switch (fac) {
+        case FSCR_TAR_LG:
+        case FSCR_EBB_LG:
+                guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
+                break;
+        case FSCR_TM_LG:
+                guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
+                break;
+        default:
+                guest_fac_enabled = false;
+                break;
+        }
+
+        if (!guest_fac_enabled) {
                 /* Facility not enabled by the guest */
                 kvmppc_trigger_fac_interrupt(vcpu, fac);
                 return RESUME_GUEST;