diff options
author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-12-11 08:14:22 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-02-03 20:16:30 -0500 |
commit | 9640cf259c9496d56bf44df8ae86f00f7b417ecc (patch) | |
tree | 3327e287259ba41dbdd400eccd97e7d0a410410e | |
parent | d3a439dbe3ff1610156c39cdffcc2c3257fadd62 (diff) |
ARM: shmobile: r8a7791: Add serial ports to the device tree
Add all serial ports marked as disabled.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 180 |
1 files changed, 180 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 34f5d39220e3..00ed0e0a9bcb 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi | |||
@@ -186,6 +186,186 @@ | |||
186 | #gpio-range-cells = <3>; | 186 | #gpio-range-cells = <3>; |
187 | }; | 187 | }; |
188 | 188 | ||
189 | scifa0: serial@e6c40000 { | ||
190 | compatible = "renesas,scifa-r8a7791", "renesas,scifa"; | ||
191 | reg = <0 0xe6c40000 0 64>; | ||
192 | interrupt-parent = <&gic>; | ||
193 | interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; | ||
194 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>; | ||
195 | clock-names = "sci_ick"; | ||
196 | status = "disabled"; | ||
197 | }; | ||
198 | |||
199 | scifa1: serial@e6c50000 { | ||
200 | compatible = "renesas,scifa-r8a7791", "renesas,scifa"; | ||
201 | interrupt-parent = <&gic>; | ||
202 | reg = <0 0xe6c50000 0 64>; | ||
203 | interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; | ||
204 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>; | ||
205 | clock-names = "sci_ick"; | ||
206 | status = "disabled"; | ||
207 | }; | ||
208 | |||
209 | scifa2: serial@e6c60000 { | ||
210 | compatible = "renesas,scifa-r8a7791", "renesas,scifa"; | ||
211 | interrupt-parent = <&gic>; | ||
212 | reg = <0 0xe6c60000 0 64>; | ||
213 | interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; | ||
214 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>; | ||
215 | clock-names = "sci_ick"; | ||
216 | status = "disabled"; | ||
217 | }; | ||
218 | |||
219 | scifa3: serial@e6c70000 { | ||
220 | compatible = "renesas,scifa-r8a7791", "renesas,scifa"; | ||
221 | interrupt-parent = <&gic>; | ||
222 | reg = <0 0xe6c70000 0 64>; | ||
223 | interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; | ||
224 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>; | ||
225 | clock-names = "sci_ick"; | ||
226 | status = "disabled"; | ||
227 | }; | ||
228 | |||
229 | scifa4: serial@e6c78000 { | ||
230 | compatible = "renesas,scifa-r8a7791", "renesas,scifa"; | ||
231 | interrupt-parent = <&gic>; | ||
232 | reg = <0 0xe6c78000 0 64>; | ||
233 | interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; | ||
234 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>; | ||
235 | clock-names = "sci_ick"; | ||
236 | status = "disabled"; | ||
237 | }; | ||
238 | |||
239 | scifa5: serial@e6c80000 { | ||
240 | compatible = "renesas,scifa-r8a7791", "renesas,scifa"; | ||
241 | interrupt-parent = <&gic>; | ||
242 | reg = <0 0xe6c80000 0 64>; | ||
243 | interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; | ||
244 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>; | ||
245 | clock-names = "sci_ick"; | ||
246 | status = "disabled"; | ||
247 | }; | ||
248 | |||
249 | scifb0: serial@e6c20000 { | ||
250 | compatible = "renesas,scifb-r8a7791", "renesas,scifb"; | ||
251 | interrupt-parent = <&gic>; | ||
252 | reg = <0 0xe6c20000 0 64>; | ||
253 | interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; | ||
254 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>; | ||
255 | clock-names = "sci_ick"; | ||
256 | status = "disabled"; | ||
257 | }; | ||
258 | |||
259 | scifb1: serial@e6c30000 { | ||
260 | compatible = "renesas,scifb-r8a7791", "renesas,scifb"; | ||
261 | interrupt-parent = <&gic>; | ||
262 | reg = <0 0xe6c30000 0 64>; | ||
263 | interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; | ||
264 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>; | ||
265 | clock-names = "sci_ick"; | ||
266 | status = "disabled"; | ||
267 | }; | ||
268 | |||
269 | scifb2: serial@e6ce0000 { | ||
270 | compatible = "renesas,scifb-r8a7791", "renesas,scifb"; | ||
271 | interrupt-parent = <&gic>; | ||
272 | reg = <0 0xe6ce0000 0 64>; | ||
273 | interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; | ||
274 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>; | ||
275 | clock-names = "sci_ick"; | ||
276 | status = "disabled"; | ||
277 | }; | ||
278 | |||
279 | scif0: serial@e6e60000 { | ||
280 | compatible = "renesas,scif-r8a7791", "renesas,scif"; | ||
281 | interrupt-parent = <&gic>; | ||
282 | reg = <0 0xe6e60000 0 64>; | ||
283 | interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>; | ||
284 | clocks = <&mstp7_clks R8A7791_CLK_SCIF0>; | ||
285 | clock-names = "sci_ick"; | ||
286 | status = "disabled"; | ||
287 | }; | ||
288 | |||
289 | scif1: serial@e6e68000 { | ||
290 | compatible = "renesas,scif-r8a7791", "renesas,scif"; | ||
291 | interrupt-parent = <&gic>; | ||
292 | reg = <0 0xe6e68000 0 64>; | ||
293 | interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>; | ||
294 | clocks = <&mstp7_clks R8A7791_CLK_SCIF1>; | ||
295 | clock-names = "sci_ick"; | ||
296 | status = "disabled"; | ||
297 | }; | ||
298 | |||
299 | scif2: serial@e6e58000 { | ||
300 | compatible = "renesas,scif-r8a7791", "renesas,scif"; | ||
301 | interrupt-parent = <&gic>; | ||
302 | reg = <0 0xe6e58000 0 64>; | ||
303 | interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; | ||
304 | clocks = <&mstp7_clks R8A7791_CLK_SCIF2>; | ||
305 | clock-names = "sci_ick"; | ||
306 | status = "disabled"; | ||
307 | }; | ||
308 | |||
309 | scif3: serial@e6ea8000 { | ||
310 | compatible = "renesas,scif-r8a7791", "renesas,scif"; | ||
311 | interrupt-parent = <&gic>; | ||
312 | reg = <0 0xe6ea8000 0 64>; | ||
313 | interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; | ||
314 | clocks = <&mstp7_clks R8A7791_CLK_SCIF3>; | ||
315 | clock-names = "sci_ick"; | ||
316 | status = "disabled"; | ||
317 | }; | ||
318 | |||
319 | scif4: serial@e6ee0000 { | ||
320 | compatible = "renesas,scif-r8a7791", "renesas,scif"; | ||
321 | interrupt-parent = <&gic>; | ||
322 | reg = <0 0xe6ee0000 0 64>; | ||
323 | interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; | ||
324 | clocks = <&mstp7_clks R8A7791_CLK_SCIF4>; | ||
325 | clock-names = "sci_ick"; | ||
326 | status = "disabled"; | ||
327 | }; | ||
328 | |||
329 | scif5: serial@e6ee8000 { | ||
330 | compatible = "renesas,scif-r8a7791", "renesas,scif"; | ||
331 | interrupt-parent = <&gic>; | ||
332 | reg = <0 0xe6ee8000 0 64>; | ||
333 | interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; | ||
334 | clocks = <&mstp7_clks R8A7791_CLK_SCIF5>; | ||
335 | clock-names = "sci_ick"; | ||
336 | status = "disabled"; | ||
337 | }; | ||
338 | |||
339 | hscif0: serial@e62c0000 { | ||
340 | compatible = "renesas,hscif-r8a7791", "renesas,hscif"; | ||
341 | interrupt-parent = <&gic>; | ||
342 | reg = <0 0xe62c0000 0 96>; | ||
343 | interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>; | ||
344 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>; | ||
345 | clock-names = "sci_ick"; | ||
346 | status = "disabled"; | ||
347 | }; | ||
348 | |||
349 | hscif1: serial@e62c8000 { | ||
350 | compatible = "renesas,hscif-r8a7791", "renesas,hscif"; | ||
351 | interrupt-parent = <&gic>; | ||
352 | reg = <0 0xe62c8000 0 96>; | ||
353 | interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>; | ||
354 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>; | ||
355 | clock-names = "sci_ick"; | ||
356 | status = "disabled"; | ||
357 | }; | ||
358 | |||
359 | hscif2: serial@e62d0000 { | ||
360 | compatible = "renesas,hscif-r8a7791", "renesas,hscif"; | ||
361 | interrupt-parent = <&gic>; | ||
362 | reg = <0 0xe62d0000 0 96>; | ||
363 | interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; | ||
364 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>; | ||
365 | clock-names = "sci_ick"; | ||
366 | status = "disabled"; | ||
367 | }; | ||
368 | |||
189 | clocks { | 369 | clocks { |
190 | #address-cells = <2>; | 370 | #address-cells = <2>; |
191 | #size-cells = <2>; | 371 | #size-cells = <2>; |