diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-03-27 22:36:30 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-04-06 20:33:15 -0400 |
commit | 8f619b5429d9d852df09b85d9e41459859e04951 (patch) | |
tree | 072c67db7df6e1216d80a563ecc19e2120cba729 | |
parent | a944a9c40b81a71609692c4909bb57e1d01f4bb7 (diff) |
powerpc/ppc64: Do not turn AIL (reloc-on interrupts) too early
Turn them on at the same time as we allow MSR_IR/DR in the paca
kernel MSR, ie, after the MMU has been setup enough to be able
to handle relocated access to the linear mapping.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
-rw-r--r-- | arch/powerpc/kernel/cpu_setup_power.S | 2 | ||||
-rw-r--r-- | arch/powerpc/kernel/setup_64.c | 18 |
2 files changed, 15 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index 37d1bb002aa9..1557e7c2c7e1 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S | |||
@@ -56,7 +56,6 @@ _GLOBAL(__setup_cpu_power8) | |||
56 | li r0,0 | 56 | li r0,0 |
57 | mtspr SPRN_LPID,r0 | 57 | mtspr SPRN_LPID,r0 |
58 | mfspr r3,SPRN_LPCR | 58 | mfspr r3,SPRN_LPCR |
59 | oris r3, r3, LPCR_AIL_3@h | ||
60 | bl __init_LPCR | 59 | bl __init_LPCR |
61 | bl __init_HFSCR | 60 | bl __init_HFSCR |
62 | bl __init_tlb_power8 | 61 | bl __init_tlb_power8 |
@@ -75,7 +74,6 @@ _GLOBAL(__restore_cpu_power8) | |||
75 | li r0,0 | 74 | li r0,0 |
76 | mtspr SPRN_LPID,r0 | 75 | mtspr SPRN_LPID,r0 |
77 | mfspr r3,SPRN_LPCR | 76 | mfspr r3,SPRN_LPCR |
78 | oris r3, r3, LPCR_AIL_3@h | ||
79 | bl __init_LPCR | 77 | bl __init_LPCR |
80 | bl __init_HFSCR | 78 | bl __init_HFSCR |
81 | bl __init_tlb_power8 | 79 | bl __init_tlb_power8 |
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 1d33e817ab2d..3d7a50a08f5e 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c | |||
@@ -195,6 +195,18 @@ static void fixup_boot_paca(void) | |||
195 | get_paca()->data_offset = 0; | 195 | get_paca()->data_offset = 0; |
196 | } | 196 | } |
197 | 197 | ||
198 | static void cpu_ready_for_interrupts(void) | ||
199 | { | ||
200 | /* Set IR and DR in PACA MSR */ | ||
201 | get_paca()->kernel_msr = MSR_KERNEL; | ||
202 | |||
203 | /* Enable AIL if supported */ | ||
204 | if (cpu_has_feature(CPU_FTR_ARCH_207S)) { | ||
205 | unsigned long lpcr = mfspr(SPRN_LPCR); | ||
206 | mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); | ||
207 | } | ||
208 | } | ||
209 | |||
198 | /* | 210 | /* |
199 | * Early initialization entry point. This is called by head.S | 211 | * Early initialization entry point. This is called by head.S |
200 | * with MMU translation disabled. We rely on the "feature" of | 212 | * with MMU translation disabled. We rely on the "feature" of |
@@ -264,9 +276,9 @@ void __init early_setup(unsigned long dt_ptr) | |||
264 | /* | 276 | /* |
265 | * At this point, we can let interrupts switch to virtual mode | 277 | * At this point, we can let interrupts switch to virtual mode |
266 | * (the MMU has been setup), so adjust the MSR in the PACA to | 278 | * (the MMU has been setup), so adjust the MSR in the PACA to |
267 | * have IR and DR set. | 279 | * have IR and DR set and enable AIL if it exists |
268 | */ | 280 | */ |
269 | get_paca()->kernel_msr = MSR_KERNEL; | 281 | cpu_ready_for_interrupts(); |
270 | 282 | ||
271 | /* Reserve large chunks of memory for use by CMA for KVM */ | 283 | /* Reserve large chunks of memory for use by CMA for KVM */ |
272 | kvm_cma_reserve(); | 284 | kvm_cma_reserve(); |
@@ -307,7 +319,7 @@ void early_setup_secondary(void) | |||
307 | * (the MMU has been setup), so adjust the MSR in the PACA to | 319 | * (the MMU has been setup), so adjust the MSR in the PACA to |
308 | * have IR and DR set. | 320 | * have IR and DR set. |
309 | */ | 321 | */ |
310 | get_paca()->kernel_msr = MSR_KERNEL; | 322 | cpu_ready_for_interrupts(); |
311 | } | 323 | } |
312 | 324 | ||
313 | #endif /* CONFIG_SMP */ | 325 | #endif /* CONFIG_SMP */ |