Merge tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:

* Add Add SoC-specific SATA compatible property to r8a7779
* Enable DMA for MMCIF on r8a7791 and r8a7790
* Enable USB-PHY, HS-USB and USB3.0 on r8a7791 and r8a7790
* Enable TMU timer via DT on r8a7778
* Enable CMT timer via DT on r8a73a4
* Add MMP and {SR}GX clocks to  r8a7791 and r8a7790
* Correct scifa2 clock index on r8a7740
* Add missing INTCA for irqpin on r8a7740

* tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (34 commits)
  ARM: shmobile: r8a7779 dtsi: Add SoC-specific SATA compatible property
  ARM: shmobile: r8a7791: Reference DMA channels in MMCIF DT node
  ARM: shmobile: r8a7790: Reference DMA channels in MMCIF DT nodes
  ARM: shmobile: r8a7791: Add MMCIF0 DT node
  ARM: shmobile: r8a7790: Rename mmcif node to mmc
  ARM: shmobile: r8a7778: Add SoC-specific TMU compatible property
  ARM: shmobile: r8a73a4: Add SoC-specific CMT compatible property
  ARM: shmobile: henninger: enable HS-USB
  ARM: shmobile: koelsch: enable HS-USB
  ARM: shmobile: r8a7791: add HS-USB device node
  ARM: shmobile: lager: enable HS-USB
  ARM: shmobile: r8a7790: add HS-USB device node
  ARM: shmobile: r8a7791: add USB3.0 device node
  ARM: shmobile: lager: enable USB3.0
  ARM: shmobile: r8a7790: add USB3.0 device node
  ARM: shmobile: r8a7794: Add arch_timer to device tree
  ARM: shmobile: bockw-reference: Initialise TMU device using DT
  ARM: shmobile: r8a7778: Add TMU nodes
  ARM: shmobile: armadillo800eva dts: Enable TMU0
  ARM: shmobile: r8a7740 dtsi: Add TMU0 and TMU1 device nodes
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

16 files changed, 351 insertions, 40 deletions

diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 80939671b034..b5ead845c6c3 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -114,7 +114,7 @@
         };
 
         cmt1: timer@e6130000 {
-                compatible = "renesas,cmt-48-gen2";
+                compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2";
                 reg = <0 0xe6130000 0 0x1004>;
                 interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
 
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index 2703428557fc..98504e0b06c8 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -299,3 +299,7 @@
 
         status = "okay";
 };
+
+&tmu0 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index d46c213a17ad..aec8da89ef9a 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -71,6 +71,7 @@
                               0 149 IRQ_TYPE_LEVEL_HIGH
                               0 149 IRQ_TYPE_LEVEL_HIGH
                               0 149 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
         };
 
         /* irqpin1: IRQ8 - IRQ15 */
@@ -91,6 +92,7 @@
                               0 149 IRQ_TYPE_LEVEL_HIGH
                               0 149 IRQ_TYPE_LEVEL_HIGH
                               0 149 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
         };
 
         /* irqpin2: IRQ16 - IRQ23 */
@@ -111,6 +113,7 @@
                               0 149 IRQ_TYPE_LEVEL_HIGH
                               0 149 IRQ_TYPE_LEVEL_HIGH
                               0 149 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
         };
 
         /* irqpin3: IRQ24 - IRQ31 */
@@ -131,6 +134,7 @@
                               0 149 IRQ_TYPE_LEVEL_HIGH
                               0 149 IRQ_TYPE_LEVEL_HIGH
                               0 149 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
         };
 
         ether: ethernet@e9a00000 {
@@ -193,7 +197,7 @@
                 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                 reg = <0xe6c60000 0x100>;
                 interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
-                clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>;
+                clocks = <&mstp2_clks R8A7740_CLK_SCIFA2>;
                 clock-names = "sci_ick";
                 status = "disabled";
         };
@@ -331,6 +335,34 @@
                 status = "disabled";
         };
 
+        tmu0: timer@fff80000 {
+                compatible = "renesas,tmu-r8a7740", "renesas,tmu";
+                reg = <0xfff80000 0x2c>;
+                interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 199 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 200 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp1_clks R8A7740_CLK_TMU0>;
+                clock-names = "fck";
+
+                #renesas,channels = <3>;
+
+                status = "disabled";
+        };
+
+        tmu1: timer@fff90000 {
+                compatible = "renesas,tmu-r8a7740", "renesas,tmu";
+                reg = <0xfff90000 0x2c>;
+                interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 171 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 172 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp1_clks R8A7740_CLK_TMU1>;
+                clock-names = "fck";
+
+                #renesas,channels = <3>;
+
+                status = "disabled";
+        };
+
         clocks {
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -448,8 +480,8 @@
                 mstp2_clks: mstp2_clks@e6150138 {
                         compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
                         reg = <0xe6150138 4>, <0xe6150040 4>;
-                        clocks = <&sub_clk>, <&sub_clk>,
-                                 <&cpg_clocks R8A7740_CLK_HP>,
+                        clocks = <&sub_clk>, <&cpg_clocks R8A7740_CLK_HP>,
+                                 <&sub_clk>, <&cpg_clocks R8A7740_CLK_HP>,
                                  <&cpg_clocks R8A7740_CLK_HP>,
                                  <&cpg_clocks R8A7740_CLK_HP>,
                                  <&cpg_clocks R8A7740_CLK_HP>,
@@ -458,7 +490,8 @@
                                  <&sub_clk>;
                         #clock-cells = <1>;
                         renesas,clock-indices = <
-                                R8A7740_CLK_SCIFA6 R8A7740_CLK_SCIFA7
+                                R8A7740_CLK_SCIFA6 R8A7740_CLK_INTCA
+                                R8A7740_CLK_SCIFA7
                                 R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2
                                 R8A7740_CLK_DMAC3 R8A7740_CLK_USBDMAC
                                 R8A7740_CLK_SCIFA5 R8A7740_CLK_SCIFB
@@ -467,7 +500,8 @@
                                 R8A7740_CLK_SCIFA4
                         >;
                         clock-output-names =
-                                "scifa6", "scifa7", "dmac1", "dmac2", "dmac3",
+                                "scifa6", "intca",
+                                "scifa7", "dmac1", "dmac2", "dmac3",
                                 "usbdmac", "scifa5", "scifb", "scifa0", "scifa1",
                                 "scifa2", "scifa3", "scifa4";
                 };
diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
index fba294905ff4..04c0c37bb784 100644
--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
@@ -74,6 +74,10 @@
         status = "okay";
 };
 
+&tmu0 {
+        status = "okay";
+};
+
 &pfc {
         scif0_pins: serial0 {
                 renesas,groups = "scif0_data_a", "scif0_ctrl";
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 315ec62cb96b..96297f67fda8 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -162,6 +162,42 @@
                 status = "disabled";
         };
 
+        tmu0: timer@ffd80000 {
+                compatible = "renesas,tmu-r8a7778", "renesas,tmu";
+                reg = <0xffd80000 0x30>;
+                interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 33 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 34 IRQ_TYPE_LEVEL_HIGH>;
+
+                #renesas,channels = <3>;
+
+                status = "disabled";
+        };
+
+        tmu1: timer@ffd81000 {
+                compatible = "renesas,tmu-r8a7778", "renesas,tmu";
+                reg = <0xffd81000 0x30>;
+                interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 37 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 38 IRQ_TYPE_LEVEL_HIGH>;
+
+                #renesas,channels = <3>;
+
+                status = "disabled";
+        };
+
+        tmu2: timer@ffd82000 {
+                compatible = "renesas,tmu-r8a7778", "renesas,tmu";
+                reg = <0xffd82000 0x30>;
+                interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 41 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 42 IRQ_TYPE_LEVEL_HIGH>;
+
+                #renesas,channels = <3>;
+
+                status = "disabled";
+        };
+
         scif0: serial@ffe40000 {
                 compatible = "renesas,scif-r8a7778", "renesas,scif";
                 reg = <0xffe40000 0x100>;
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index fda814ed191d..a8845328827a 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -303,7 +303,7 @@
         };
 
         sata: sata@fc600000 {
-                compatible = "renesas,rcar-sata";
+                compatible = "renesas,sata-r8a7779", "renesas,rcar-sata";
                 reg = <0xfc600000 0x2000>;
                 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp1_clks R8A7779_CLK_SATA>;
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index acab2e153382..830f2e87df49 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -19,8 +19,8 @@
         compatible = "renesas,lager", "renesas,r8a7790";
 
         aliases {
-                serial6 = &scif0;
-                serial7 = &scif1;
+                serial6 = &scifa0;
+                serial7 = &scifa1;
         };
 
         chosen {
@@ -207,9 +207,9 @@
                 renesas,function = "du";
         };
 
-        scif0_pins: serial0 {
-                renesas,groups = "scif0_data";
-                renesas,function = "scif0";
+        scifa0_pins: serial0 {
+                renesas,groups = "scifa0_data";
+                renesas,function = "scifa0";
         };
 
         ether_pins: ether {
@@ -222,9 +222,9 @@
                 renesas,function = "intc";
         };
 
-        scif1_pins: serial1 {
-                renesas,groups = "scif1_data";
-                renesas,function = "scif1";
+        scifa1_pins: serial1 {
+                renesas,groups = "scifa1_data";
+                renesas,function = "scifa1";
         };
 
         sdhi0_pins: sd0 {
@@ -268,6 +268,11 @@
                 renesas,function = "iic3";
         };
 
+        hsusb_pins: hsusb {
+                renesas,groups = "usb0_ovc_vbus";
+                renesas,function = "usb0";
+        };
+
         usb0_pins: usb0 {
                 renesas,groups = "usb0";
                 renesas,function = "usb0";
@@ -356,15 +361,15 @@
         };
 };
 
-&scif0 {
-        pinctrl-0 = <&scif0_pins>;
+&scifa0 {
+        pinctrl-0 = <&scifa0_pins>;
         pinctrl-names = "default";
 
         status = "okay";
 };
 
-&scif1 {
-        pinctrl-0 = <&scif1_pins>;
+&scifa1 {
+        pinctrl-0 = <&scifa1_pins>;
         pinctrl-names = "default";
 
         status = "okay";
@@ -466,12 +471,29 @@
         pinctrl-names = "default";
 };
 
+&xhci {
+        status = "okay";
+        pinctrl-0 = <&usb2_pins>;
+        pinctrl-names = "default";
+};
+
 &pci2 {
         status = "okay";
         pinctrl-0 = <&usb2_pins>;
         pinctrl-names = "default";
 };
 
+&hsusb {
+        status = "okay";
+        pinctrl-0 = <&hsusb_pins>;
+        pinctrl-names = "default";
+        renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
+};
+
+&usbphy {
+        status = "okay";
+};
+
 /* composite video input */
 &vin1 {
         pinctrl-0 = <&vin1_pins>;
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index b7c59b7b06b0..52c21569e352 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -392,11 +392,13 @@
                 status = "disabled";
         };
 
-        mmcif0: mmcif@ee200000 {
+        mmcif0: mmc@ee200000 {
                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
                 reg = <0 0xee200000 0 0x80>;
                 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
+                dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
+                dma-names = "tx", "rx";
                 reg-io-width = <4>;
                 status = "disabled";
         };
@@ -406,6 +408,8 @@
                 reg = <0 0xee220000 0 0x80>;
                 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
+                dmas = <&dmac0 0xe1>, <&dmac0 0xe2>;
+                dma-names = "tx", "rx";
                 reg-io-width = <4>;
                 status = "disabled";
         };
@@ -568,6 +572,36 @@
                 status = "disabled";
         };
 
+        hsusb: usb@e6590000 {
+                compatible = "renesas,usbhs-r8a7790";
+                reg = <0 0xe6590000 0 0x100>;
+                interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
+                renesas,buswait = <4>;
+                phys = <&usb0 1>;
+                phy-names = "usb";
+                status = "disabled";
+        };
+
+        usbphy: usb-phy@e6590100 {
+                compatible = "renesas,usb-phy-r8a7790";
+                reg = <0 0xe6590100 0 0x100>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
+                clock-names = "usbhs";
+                status = "disabled";
+
+                usb0: usb-channel@0 {
+                        reg = <0>;
+                        #phy-cells = <1>;
+                };
+                usb2: usb-channel@2 {
+                        reg = <2>;
+                        #phy-cells = <1>;
+                };
+        };
+
         vin0: video@e6ef0000 {
                 compatible = "renesas,vin-r8a7790";
                 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
@@ -958,18 +992,25 @@
                 mstp1_clks: mstp1_clks@e6150134 {
                         compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                         reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-                        clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
-                                 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
-                                 <&zs_clk>;
+                        clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
+                                 <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>,
+                                 <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+                                 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
                         #clock-cells = <1>;
                         renesas,clock-indices = <
-                                R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
-                                R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
-                                R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
+                                R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1
+                                R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1
+                                R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC
+                                R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0
+                                R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0
+                                R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0
+                                R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
                         >;
                         clock-output-names =
-                                "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
-                                "vsp1-du0", "vsp1-rt", "vsp1-sy";
+                                "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1",
+                                "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1",
+                                "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0",
+                                "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
                 };
                 mstp2_clks: mstp2_clks@e6150138 {
                         compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -1160,6 +1201,16 @@
                 status = "disabled";
         };
 
+        xhci: usb@ee000000 {
+                compatible = "renesas,xhci-r8a7790";
+                reg = <0 0xee000000 0 0xc00>;
+                interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
+                phys = <&usb2 1>;
+                phy-names = "usb";
+                status = "disabled";
+        };
+
         pci0: pci@ee090000 {
                 compatible = "renesas,pci-r8a7790";
                 device_type = "pci";
@@ -1178,6 +1229,20 @@
                 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
                                  0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
                                  0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
+
+                usb@0,1 {
+                        reg = <0x800 0 0 0 0>;
+                        device_type = "pci";
+                        phys = <&usb0 0>;
+                        phy-names = "usb";
+                };
+
+                usb@0,2 {
+                        reg = <0x1000 0 0 0 0>;
+                        device_type = "pci";
+                        phys = <&usb0 0>;
+                        phy-names = "usb";
+                };
         };
 
         pci1: pci@ee0b0000 {
@@ -1218,6 +1283,20 @@
                 interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
                                  0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
                                  0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
+
+                usb@0,1 {
+                        reg = <0x800 0 0 0 0>;
+                        device_type = "pci";
+                        phys = <&usb2 0>;
+                        phy-names = "usb";
+                };
+
+                usb@0,2 {
+                        reg = <0x1000 0 0 0 0>;
+                        device_type = "pci";
+                        phys = <&usb2 0>;
+                        phy-names = "usb";
+                };
         };
 
         pciec: pcie@fe000000 {
diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
index 0868899882e3..740e38678032 100644
--- a/arch/arm/boot/dts/r8a7791-henninger.dts
+++ b/arch/arm/boot/dts/r8a7791-henninger.dts
@@ -272,6 +272,17 @@
         pinctrl-names = "default";
 };
 
+&hsusb {
+        status = "okay";
+        pinctrl-0 = <&usb0_pins>;
+        pinctrl-names = "default";
+        renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
+};
+
+&usbphy {
+        status = "okay";
+};
+
 &pcie_bus_clk {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 5e4d833ae491..191f32bc43ea 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -474,6 +474,17 @@
         pinctrl-names = "default";
 };
 
+&hsusb {
+        status = "okay";
+        pinctrl-0 = <&usb0_pins>;
+        pinctrl-names = "default";
+        renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
+};
+
+&usbphy {
+        status = "okay";
+};
+
 &pcie_bus_clk {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index e4a7170f368b..a862243f0436 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1,7 +1,7 @@
 /*
  * Device Tree Source for the r8a7791 SoC
  *
- * Copyright (C) 2013 Renesas Electronics Corporation
+ * Copyright (C) 2013-2014 Renesas Electronics Corporation
  * Copyright (C) 2013-2014 Renesas Solutions Corp.
  * Copyright (C) 2014 Cogent Embedded Inc.
  *
@@ -400,6 +400,17 @@
                 #gpio-range-cells = <3>;
         };
 
+        mmcif0: mmc@ee200000 {
+                compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
+                reg = <0 0xee200000 0 0x80>;
+                interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>;
+                dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
+                dma-names = "tx", "rx";
+                reg-io-width = <4>;
+                status = "disabled";
+        };
+
         sdhi0: sd@ee100000 {
                 compatible = "renesas,sdhi-r8a7791";
                 reg = <0 0xee100000 0 0x200>;
@@ -613,6 +624,36 @@
                 status = "disabled";
         };
 
+        hsusb: usb@e6590000 {
+                compatible = "renesas,usbhs-r8a7791";
+                reg = <0 0xe6590000 0 0x100>;
+                interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
+                renesas,buswait = <4>;
+                phys = <&usb0 1>;
+                phy-names = "usb";
+                status = "disabled";
+        };
+
+        usbphy: usb-phy@e6590100 {
+                compatible = "renesas,usb-phy-r8a7791";
+                reg = <0 0xe6590100 0 0x100>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
+                clock-names = "usbhs";
+                status = "disabled";
+
+                usb0: usb-channel@0 {
+                        reg = <0>;
+                        #phy-cells = <1>;
+                };
+                usb2: usb-channel@2 {
+                        reg = <2>;
+                        #phy-cells = <1>;
+                };
+        };
+
         vin0: video@e6ef0000 {
                 compatible = "renesas,vin-r8a7791";
                 clocks = <&mstp8_clks R8A7791_CLK_VIN0>;
@@ -958,17 +999,23 @@
                 mstp1_clks: mstp1_clks@e6150134 {
                         compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                         reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-                        clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
-                                 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
+                        clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>,
+                                 <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
+                                 <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>,
+                                 <&zs_clk>;
                         #clock-cells = <1>;
                         renesas,clock-indices = <
-                                R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
-                                R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
-                                R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
+                                R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU
+                                R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG
+                                R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0
+                                R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0
+                                R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0
+                                R8A7791_CLK_VSP1_S
                         >;
                         clock-output-names =
-                                "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
-                                "vsp1-du0", "vsp1-sy";
+                                "vcp0", "vpc0", "jpu", "ssp1", "tmu1", "3dg",
+                                "2ddmac", "fdp1-1", "fdp1-0", "tmu3", "tmu2", "cmt0",
+                                "tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy";
                 };
                 mstp2_clks: mstp2_clks@e6150138 {
                         compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -1157,6 +1204,16 @@
                 status = "disabled";
         };
 
+        xhci: usb@ee000000 {
+                compatible = "renesas,xhci-r8a7791";
+                reg = <0 0xee000000 0 0xc00>;
+                interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp3_clks R8A7791_CLK_SSUSB>;
+                phys = <&usb2 1>;
+                phy-names = "usb";
+                status = "disabled";
+        };
+
         pci0: pci@ee090000 {
                 compatible = "renesas,pci-r8a7791";
                 device_type = "pci";
@@ -1175,6 +1232,20 @@
                 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
                                  0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
                                  0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
+
+                usb@0,1 {
+                        reg = <0x800 0 0 0 0>;
+                        device_type = "pci";
+                        phys = <&usb0 0>;
+                        phy-names = "usb";
+                };
+
+                usb@0,2 {
+                        reg = <0x1000 0 0 0 0>;
+                        device_type = "pci";
+                        phys = <&usb0 0>;
+                        phy-names = "usb";
+                };
         };
 
         pci1: pci@ee0d0000 {
@@ -1195,6 +1266,20 @@
                 interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
                                  0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
                                  0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
+
+                usb@0,1 {
+                        reg = <0x800 0 0 0 0>;
+                        device_type = "pci";
+                        phys = <&usb2 0>;
+                        phy-names = "usb";
+                };
+
+                usb@0,2 {
+                        reg = <0x1000 0 0 0 0>;
+                        device_type = "pci";
+                        phys = <&usb2 0>;
+                        phy-names = "usb";
+                };
         };
 
         pciec: pcie@fe000000 {
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index d4e8bce1e0b7..088e79c6551c 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -82,6 +82,14 @@
                 status = "disabled";
         };
 
+        timer {
+                compatible = "arm,armv7-timer";
+                interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+        };
+
         irqc0: interrupt-controller@e61c0000 {
                 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
                 #interrupt-cells = <2>;
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 8ec784fc6b26..7c7223de1e9c 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -288,8 +288,6 @@ void __init r8a7778_add_dt_devices(void)
                 l2x0_init(base, 0x00400000, 0xc20f0fff);
         }
 #endif
-
-        r8a7778_register_tmu(0);
 }
 
 /* HPB-DMA */
@@ -497,6 +495,7 @@ static void __init r8a7778_register_hpb_dmae(void)
 void __init r8a7778_add_standard_devices(void)
 {
         r8a7778_add_dt_devices();
+        r8a7778_register_tmu(0);
         r8a7778_register_scif(0);
         r8a7778_register_scif(1);
         r8a7778_register_scif(2);
diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h
index f6b4b0fe7a43..476135da0f23 100644
--- a/include/dt-bindings/clock/r8a7740-clock.h
+++ b/include/dt-bindings/clock/r8a7740-clock.h
@@ -40,6 +40,7 @@
 
 /* MSTP2 */
 #define R8A7740_CLK_SCIFA6      30
+#define R8A7740_CLK_INTCA       29
 #define R8A7740_CLK_SCIFA7      22
 #define R8A7740_CLK_DMAC1       18
 #define R8A7740_CLK_DMAC2       17
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 8ea7ab0346ad..e3a3fb80feb6 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -26,8 +26,18 @@
 #define R8A7790_CLK_MSIOF0              0
 
 /* MSTP1 */
-#define R8A7790_CLK_JPU         6
+#define R8A7790_CLK_VCP1                0
+#define R8A7790_CLK_VCP0                1
+#define R8A7790_CLK_VPC1                2
+#define R8A7790_CLK_VPC0                3
+#define R8A7790_CLK_JPU                 6
+#define R8A7790_CLK_SSP1                9
 #define R8A7790_CLK_TMU1                11
+#define R8A7790_CLK_3DG                 12
+#define R8A7790_CLK_2DDMAC              15
+#define R8A7790_CLK_FDP1_2              17
+#define R8A7790_CLK_FDP1_1              18
+#define R8A7790_CLK_FDP1_0              19
 #define R8A7790_CLK_TMU3                21
 #define R8A7790_CLK_TMU2                22
 #define R8A7790_CLK_CMT0                24
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index 58c3f49d068c..dcececd9f4d0 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -25,8 +25,15 @@
 #define R8A7791_CLK_MSIOF0              0
 
 /* MSTP1 */
-#define R8A7791_CLK_JPU         6
+#define R8A7791_CLK_VCP0                1
+#define R8A7791_CLK_VPC0                3
+#define R8A7791_CLK_JPU                 6
+#define R8A7791_CLK_SSP1                9
 #define R8A7791_CLK_TMU1                11
+#define R8A7791_CLK_3DG                 12
+#define R8A7791_CLK_2DDMAC              15
+#define R8A7791_CLK_FDP1_1              18
+#define R8A7791_CLK_FDP1_0              19
 #define R8A7791_CLK_TMU3                21
 #define R8A7791_CLK_TMU2                22
 #define R8A7791_CLK_CMT0                24